diff mbox series

[v1,1/4] net/mlx5: support previous meter color aware

Message ID 20220513073308.10762-2-shunh@nvidia.com (mailing list archive)
State Awaiting Upstream
Delegated to: Raslan Darawsheh
Headers show
Series Enable yellow meter hierarchy | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Shun Hao May 13, 2022, 7:33 a.m. UTC
This patch adds the support for previous color aware for meter.
Start_color setting is set to UNDEFINED when creating meter object that
is color aware.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azard <matan@nvidia.com>
---
 drivers/net/mlx5/mlx5.h            |  2 ++
 drivers/net/mlx5/mlx5_flow_aso.c   | 19 +++++++++++--------
 drivers/net/mlx5/mlx5_flow_meter.c |  3 ++-
 3 files changed, 15 insertions(+), 9 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 23a28f6e52..c92ce6b527 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -859,6 +859,8 @@  struct mlx5_flow_meter_info {
 	uint32_t transfer:1;
 	uint32_t def_policy:1;
 	/* Meter points to default policy. */
+	uint32_t color_aware:1;
+	/* Meter is color aware mode. */
 	void *drop_rule[MLX5_MTR_DOMAIN_MAX];
 	/* Meter drop rule in drop table. */
 	uint32_t drop_cnt;
diff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c
index eb7fc43da3..4129e3a9e0 100644
--- a/drivers/net/mlx5/mlx5_flow_aso.c
+++ b/drivers/net/mlx5/mlx5_flow_aso.c
@@ -652,6 +652,7 @@  mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,
 	uint16_t res;
 	uint32_t dseg_idx = 0;
 	struct mlx5_aso_mtr_pool *pool = NULL;
+	uint32_t param_le;
 
 	rte_spinlock_lock(&sq->sqsl);
 	res = size - (uint16_t)(sq->head - sq->tail);
@@ -688,15 +689,14 @@  mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,
 		wqe->aso_dseg.mtrs[dseg_idx].ebs_eir = 0;
 	}
 	fmp = fm->profile;
-	if (fmp->profile.packet_mode)
-		wqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm =
-				RTE_BE32((1 << ASO_DSEG_VALID_OFFSET) |
-				(MLX5_FLOW_COLOR_GREEN << ASO_DSEG_SC_OFFSET) |
-				(MLX5_METER_MODE_PKT << ASO_DSEG_MTR_MODE));
+	param_le = (1 << ASO_DSEG_VALID_OFFSET);
+	if (fm->color_aware)
+		param_le |= (MLX5_FLOW_COLOR_UNDEFINED << ASO_DSEG_SC_OFFSET);
 	else
-		wqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm =
-				RTE_BE32((1 << ASO_DSEG_VALID_OFFSET) |
-				(MLX5_FLOW_COLOR_GREEN << ASO_DSEG_SC_OFFSET));
+		param_le |= (MLX5_FLOW_COLOR_GREEN << ASO_DSEG_SC_OFFSET);
+	if (fmp->profile.packet_mode)
+		param_le |= (MLX5_METER_MODE_PKT << ASO_DSEG_MTR_MODE);
+	wqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm = RTE_BE32(param_le);
 	switch (fmp->profile.alg) {
 	case RTE_MTR_SRTCM_RFC2697:
 		/* Only needed for RFC2697. */
@@ -709,6 +709,9 @@  mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,
 				RTE_BE32(1 << ASO_DSEG_BBOG_OFFSET);
 		break;
 	case RTE_MTR_TRTCM_RFC4115:
+		wqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm |=
+				RTE_BE32(1 << ASO_DSEG_BO_OFFSET);
+		break;
 	default:
 		break;
 	}
diff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c
index a3d1f2c08d..b52de70afa 100644
--- a/drivers/net/mlx5/mlx5_flow_meter.c
+++ b/drivers/net/mlx5/mlx5_flow_meter.c
@@ -1005,7 +1005,7 @@  mlx5_flow_meter_validate(struct mlx5_priv *priv, uint32_t meter_id,
 					  RTE_MTR_ERROR_TYPE_MTR_PARAMS,
 					  NULL, "Meter object params null.");
 	/* Previous meter color is not supported. */
-	if (params->use_prev_mtr_color)
+	if (params->use_prev_mtr_color && !priv->sh->meter_aso_en)
 		return -rte_mtr_error_set(error, ENOTSUP,
 					  RTE_MTR_ERROR_TYPE_MTR_PARAMS,
 					  NULL,
@@ -1293,6 +1293,7 @@  mlx5_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,
 	fm->active_state = 1; /* Config meter starts as active. */
 	fm->is_enable = params->meter_enable;
 	fm->shared = !!shared;
+	fm->color_aware = !!params->use_prev_mtr_color;
 	__atomic_add_fetch(&fm->profile->ref_cnt, 1, __ATOMIC_RELAXED);
 	if (params->meter_policy_id == priv->sh->mtrmng->def_policy_id) {
 		fm->def_policy = 1;