[v4,2/2] config/arm: disable SVE ACLE for cn10k

Message ID 20220509101932.2403562-2-rbhansali@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [v4,1/2] config/arm: add SVE ACLE control flag |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-intel-Functional success Functional Testing PASS
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/github-robot: build success github build: passed
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS

Commit Message

Rahul Bhansali May 9, 2022, 10:19 a.m. UTC
  This disable the sve_acle flag for cn10k.

Performance impact:-
With l3fwd example, lpm lookup performance increased
by ~21% if Neon is used instead of SVE.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
Changes in v4:
- Resend patches. With v3, patches were not sent properly
in single series.

Changes in v3: No change

Changes in v2:
- Renamed the flag to sve_acle from sve

 config/arm/meson.build | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--
2.25.1
  

Comments

Chengwen Feng May 10, 2022, 2:57 a.m. UTC | #1
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>

On 2022/5/9 18:19, Rahul Bhansali wrote:
> This disable the sve_acle flag for cn10k.
> 
> Performance impact:-
> With l3fwd example, lpm lookup performance increased
> by ~21% if Neon is used instead of SVE.
> 
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
> ---
> Changes in v4:
> - Resend patches. With v3, patches were not sent properly
> in single series.
> 
> Changes in v3: No change
> 
> Changes in v2:
> - Renamed the flag to sve_acle from sve
> 
>  config/arm/meson.build | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index 6f8961eac8..a94129168f 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -281,7 +281,8 @@ soc_cn10k = {
>      ],
>      'part_number': '0xd49',
>      'extra_march_features': ['crypto'],
> -    'numa': false
> +    'numa': false,
> +    'sve_acle': false
>  }
> 
>  soc_dpaa = {
> --
> 2.25.1
> 
> 
> .
>
  
Ruifeng Wang May 11, 2022, 1:35 a.m. UTC | #2
> -----Original Message-----
> From: Rahul Bhansali <rbhansali@marvell.com>
> Sent: Monday, May 9, 2022 6:20 PM
> To: dev@dpdk.org; Jan Viktorin <viktorin@rehivetech.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>; Bruce Richardson <bruce.richardson@intel.com>
> Cc: jerinj@marvell.com; Rahul Bhansali <rbhansali@marvell.com>
> Subject: [PATCH v4 2/2] config/arm: disable SVE ACLE for cn10k
> 
> This disable the sve_acle flag for cn10k.
> 
> Performance impact:-
> With l3fwd example, lpm lookup performance increased by ~21% if Neon is
> used instead of SVE.
> 
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
> ---
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
  
Honnappa Nagarahalli May 11, 2022, 4:12 a.m. UTC | #3
<snip>
> > -----Original Message-----
> > From: Rahul Bhansali <rbhansali@marvell.com>
> > Sent: Monday, May 9, 2022 6:20 PM
> > To: dev@dpdk.org; Jan Viktorin <viktorin@rehivetech.com>; Ruifeng Wang
> > <Ruifeng.Wang@arm.com>; Bruce Richardson
> <bruce.richardson@intel.com>
> > Cc: jerinj@marvell.com; Rahul Bhansali <rbhansali@marvell.com>
> > Subject: [PATCH v4 2/2] config/arm: disable SVE ACLE for cn10k
> >
> > This disable the sve_acle flag for cn10k.
> >
> > Performance impact:-
> > With l3fwd example, lpm lookup performance increased by ~21% if Neon
> > is used instead of SVE.
Suggest changing this commit log as follows:
"With l3fwd example, lpm lookup performance increased by ~21% if Neon is used instead of SVE. Hence, disable sve_acle flag for cn10k".

> >
> > Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
> > ---
> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
  

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 6f8961eac8..a94129168f 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -281,7 +281,8 @@  soc_cn10k = {
     ],
     'part_number': '0xd49',
     'extra_march_features': ['crypto'],
-    'numa': false
+    'numa': false,
+    'sve_acle': false
 }

 soc_dpaa = {