diff mbox series

common/cnxk: fix channel number setting in MCAM entries

Message ID 20220502084730.609989-1-psatheesh@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series common/cnxk: fix channel number setting in MCAM entries |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-testing warning apply patch failure

Commit Message

Satheesh Paul Antonysamy May 2, 2022, 8:47 a.m. UTC 
  From: Satheesh Paul <psatheesh@marvell.com>

Adding changes to accommodate the following requirements
while masking the channel number.
1. For CN10K device, channel number should not be masked
   for first pass rules with RTE_FLOW_ACTION_TYPE_SECURITY
   action. And channel number should be masked for all
   other flow rules.
2. For CN9K device channel number should not be masked.

Fixes: 29dcc20985 ("common/cnxk: support for CPT second pass flow rules")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>
---
 drivers/common/cnxk/roc_npc_mcam.c | 30 ++++++++++++++++++------------
 1 file changed, 18 insertions(+), 12 deletions(-)

Comments

Jerin Jacob June 13, 2022, 7:26 a.m. UTC | #1 
On Mon, May 2, 2022 at 2:17 PM <psatheesh@marvell.com> wrote:
>
> From: Satheesh Paul <psatheesh@marvell.com>
>
> Adding changes to accommodate the following requirements
> while masking the channel number.
> 1. For CN10K device, channel number should not be masked
>    for first pass rules with RTE_FLOW_ACTION_TYPE_SECURITY
>    action. And channel number should be masked for all
>    other flow rules.
> 2. For CN9K device channel number should not be masked.
>
> Fixes: 29dcc20985 ("common/cnxk: support for CPT second pass flow rules")

Not correct. Updated as
Fixes: 4968b362b639 ("common/cnxk: support CPT second pass flow rules")

> Cc: stable@dpdk.org
>
> Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
> Reviewed-by: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>

Updated as Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
Please check this in future patches,

Applied to dpdk-next-net-mrvl/for-next-net. Thanks



> ---
>  drivers/common/cnxk/roc_npc_mcam.c | 30 ++++++++++++++++++------------
>  1 file changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
> index bccbaaa51f..0ae58da0ba 100644
> --- a/drivers/common/cnxk/roc_npc_mcam.c
> +++ b/drivers/common/cnxk/roc_npc_mcam.c
> @@ -508,19 +508,25 @@ npc_mcam_set_channel(struct roc_npc_flow *flow,
>         req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0));
>         flow->mcam_data[0] &= ~(GENMASK(11, 0));
>         flow->mcam_mask[0] &= ~(GENMASK(11, 0));
> +       chan = channel;
> +       mask = chan_mask;
>
> -       if (is_second_pass) {
> -               chan = (channel | NIX_CHAN_CPT_CH_START);
> -               mask = (chan_mask | NIX_CHAN_CPT_CH_START);
> -       } else {
> -               /*
> -                * Clear bits 10 & 11 corresponding to CPT
> -                * channel. By default, rules should match
> -                * both first pass packets and second pass
> -                * packets from CPT.
> -                */
> -               chan = (channel & NIX_CHAN_CPT_X2P_MASK);
> -               mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
> +       if (roc_model_runtime_is_cn10k()) {
> +               if (is_second_pass) {
> +                       chan = (channel | NIX_CHAN_CPT_CH_START);
> +                       mask = (chan_mask | NIX_CHAN_CPT_CH_START);
> +               } else {
> +                       if (!(flow->npc_action & NIX_RX_ACTIONOP_UCAST_IPSEC)) {
> +                               /*
> +                                * Clear bits 10 & 11 corresponding to CPT
> +                                * channel. By default, rules should match
> +                                * both first pass packets and second pass
> +                                * packets from CPT.
> +                                */
> +                               chan = (channel & NIX_CHAN_CPT_X2P_MASK);
> +                               mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
> +                       }
> +               }
>         }
>
>         req->entry_data.kw[0] |= (uint64_t)chan;
> --
> 2.25.4
>
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
index bccbaaa51f..0ae58da0ba 100644
--- a/drivers/common/cnxk/roc_npc_mcam.c
+++ b/drivers/common/cnxk/roc_npc_mcam.c
@@ -508,19 +508,25 @@  npc_mcam_set_channel(struct roc_npc_flow *flow,
 	req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0));
 	flow->mcam_data[0] &= ~(GENMASK(11, 0));
 	flow->mcam_mask[0] &= ~(GENMASK(11, 0));
+	chan = channel;
+	mask = chan_mask;
 
-	if (is_second_pass) {
-		chan = (channel | NIX_CHAN_CPT_CH_START);
-		mask = (chan_mask | NIX_CHAN_CPT_CH_START);
-	} else {
-		/*
-		 * Clear bits 10 & 11 corresponding to CPT
-		 * channel. By default, rules should match
-		 * both first pass packets and second pass
-		 * packets from CPT.
-		 */
-		chan = (channel & NIX_CHAN_CPT_X2P_MASK);
-		mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
+	if (roc_model_runtime_is_cn10k()) {
+		if (is_second_pass) {
+			chan = (channel | NIX_CHAN_CPT_CH_START);
+			mask = (chan_mask | NIX_CHAN_CPT_CH_START);
+		} else {
+			if (!(flow->npc_action & NIX_RX_ACTIONOP_UCAST_IPSEC)) {
+				/*
+				 * Clear bits 10 & 11 corresponding to CPT
+				 * channel. By default, rules should match
+				 * both first pass packets and second pass
+				 * packets from CPT.
+				 */
+				chan = (channel & NIX_CHAN_CPT_X2P_MASK);
+				mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
+			}
+		}
 	}
 
 	req->entry_data.kw[0] |= (uint64_t)chan;