From patchwork Sat Feb 19 12:13:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 107844 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A308EA034E; Sat, 19 Feb 2022 13:35:32 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5DBF7410E3; Sat, 19 Feb 2022 13:35:29 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 6CB56410E0 for ; Sat, 19 Feb 2022 13:35:27 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 21JAkxti001914 for ; Sat, 19 Feb 2022 04:35:26 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=reLH3FpYMvQ7PfAcOR3IxcYB4jxfe7ErQgp0DUv4tsY=; b=UXWM5PewzoAgxRWZXOS86PwLuzt0X8GSzkHCn5UtM1Cy1vGGktj7qk5JTIzxkeM36sN6 hd5QeRDSYglXauOWNEiBKihaTqAtMdeArjjsGxsHfddDbjab5Gy1jDf+2H3xtinwR5HR QRVcnNcNrBzSNL1rd2oTIAl2LmwZg4y01d71P0qGY5dQK39uyxI/FEu20kD8hjeDGc2e hSzpxTPYSY0OBKb7/ckvkRc56xKXiTMicTb6MsinDXEOOWuh+DRsvionNbEGFeOHUBbs GSVmTT7kuAyjGEaZSlYGUidQItVbDXm7p8Q9ka6OvEJMuLIZKphAwxZVDXFgmuBpWg9y xA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3eaxssg7vh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 19 Feb 2022 04:35:26 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sat, 19 Feb 2022 04:35:47 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Sat, 19 Feb 2022 04:35:47 -0800 Received: from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176]) by maili.marvell.com (Postfix) with ESMTP id 9C7C85C6A04; Sat, 19 Feb 2022 04:13:43 -0800 (PST) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Subject: [PATCH 1/2] event/cnxk: remove deschedule usage in CN9K Date: Sat, 19 Feb 2022 17:43:37 +0530 Message-ID: <20220219121338.2438-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Proofpoint-GUID: 1x3UUYXFvqFrzKpxdU3FosBcgeVSd3xt X-Proofpoint-ORIG-GUID: 1x3UUYXFvqFrzKpxdU3FosBcgeVSd3xt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-19_04,2022-02-18_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Using deschedule cmd might incorrectly ignore updates to WQE, GGRP on CN9K. Use addwork to pipeline work instead. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn9k_worker.h | 41 +++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h index 79374b8d95..0905d744cc 100644 --- a/drivers/event/cnxk/cn9k_worker.h +++ b/drivers/event/cnxk/cn9k_worker.h @@ -63,15 +63,18 @@ cn9k_sso_hws_fwd_swtag(uint64_t base, const struct rte_event *ev) } static __rte_always_inline void -cn9k_sso_hws_fwd_group(uint64_t base, const struct rte_event *ev, - const uint16_t grp) +cn9k_sso_hws_new_event_wait(struct cn9k_sso_hws *ws, const struct rte_event *ev) { const uint32_t tag = (uint32_t)ev->event; const uint8_t new_tt = ev->sched_type; + const uint64_t event_ptr = ev->u64; + const uint16_t grp = ev->queue_id; - plt_write64(ev->u64, base + SSOW_LF_GWS_OP_UPD_WQP_GRP1); - cnxk_sso_hws_swtag_desched(tag, new_tt, grp, - base + SSOW_LF_GWS_OP_SWTAG_DESCHED); + while (ws->xaq_lmt <= __atomic_load_n(ws->fc_mem, __ATOMIC_RELAXED)) + ; + + cnxk_sso_hws_add_work(event_ptr, tag, new_tt, + ws->grp_base + (grp << 12)); } static __rte_always_inline void @@ -86,10 +89,12 @@ cn9k_sso_hws_forward_event(struct cn9k_sso_hws *ws, const struct rte_event *ev) } else { /* * Group has been changed for group based work pipelining, - * Use deschedule/add_work operation to transfer the event to + * Use add_work operation to transfer the event to * new group/core */ - cn9k_sso_hws_fwd_group(ws->base, ev, grp); + rte_atomic_thread_fence(__ATOMIC_RELEASE); + roc_sso_hws_head_wait(ws->base); + cn9k_sso_hws_new_event_wait(ws, ev); } } @@ -113,6 +118,22 @@ cn9k_sso_hws_dual_new_event(struct cn9k_sso_hws_dual *dws, return 1; } +static __rte_always_inline void +cn9k_sso_hws_dual_new_event_wait(struct cn9k_sso_hws_dual *dws, + const struct rte_event *ev) +{ + const uint32_t tag = (uint32_t)ev->event; + const uint8_t new_tt = ev->sched_type; + const uint64_t event_ptr = ev->u64; + const uint16_t grp = ev->queue_id; + + while (dws->xaq_lmt <= __atomic_load_n(dws->fc_mem, __ATOMIC_RELAXED)) + ; + + cnxk_sso_hws_add_work(event_ptr, tag, new_tt, + dws->grp_base + (grp << 12)); +} + static __rte_always_inline void cn9k_sso_hws_dual_forward_event(struct cn9k_sso_hws_dual *dws, uint64_t base, const struct rte_event *ev) @@ -126,10 +147,12 @@ cn9k_sso_hws_dual_forward_event(struct cn9k_sso_hws_dual *dws, uint64_t base, } else { /* * Group has been changed for group based work pipelining, - * Use deschedule/add_work operation to transfer the event to + * Use add_work operation to transfer the event to * new group/core */ - cn9k_sso_hws_fwd_group(base, ev, grp); + rte_atomic_thread_fence(__ATOMIC_RELEASE); + roc_sso_hws_head_wait(base); + cn9k_sso_hws_dual_new_event_wait(dws, ev); } }