net/mlx5: fix GENEVE and VXLAN-GPE item matching

Message ID 20211124132609.3315173-1-akozyrev@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix GENEVE and VXLAN-GPE item matching |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/github-robot: build success github build: passed
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing warning Testing issues
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS

Commit Message

Alexander Kozyrev Nov. 24, 2021, 1:26 p.m. UTC
  GENEVE and VXLAN-GPE item matching is done similarly to GRE matching.
Users can skip the specification of the protocol type and expect that
this type is deducted from the inner header type automatically.
But the inner header type may not be specified in order to match all the
protocol types. In this case, PMD should not specify the protocol type.
Check if we have the inner header type before setting the protocol type.

Fixes: 690391dd0e ("net/mlx5: fix GENEVE protocol type translation")
Fixes: 861fa3796f ("net/mlx5: fix VXLAN-GPE next protocol translation")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
  

Comments

Slava Ovsiienko Nov. 24, 2021, 1:51 p.m. UTC | #1
> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Wednesday, November 24, 2021 15:26
> To: dev@dpdk.org
> Cc: stable@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>;
> Gregory Etelson <getelson@nvidia.com>
> Subject: [PATCH] net/mlx5: fix GENEVE and VXLAN-GPE item matching
> 
> GENEVE and VXLAN-GPE item matching is done similarly to GRE matching.
> Users can skip the specification of the protocol type and expect that this type
> is deducted from the inner header type automatically.
> But the inner header type may not be specified in order to match all the
> protocol types. In this case, PMD should not specify the protocol type.
> Check if we have the inner header type before setting the protocol type.
> 
> Fixes: 690391dd0e ("net/mlx5: fix GENEVE protocol type translation")
> Fixes: 861fa3796f ("net/mlx5: fix VXLAN-GPE next protocol translation")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
  
Raslan Darawsheh Nov. 24, 2021, 4:24 p.m. UTC | #2
Hi,
> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Wednesday, November 24, 2021 3:26 PM
> To: dev@dpdk.org
> Cc: stable@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>;
> Gregory Etelson <getelson@nvidia.com>
> Subject: [PATCH] net/mlx5: fix GENEVE and VXLAN-GPE item matching
> 
> GENEVE and VXLAN-GPE item matching is done similarly to GRE matching.
> Users can skip the specification of the protocol type and expect that
> this type is deducted from the inner header type automatically.
> But the inner header type may not be specified in order to match all the
> protocol types. In this case, PMD should not specify the protocol type.
> Check if we have the inner header type before setting the protocol type.
> 
> Fixes: 690391dd0e ("net/mlx5: fix GENEVE protocol type translation")
> Fixes: 861fa3796f ("net/mlx5: fix VXLAN-GPE next protocol translation")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 1a9c040f3c..3da122cbb9 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9057,7 +9057,6 @@  flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
 	m_protocol = vxlan_m->protocol;
 	v_protocol = vxlan_v->protocol;
 	if (!m_protocol) {
-		m_protocol = 0xff;
 		/* Force next protocol to ensure next headers parsing. */
 		if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
 			v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
@@ -9065,6 +9064,8 @@  flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
 			v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
 		else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
 			v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
+		if (v_protocol)
+			m_protocol = 0xFF;
 	}
 	MLX5_SET(fte_match_set_misc3, misc_m,
 		 outer_vxlan_gpe_next_protocol, m_protocol);
@@ -9135,8 +9136,9 @@  flow_dv_translate_item_geneve(void *matcher, void *key,
 	protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
 	if (!protocol_m) {
 		/* Force next protocol to prevent matchers duplication */
-		protocol_m = 0xFFFF;
 		protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
+		if (protocol_v)
+			protocol_m = 0xFFFF;
 	}
 	MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
 	MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,