[22.02,2/2] net/cnxk: add devargs for configuring SDP channel mask
Checks
Commit Message
From: Satheesh Paul <psatheesh@marvell.com>
This patch adds support to configure channel mask which will
be used by rte flow when adding flow rules on SDP interfaces.
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
---
doc/guides/nics/cnxk.rst | 21 ++++++++++++++
drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++--
2 files changed, 59 insertions(+), 2 deletions(-)
Comments
On 11/9/2021 9:42 AM, psatheesh@marvell.com wrote:
> From: Satheesh Paul <psatheesh@marvell.com>
>
> This patch adds support to configure channel mask which will
> be used by rte flow when adding flow rules on SDP interfaces.
>
Hi Satheesh,
+ Ori & Andrew.
What 'SDP' stands for?
And can this new devarg be provided with flow rule? Why it needs to be a new devarg?
Can you please give a sample of the rte flow API that will be used?
Thanks,
ferruh
> Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
> ---
> doc/guides/nics/cnxk.rst | 21 ++++++++++++++
> drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++--
> 2 files changed, 59 insertions(+), 2 deletions(-)
>
> diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
> index 837ffc02b4..470e01b811 100644
> --- a/doc/guides/nics/cnxk.rst
> +++ b/doc/guides/nics/cnxk.rst
> @@ -276,6 +276,27 @@ Runtime Config Options
> set with this custom mask, inbound encrypted traffic from all ports with
> matching channel number pattern will be directed to the inline IPSec device.
>
> +- ``SDP device channel and mask`` (default ``none``)
> + Set channel and channel mask configuration for the SDP device. This
> + will be used when creating flow rules on the SDP device.
> +
> + By default, for rules created on the SDP device, the RTE Flow API sets the
> + channel number and mask to cover the entire SDP channel range in the channel
> + field of the MCAM entry. This behaviour can be modified using the
> + ``sdp_channel_mask`` ``devargs`` parameter.
> +
> + For example::
> +
> + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00
> +
> + With the above configuration, RTE Flow rules API will set the channel
> + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules
> + created on the SDP device. This option needs to be used when more than one
> + SDP interface is in use and RTE Flow rules created need to distinguish
> + between traffic from each SDP interface. The channel and mask combination
> + specified should match all the channels(or rings) configured on the SDP
> + interface.
> +
> .. note::
>
<...>
Hi,
Please find reply inline.
Thanks,
Satheesh.
-----Original Message-----
From: Ferruh Yigit <ferruh.yigit@intel.com>
Sent: 11 January 2022 05:26 PM
To: Satheesh Paul <psatheesh@marvell.com>; Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Kiran Kumar Kokkilagadda <kirankumark@marvell.com>; Sunil Kumar Kori <skori@marvell.com>; Satha Koteswara Rao Kottidi <skoteshwar@marvell.com>
Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>; Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Subject: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask
External Email
----------------------------------------------------------------------
On 11/9/2021 9:42 AM, psatheesh@marvell.com wrote:
> From: Satheesh Paul <psatheesh@marvell.com>
>
> This patch adds support to configure channel mask which will be used
> by rte flow when adding flow rules on SDP interfaces.
>
>Hi Satheesh,
>+ Ori & Andrew.
>What 'SDP' stands for?
It stands for "System DMA Packet Interface". This is when the system acts as PCIe endpoint. For instance, an x86 machine can act as a host having an Octeon TX* board plugged through this PCIe interface and packets are transferred through this PCIe interface.
>And can this new devarg be provided with flow rule? Why it needs to be a new devarg?
SDP and its channel related info are specific to the hardware and rte flow api cannot be extended to support them. Hence, it is added as a new devarg.
>Can you please give a sample of the rte flow API that will be used?
This channel mask will be used by the rte_flow_create() api. It is actually transparent at rte_flow_create() invocation itself. That is, at the time of rte_flow_create() invocation, user does not give any additional information. But internally, the driver's flow creation api takes the SDP channel/mask value supplied at the startup and applies it. Basically, in Octeon tx*, the interfaces have a "channel identifier" number. The rules in packet classification hardware are configured to match the channel number. With this change, we are relaxing the exact match and are allowing a range for this SDP interface.
Thanks,
ferruh
> Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
> ---
> doc/guides/nics/cnxk.rst | 21 ++++++++++++++
> drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++--
> 2 files changed, 59 insertions(+), 2 deletions(-)
>
> diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst index
> 837ffc02b4..470e01b811 100644
> --- a/doc/guides/nics/cnxk.rst
> +++ b/doc/guides/nics/cnxk.rst
> @@ -276,6 +276,27 @@ Runtime Config Options
> set with this custom mask, inbound encrypted traffic from all ports with
> matching channel number pattern will be directed to the inline IPSec device.
>
> +- ``SDP device channel and mask`` (default ``none``)
> + Set channel and channel mask configuration for the SDP device. This
> + will be used when creating flow rules on the SDP device.
> +
> + By default, for rules created on the SDP device, the RTE Flow API sets the
> + channel number and mask to cover the entire SDP channel range in the channel
> + field of the MCAM entry. This behaviour can be modified using the
> + ``sdp_channel_mask`` ``devargs`` parameter.
> +
> + For example::
> +
> + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00
> +
> + With the above configuration, RTE Flow rules API will set the channel
> + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules
> + created on the SDP device. This option needs to be used when more than one
> + SDP interface is in use and RTE Flow rules created need to distinguish
> + between traffic from each SDP interface. The channel and mask combination
> + specified should match all the channels(or rings) configured on the SDP
> + interface.
> +
> .. note::
>
<...>
On 1/11/2022 2:29 PM, Satheesh Paul wrote:
> Hi,
>
> Please find reply inline.
>
> Thanks,
> Satheesh.
>
> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@intel.com>
> Sent: 11 January 2022 05:26 PM
> To: Satheesh Paul <psatheesh@marvell.com>; Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Kiran Kumar Kokkilagadda <kirankumark@marvell.com>; Sunil Kumar Kori <skori@marvell.com>; Satha Koteswara Rao Kottidi <skoteshwar@marvell.com>
> Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>; Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
> Subject: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask
>
> External Email
>
> ----------------------------------------------------------------------
> On 11/9/2021 9:42 AM, psatheesh@marvell.com wrote:
>> From: Satheesh Paul <psatheesh@marvell.com>
>>
>> This patch adds support to configure channel mask which will be used
>> by rte flow when adding flow rules on SDP interfaces.
>>
>
>> Hi Satheesh,
>
>> + Ori & Andrew.
>
>> What 'SDP' stands for?
> It stands for "System DMA Packet Interface". This is when the system acts as PCIe endpoint. For instance, an x86 machine can act as a host having an Octeon TX* board plugged through this PCIe interface and packets are transferred through this PCIe interface.
>
>> And can this new devarg be provided with flow rule? Why it needs to be a new devarg?
> SDP and its channel related info are specific to the hardware and rte flow api cannot be extended to support them. Hence, it is added as a new devarg.
>
>> Can you please give a sample of the rte flow API that will be used?
> This channel mask will be used by the rte_flow_create() api. It is actually transparent at rte_flow_create() invocation itself. That is, at the time of rte_flow_create() invocation, user does not give any additional information. But internally, the driver's flow creation api takes the SDP channel/mask value supplied at the startup and applies it. Basically, in Octeon tx*, the interfaces have a "channel identifier" number. The rules in packet classification hardware are configured to match the channel number. With this change, we are relaxing the exact match and are allowing a range for this SDP interface.
>
Got it. I am still not quite clear what SDP is, but from below document
my understanding was user need to provide these channel & mask while
creating a flow rule, but according above description that is not the case,
but this is internal to the driver, so I am OK to proceed.
Thanks for clarification.
> Thanks,
> ferruh
>
>
>> Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
>> ---
>> doc/guides/nics/cnxk.rst | 21 ++++++++++++++
>> drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++--
>> 2 files changed, 59 insertions(+), 2 deletions(-)
>>
>> diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst index
>> 837ffc02b4..470e01b811 100644
>> --- a/doc/guides/nics/cnxk.rst
>> +++ b/doc/guides/nics/cnxk.rst
>> @@ -276,6 +276,27 @@ Runtime Config Options
>> set with this custom mask, inbound encrypted traffic from all ports with
>> matching channel number pattern will be directed to the inline IPSec device.
>>
>> +- ``SDP device channel and mask`` (default ``none``)
>> + Set channel and channel mask configuration for the SDP device. This
>> + will be used when creating flow rules on the SDP device.
>> +
>> + By default, for rules created on the SDP device, the RTE Flow API sets the
>> + channel number and mask to cover the entire SDP channel range in the channel
>> + field of the MCAM entry. This behaviour can be modified using the
>> + ``sdp_channel_mask`` ``devargs`` parameter.
>> +
>> + For example::
>> +
>> + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00
>> +
>> + With the above configuration, RTE Flow rules API will set the channel
>> + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules
>> + created on the SDP device. This option needs to be used when more than one
>> + SDP interface is in use and RTE Flow rules created need to distinguish
>> + between traffic from each SDP interface. The channel and mask combination
>> + specified should match all the channels(or rings) configured on the SDP
>> + interface.
>> +
>> .. note::
>>
>
> <...>
@@ -276,6 +276,27 @@ Runtime Config Options
set with this custom mask, inbound encrypted traffic from all ports with
matching channel number pattern will be directed to the inline IPSec device.
+- ``SDP device channel and mask`` (default ``none``)
+ Set channel and channel mask configuration for the SDP device. This
+ will be used when creating flow rules on the SDP device.
+
+ By default, for rules created on the SDP device, the RTE Flow API sets the
+ channel number and mask to cover the entire SDP channel range in the channel
+ field of the MCAM entry. This behaviour can be modified using the
+ ``sdp_channel_mask`` ``devargs`` parameter.
+
+ For example::
+
+ -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00
+
+ With the above configuration, RTE Flow rules API will set the channel
+ and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules
+ created on the SDP device. This option needs to be used when more than one
+ SDP interface is in use and RTE Flow rules created need to distinguish
+ between traffic from each SDP interface. The channel and mask combination
+ specified should match all the channels(or rings) configured on the SDP
+ interface.
+
.. note::
Above devarg parameters are configurable per device, user needs to pass the
@@ -7,6 +7,12 @@
#include "cnxk_ethdev.h"
+struct sdp_channel {
+ bool is_sdp_mask_set;
+ uint16_t channel;
+ uint16_t mask;
+};
+
static int
parse_outb_nb_desc(const char *key, const char *value, void *extra_args)
{
@@ -164,6 +170,27 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)
return 0;
}
+static int
+parse_sdp_channel_mask(const char *key, const char *value, void *extra_args)
+{
+ RTE_SET_USED(key);
+ uint16_t chan = 0, mask = 0;
+ char *next = 0;
+
+ /* next will point to the separator '/' */
+ chan = strtol(value, &next, 16);
+ mask = strtol(++next, 0, 16);
+
+ if (chan > GENMASK(11, 0) || mask > GENMASK(11, 0))
+ return -EINVAL;
+
+ ((struct sdp_channel *)extra_args)->channel = chan;
+ ((struct sdp_channel *)extra_args)->mask = mask;
+ ((struct sdp_channel *)extra_args)->is_sdp_mask_set = true;
+
+ return 0;
+}
+
#define CNXK_RSS_RETA_SIZE "reta_size"
#define CNXK_SCL_ENABLE "scalar_enable"
#define CNXK_MAX_SQB_COUNT "max_sqb_count"
@@ -177,6 +204,7 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)
#define CNXK_OUTB_NB_DESC "outb_nb_desc"
#define CNXK_FORCE_INB_INL_DEV "force_inb_inl_dev"
#define CNXK_OUTB_NB_CRYPTO_QS "outb_nb_crypto_qs"
+#define CNXK_SDP_CHANNEL_MASK "sdp_channel_mask"
int
cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
@@ -191,11 +219,14 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
uint16_t force_inb_inl_dev = 0;
uint16_t outb_nb_crypto_qs = 1;
uint16_t outb_nb_desc = 8200;
+ struct sdp_channel sdp_chan;
uint16_t rss_tag_as_xor = 0;
uint16_t scalar_enable = 0;
uint8_t lock_rx_ctx = 0;
struct rte_kvargs *kvlist;
+ memset(&sdp_chan, 0, sizeof(sdp_chan));
+
if (devargs == NULL)
goto null_devargs;
@@ -228,6 +259,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
&parse_outb_nb_crypto_qs, &outb_nb_crypto_qs);
rte_kvargs_process(kvlist, CNXK_FORCE_INB_INL_DEV, &parse_flag,
&force_inb_inl_dev);
+ rte_kvargs_process(kvlist, CNXK_SDP_CHANNEL_MASK,
+ &parse_sdp_channel_mask, &sdp_chan);
rte_kvargs_free(kvlist);
null_devargs:
@@ -246,8 +279,10 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
dev->npc.flow_prealloc_size = flow_prealloc_size;
dev->npc.flow_max_priority = flow_max_priority;
dev->npc.switch_header_type = switch_header_type;
+ dev->npc.sdp_channel = sdp_chan.channel;
+ dev->npc.sdp_channel_mask = sdp_chan.mask;
+ dev->npc.is_sdp_mask_set = sdp_chan.is_sdp_mask_set;
return 0;
-
exit:
return -EINVAL;
}
@@ -263,4 +298,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
CNXK_IPSEC_IN_MAX_SPI "=<1-65535>"
CNXK_OUTB_NB_DESC "=<1-65535>"
CNXK_OUTB_NB_CRYPTO_QS "=<1-64>"
- CNXK_FORCE_INB_INL_DEV "=1");
+ CNXK_FORCE_INB_INL_DEV "=1"
+ CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>");