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From: Fan Zhang <roy.fan.zhang@intel.com>
To: dev@dpdk.org
Cc: gakhil@marvell.com, Fan Zhang <roy.fan.zhang@intel.com>,
 Arek Kusztal <arkadiuszx.kusztal@intel.com>, Kai Ji <kai.ji@intel.com>
Date: Fri, 22 Oct 2021 18:03:46 +0100
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 <20211022170354.13503-1-roy.fan.zhang@intel.com>
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Subject: [dpdk-dev] [dpdk-dev v4 1/9] common/qat: add gen specific data and
 function
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This patch adds the data structure and function prototypes for
different QAT generations.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com
---
 drivers/common/qat/qat_common.h | 14 ++++++++------
 drivers/common/qat/qat_device.c |  4 ++++
 drivers/common/qat/qat_device.h | 23 +++++++++++++++++++++++
 3 files changed, 35 insertions(+), 6 deletions(-)

diff --git a/drivers/common/qat/qat_common.h b/drivers/common/qat/qat_common.h
index 23715085f4..1889ec4e88 100644
--- a/drivers/common/qat/qat_common.h
+++ b/drivers/common/qat/qat_common.h
@@ -15,20 +15,24 @@
 /* Intel(R) QuickAssist Technology device generation is enumerated
  * from one according to the generation of the device
  */
+
 enum qat_device_gen {
-	QAT_GEN1 = 1,
+	QAT_GEN1,
 	QAT_GEN2,
 	QAT_GEN3,
-	QAT_GEN4
+	QAT_GEN4,
+	QAT_N_GENS
 };
 
 enum qat_service_type {
-	QAT_SERVICE_ASYMMETRIC = 0,
+	QAT_SERVICE_ASYMMETRIC,
 	QAT_SERVICE_SYMMETRIC,
 	QAT_SERVICE_COMPRESSION,
-	QAT_SERVICE_INVALID
+	QAT_MAX_SERVICES
 };
 
+#define QAT_SERVICE_INVALID	(QAT_MAX_SERVICES)
+
 enum qat_svc_list {
 	QAT_SVC_UNUSED = 0,
 	QAT_SVC_CRYPTO = 1,
@@ -37,8 +41,6 @@ enum qat_svc_list {
 	QAT_SVC_ASYM = 4,
 };
 
-#define QAT_MAX_SERVICES		(QAT_SERVICE_INVALID)
-
 /**< Common struct for scatter-gather list operations */
 struct qat_flat_buf {
 	uint32_t len;
diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c
index 1b967cbcf7..e6b43c541f 100644
--- a/drivers/common/qat/qat_device.c
+++ b/drivers/common/qat/qat_device.c
@@ -13,6 +13,10 @@
 #include "adf_pf2vf_msg.h"
 #include "qat_pf2vf.h"
 
+/* Hardware device information per generation */
+struct qat_gen_hw_data qat_gen_config[QAT_N_GENS];
+struct qat_dev_hw_spec_funcs *qat_dev_hw_spec[QAT_N_GENS];
+
 /* pv2vf data Gen 4*/
 struct qat_pf2vf_dev qat_pf2vf_gen4 = {
 	.pf2vf_offset = ADF_4XXXIOV_PF2VM_OFFSET,
diff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h
index 228c057d1e..b8b5c387a3 100644
--- a/drivers/common/qat/qat_device.h
+++ b/drivers/common/qat/qat_device.h
@@ -21,6 +21,29 @@
 #define COMP_ENQ_THRESHOLD_NAME "qat_comp_enq_threshold"
 #define MAX_QP_THRESHOLD_SIZE	32
 
+/**
+ * Function prototypes for GENx specific device operations.
+ **/
+typedef int (*qat_dev_reset_ring_pairs_t)
+		(struct qat_pci_device *);
+typedef const struct rte_mem_resource* (*qat_dev_get_transport_bar_t)
+		(struct rte_pci_device *);
+typedef int (*qat_dev_get_misc_bar_t)
+		(struct rte_mem_resource **, struct rte_pci_device *);
+typedef int (*qat_dev_read_config_t)
+		(struct qat_pci_device *);
+typedef int (*qat_dev_get_extra_size_t)(void);
+
+struct qat_dev_hw_spec_funcs {
+	qat_dev_reset_ring_pairs_t	qat_dev_reset_ring_pairs;
+	qat_dev_get_transport_bar_t	qat_dev_get_transport_bar;
+	qat_dev_get_misc_bar_t		qat_dev_get_misc_bar;
+	qat_dev_read_config_t		qat_dev_read_config;
+	qat_dev_get_extra_size_t	qat_dev_get_extra_size;
+};
+
+extern struct qat_dev_hw_spec_funcs *qat_dev_hw_spec[];
+
 struct qat_dev_cmd_param {
 	const char *name;
 	uint16_t val;