From patchwork Thu Oct 21 09:50:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 102565 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7ADFBA0547; Thu, 21 Oct 2021 11:54:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E9CEF4127C; Thu, 21 Oct 2021 11:51:19 +0200 (CEST) Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by mails.dpdk.org (Postfix) with ESMTP id C271641250 for ; Thu, 21 Oct 2021 11:51:15 +0200 (CEST) X-QQ-mid: bizesmtp38t1634809870t1ikw2s8 Received: from jiawenwu.trustnetic.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Thu, 21 Oct 2021 17:51:10 +0800 (CST) X-QQ-SSF: 01400000000000E0I000000A0000000 X-QQ-FEAT: OhFpIYkBcd1dW2JkYXWGynRwnMd8xK9/3b02oAxygcf0BowCQGo/TsSALp05D +tCmdo+hLMJ8pM4ofhgzall+gr8xqCOq5+Dbss/PVxwPpzu+NhoKDq8Kbc7mW389u/GFyoZ sce322zv6iSzvNlN+UAeMgmEkOA/I/GyuLDQUBiRr9NVkMWq/1sc0QLKWrbxSw2PyTekZnK JDisPmzoSj2CnhR6Z5imnfCO2KxxGCaEEIofcl+VKH5CAIK22wBsbrWtUHuhR5pelkLUJJH cb7QqSIGfct/+FbY/guQRx0UZPAtkZ+D6uO3ozsn4AAIA2ZRy/d6sx4fgkk+8QzXo5VdojP HjhsDOhJbhS7dDDsYp71zgjO/tUTpZtPqFtqWwkSaut7h45UhY= X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Thu, 21 Oct 2021 17:50:19 +0800 Message-Id: <20211021095023.18288-23-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20211021095023.18288-1-jiawenwu@trustnetic.com> References: <20211021095023.18288-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign5 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH v2 22/26] net/ngbe: support register dump X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Support to dump registers. Signed-off-by: Jiawen Wu --- doc/guides/nics/features/ngbe.ini | 1 + drivers/net/ngbe/base/ngbe_type.h | 1 + drivers/net/ngbe/ngbe_ethdev.c | 108 +++++++++++++++++++++++++++++ drivers/net/ngbe/ngbe_regs_group.h | 54 +++++++++++++++ 4 files changed, 164 insertions(+) create mode 100644 drivers/net/ngbe/ngbe_regs_group.h diff --git a/doc/guides/nics/features/ngbe.ini b/doc/guides/nics/features/ngbe.ini index 8cc556aea0..9bb10c744e 100644 --- a/doc/guides/nics/features/ngbe.ini +++ b/doc/guides/nics/features/ngbe.ini @@ -36,6 +36,7 @@ Extended stats = Y Stats per queue = Y FW version = Y EEPROM dump = Y +Registers dump = Y Multiprocess aware = Y Linux = Y ARMv8 = Y diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h index 32d3ab5d03..12847b7272 100644 --- a/drivers/net/ngbe/base/ngbe_type.h +++ b/drivers/net/ngbe/base/ngbe_type.h @@ -398,6 +398,7 @@ struct ngbe_hw { u16 sub_device_id; u16 sub_system_id; u32 eeprom_id; + u8 revision_id; bool adapter_stopped; uint64_t isb_dma; diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index 9838e2966e..4c839afe85 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -13,6 +13,67 @@ #include "ngbe.h" #include "ngbe_ethdev.h" #include "ngbe_rxtx.h" +#include "ngbe_regs_group.h" + +static const struct reg_info ngbe_regs_general[] = { + {NGBE_RST, 1, 1, "NGBE_RST"}, + {NGBE_STAT, 1, 1, "NGBE_STAT"}, + {NGBE_PORTCTL, 1, 1, "NGBE_PORTCTL"}, + {NGBE_GPIODATA, 1, 1, "NGBE_GPIODATA"}, + {NGBE_GPIOCTL, 1, 1, "NGBE_GPIOCTL"}, + {NGBE_LEDCTL, 1, 1, "NGBE_LEDCTL"}, + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_nvm[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_interrupt[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_fctl_others[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_rxdma[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_rx[] = { + {0, 0, 0, ""} +}; + +static struct reg_info ngbe_regs_tx[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_wakeup[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_mac[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info ngbe_regs_diagnostic[] = { + {0, 0, 0, ""}, +}; + +/* PF registers */ +static const struct reg_info *ngbe_regs_others[] = { + ngbe_regs_general, + ngbe_regs_nvm, + ngbe_regs_interrupt, + ngbe_regs_fctl_others, + ngbe_regs_rxdma, + ngbe_regs_rx, + ngbe_regs_tx, + ngbe_regs_wakeup, + ngbe_regs_mac, + ngbe_regs_diagnostic, + NULL}; static int ngbe_dev_close(struct rte_eth_dev *dev); static int ngbe_dev_link_update(struct rte_eth_dev *dev, @@ -2672,6 +2733,52 @@ ngbe_dev_set_mc_addr_list(struct rte_eth_dev *dev, ngbe_dev_addr_list_itr, TRUE); } +static int +ngbe_get_reg_length(struct rte_eth_dev *dev __rte_unused) +{ + int count = 0; + int g_ind = 0; + const struct reg_info *reg_group; + const struct reg_info **reg_set = ngbe_regs_others; + + while ((reg_group = reg_set[g_ind++])) + count += ngbe_regs_group_count(reg_group); + + return count; +} + +static int +ngbe_get_regs(struct rte_eth_dev *dev, + struct rte_dev_reg_info *regs) +{ + struct ngbe_hw *hw = ngbe_dev_hw(dev); + uint32_t *data = regs->data; + int g_ind = 0; + int count = 0; + const struct reg_info *reg_group; + const struct reg_info **reg_set = ngbe_regs_others; + + if (data == NULL) { + regs->length = ngbe_get_reg_length(dev); + regs->width = sizeof(uint32_t); + return 0; + } + + /* Support only full register dump */ + if (regs->length == 0 || + regs->length == (uint32_t)ngbe_get_reg_length(dev)) { + regs->version = hw->mac.type << 24 | + hw->revision_id << 16 | + hw->device_id; + while ((reg_group = reg_set[g_ind++])) + count += ngbe_read_regs_group(dev, &data[count], + reg_group); + return 0; + } + + return -ENOTSUP; +} + static int ngbe_get_eeprom_length(struct rte_eth_dev *dev) { @@ -2769,6 +2876,7 @@ static const struct eth_dev_ops ngbe_eth_dev_ops = { .rss_hash_update = ngbe_dev_rss_hash_update, .rss_hash_conf_get = ngbe_dev_rss_hash_conf_get, .set_mc_addr_list = ngbe_dev_set_mc_addr_list, + .get_reg = ngbe_get_regs, .rx_burst_mode_get = ngbe_rx_burst_mode_get, .tx_burst_mode_get = ngbe_tx_burst_mode_get, .get_eeprom_length = ngbe_get_eeprom_length, diff --git a/drivers/net/ngbe/ngbe_regs_group.h b/drivers/net/ngbe/ngbe_regs_group.h new file mode 100644 index 0000000000..cc4b69fd54 --- /dev/null +++ b/drivers/net/ngbe/ngbe_regs_group.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd. + * Copyright(c) 2010-2017 Intel Corporation + */ + +#ifndef _NGBE_REGS_GROUP_H_ +#define _NGBE_REGS_GROUP_H_ + +#include "ngbe_ethdev.h" + +struct ngbe_hw; +struct reg_info { + uint32_t base_addr; + uint32_t count; + uint32_t stride; + const char *name; +}; + +static inline int +ngbe_read_regs(struct ngbe_hw *hw, const struct reg_info *reg, + uint32_t *reg_buf) +{ + unsigned int i; + + for (i = 0; i < reg->count; i++) + reg_buf[i] = rd32(hw, reg->base_addr + i * reg->stride); + return reg->count; +}; + +static inline int +ngbe_regs_group_count(const struct reg_info *regs) +{ + int count = 0; + int i = 0; + + while (regs[i].count) + count += regs[i++].count; + return count; +}; + +static inline int +ngbe_read_regs_group(struct rte_eth_dev *dev, uint32_t *reg_buf, + const struct reg_info *regs) +{ + int count = 0; + int i = 0; + struct ngbe_hw *hw = ngbe_dev_hw(dev); + + while (regs[i].count) + count += ngbe_read_regs(hw, ®s[i++], ®_buf[count]); + return count; +}; + +#endif /* _NGBE_REGS_GROUP_H_ */