From patchwork Tue Oct 19 10:47:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aman Kumar X-Patchwork-Id: 102185 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B69A8A0C43; Tue, 19 Oct 2021 12:47:57 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61C3141142; Tue, 19 Oct 2021 12:47:56 +0200 (CEST) Received: from mail-pf1-f179.google.com (mail-pf1-f179.google.com [209.85.210.179]) by mails.dpdk.org (Postfix) with ESMTP id F0B5F4003E for ; Tue, 19 Oct 2021 12:47:54 +0200 (CEST) Received: by mail-pf1-f179.google.com with SMTP id i76so15116628pfe.13 for ; Tue, 19 Oct 2021 03:47:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vvdntech-in.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZCv0EIyjv84JGFOZiPAISQ5dNr3ZVdRbpqEtsJFEHc0=; b=qCCR1jT2CooBLfxidsru4eKmtehJR5V2ZTvu2Mb1sV500jnUfzEUECSqNvcV+rHaTK XNlxNHGkQCI779b9IySJ/gTp/YTlNzO2t+h8z82V3OA9gdlDcAq0Jr29ezIDDt5u6GBv lIfrNsbTAW4xBxvLn5ju2+JlPM94eaFnYbo/BuNjb1YQSr8JbSVcqxwXddlHMtTTZtNe +6e2ISC9aWrOB/Nfq6e2Ca24Y9I0Mc0R5Plkm5POV1sioI5u+bBuDXIv4M93+e/I/2uL nj87atI0po4jMqK/ZCgnMNB/2RCDyFM2izu+AS5/Vt/5Cwd+8ExpAtYmtekvncLDblka +tmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZCv0EIyjv84JGFOZiPAISQ5dNr3ZVdRbpqEtsJFEHc0=; b=sSqjXHnnZdZMn1L6k7Qi8netmEayR34yGcJma6wxT0hndaS7y+oVUAhBAIuvJOAf7G OvSSeMy1VdkrfMAawe9c70R+sCmkPdVuZN1svUmS3JBwFhVaJl31Lgz2Vzp4KWnNGaWu 5zS3/i8oLOOdjvBstqdEGMTSqsG9zKtUzowr/MircVFssmCV83aqz7qU5M1Ja0ffmXiC a26u8Cx5sOuMQ0RPqSkMWw9HaKAW3wSMB9ti/cBP8nFEk8qn4SE4Aq+1xY9kKzX0pda7 /nXN6eDCzfNEfm0QSojmMeqP5gqy84NR/j6zDeb4IUacx6jQwsFO54zHW0bk0nav5cWm roHA== X-Gm-Message-State: AOAM5336F/OfsO7RW7KeOFyllXpduMVs7C1YDJHS2SkHyXEboQgTCD3X DBULBrLBr/BsRctrybbgPRW1u/4MHVxoAgpA X-Google-Smtp-Source: ABdhPJzPF8x0vsO2KMIq6tweds8e71N+vfF0gomB1/5Lk7CuvNcS7O/BDR4ozvKe0rbwBC338ofKDA== X-Received: by 2002:a63:2a92:: with SMTP id q140mr28328578pgq.412.1634640473900; Tue, 19 Oct 2021 03:47:53 -0700 (PDT) Received: from 470--5GDC--BLR.vvdntech.com ([103.214.233.63]) by smtp.gmail.com with ESMTPSA id g186sm16033951pfb.53.2021.10.19.03.47.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 03:47:53 -0700 (PDT) From: Aman Kumar To: dev@dpdk.org Cc: rasland@nvidia.com, asafp@nvidia.com, shys@nvidia.com, viacheslavo@nvidia.com, akozyrev@nvidia.com, matan@nvidia.com, anatoly.burakov@intel.com, keesang.song@amd.com, aman.kumar@vvdntech.in, jerinjacobk@gmail.com Date: Tue, 19 Oct 2021 16:17:24 +0530 Message-Id: <20211019104724.19416-2-aman.kumar@vvdntech.in> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019104724.19416-1-aman.kumar@vvdntech.in> References: <20210823084411.29592-1-aman.kumar@vvdntech.in> <20211019104724.19416-1-aman.kumar@vvdntech.in> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 2/2] net/mlx5: optimize mprq memcpy for AMD EPYC2 plaform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" add non temporal load and temporal store for mprq memcpy. This utilizes AMD EPYC2 optimized rte_memcpy* routines and only enabled if config/x86/x86_amd_epyc_linux_gcc is build. Signed-off-by: Aman Kumar --- drivers/net/mlx5/mlx5_rx.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h index 2b7ad3e48b..cda6aa02f2 100644 --- a/drivers/net/mlx5/mlx5_rx.h +++ b/drivers/net/mlx5/mlx5_rx.h @@ -422,6 +422,14 @@ mprq_buf_to_pkt(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt, uint32_t len, const uint32_t offset = strd_idx * strd_sz + strd_shift; void *addr = RTE_PTR_ADD(mlx5_mprq_buf_addr(buf, strd_n), offset); +#ifdef RTE_MEMCPY_AMDEPYC + if (len <= rxq->mprq_max_memcpy_len) { + rte_prefetch1(addr); + if (len > RTE_CACHE_LINE_SIZE) + rte_prefetch2((void *)((uintptr_t)addr + + RTE_CACHE_LINE_SIZE)); + } +#endif /* * Memcpy packets to the target mbuf if: * - The size of packet is smaller than mprq_max_memcpy_len. @@ -433,8 +441,19 @@ mprq_buf_to_pkt(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt, uint32_t len, (hdrm_overlap > 0 && !rxq->strd_scatter_en)) { if (likely(len <= (uint32_t)(pkt->buf_len - RTE_PKTMBUF_HEADROOM))) { +#ifdef RTE_MEMCPY_AMDEPYC + uintptr_t data_addr; + + data_addr = (uintptr_t)rte_pktmbuf_mtod(pkt, void *); + if (!((data_addr | (uintptr_t)addr) & ALIGNMENT_MASK)) + rte_memcpy_aligned_tstore16((void *)data_addr, + addr, len); + else + rte_memcpy((void *)data_addr, addr, len); +#else rte_memcpy(rte_pktmbuf_mtod(pkt, void *), addr, len); +#endif DATA_LEN(pkt) = len; } else if (rxq->strd_scatter_en) { struct rte_mbuf *prev = pkt;