From patchwork Wed Oct 13 19:00:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 101494 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0A16AA0C55; Wed, 13 Oct 2021 21:06:09 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7643F4128F; Wed, 13 Oct 2021 21:05:23 +0200 (CEST) Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2060.outbound.protection.outlook.com [40.107.22.60]) by mails.dpdk.org (Postfix) with ESMTP id 4EADA41286 for ; Wed, 13 Oct 2021 21:05:21 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=O5QBw/3bo1Ju6WICmqmMscS2kAJeWnTQz71V0IiDo0JusgBMXt/ZQpm+TEiQ3fyGN5TUE3oEpISepkmu6xxjCGcdJkGP/Cs0zbyyO6vLuDD+4mvcP2w25h762gDDPQvx0QgJVxkkiyKslj3qDe6yqszCI8et4+2mRnCRG5/Dq03VWOfKg8ztqsg7SQRRrP3PJ++eeykKyvwiJU1RbHfOY/1TEHTmZCG6eEdp9/MdRnhqP8LYOuOxc7xNhECndYkDesysGkWcIQQguGxu61RhML4rl2JpZDxOwukNdZH4EARevZSYGa6og5HkFEv03vtUIrJdX/aZCEO0PHQ/l7iFUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=bDzCrvooZf/IECefjBGTAHwjpotedB9NJ8ycBmuYfOA=; b=oCFbbCaN2zNizUi5YXa7LRTiX2zNsGl4CWbnUcLl0Wg+vNinySoITsHirb8A7GeiXb4jokEAP4qBqIwCdbaw3B69LjP9JZERd0sKlt1pnbbCREScE6wULLV48+lUwnwKT6WoOMaLmQ5Jo1hle07CuVPQkt9Vs8u2LNDtwnKeeEuHpPw8Rkb74scOkiv7oxOoT90uwAPZ012pM4OmFvbhW1yNFr94RqU6zv0W6onnqnJXTuI/jdGuTrcU4Z76f/ytrKHcmJ88sAeCw8zrvgyVDfjNt2Xt1w/jlnOayjbVzkzyS8CPunaKz5RMqlmuCuMQACqSUAA8hBFhZAkbtkGgHw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bDzCrvooZf/IECefjBGTAHwjpotedB9NJ8ycBmuYfOA=; b=UtMjTOqMjVqKb/KOmzp8m3cFZx5HbLLfisyFXZlfzWsE8XxnEl1qyGre1FTywFE/MJ6IRQiBlpl4WLp8mH5MAily8Mk0bng1TaqtQbrQRftugOSXUCwmepCnEpW1NfTnyeqIwjDi0QeV/N2iQl6O5CVrx8re4zkOQWtrmjuHaT8= Authentication-Results: dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=none action=none header.from=nxp.com; Received: from DU2PR04MB8630.eurprd04.prod.outlook.com (2603:10a6:10:2dd::15) by DU2PR04MB8870.eurprd04.prod.outlook.com (2603:10a6:10:2e1::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4587.19; Wed, 13 Oct 2021 19:05:20 +0000 Received: from DU2PR04MB8630.eurprd04.prod.outlook.com ([fe80::945d:e362:712d:1b80]) by DU2PR04MB8630.eurprd04.prod.outlook.com ([fe80::945d:e362:712d:1b80%3]) with mapi id 15.20.4587.026; Wed, 13 Oct 2021 19:05:20 +0000 From: Hemant Agrawal To: dev@dpdk.org, gakhil@marvell.com Cc: konstantin.ananyev@intel.com, roy.fan.zhang@intel.com, Gagandeep Singh Date: Thu, 14 Oct 2021 00:30:26 +0530 Message-Id: <20211013190032.2308-10-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211013190032.2308-1-hemant.agrawal@nxp.com> References: <20210907075957.28848-1-hemant.agrawal@nxp.com> <20211013190032.2308-1-hemant.agrawal@nxp.com> X-ClientProxiedBy: SG2PR0302CA0011.apcprd03.prod.outlook.com (2603:1096:3:2::21) To DU2PR04MB8630.eurprd04.prod.outlook.com (2603:10a6:10:2dd::15) MIME-Version: 1.0 Received: from dpdk-xeon.ap.freescale.net (92.120.0.67) by SG2PR0302CA0011.apcprd03.prod.outlook.com (2603:1096:3:2::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4608.4 via Frontend Transport; Wed, 13 Oct 2021 19:05:18 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3896e82a-8b76-4c97-5dd4-08d98e7c66c4 X-MS-TrafficTypeDiagnostic: DU2PR04MB8870: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:534; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0tzSjsbCmaRQMPbvO5e2dV65s/OcrinaUFRjcUOuAj1E+Emb7CiLeJvwcM0Z1NVeKqzaJvhsfgnUf5zqvk13Ro1eW80+AAjQ+rp2J47bD7wKcujJQzN5FNMKo4EXm21T5CxdYC24cVKDgrPEy++oqxEmnfjW7h1T0cwb7Q5WLUg6hFGh09ImT44UndpMftd+V5Ud+i80F9eF1gqRDoyyRyVt9xzkfALptJJxnvZp0sLSTGpCZnc9+s4arC4tmv0/1BHYsRv+qj/pHyid6+pRDBEKosBXoU8wxCiq0eylROegooqXxlCL7lWpOOfBI8vqWNt0WTViM9ZDESEZpw8PCxUyVh3ecTOb0a49odXtVtHHmf04Z+DR+Ur9MsFeAxLCQHdaLwwJ915IJZGmd4REO+kF7IOLBXTKN6U/98CTOMCKzx2MiDydEBETuOw2BM8VyfjaaIlksSCyk8XPVrNgUdtQz75x4rL/4IHlyPNVzn9e3HwgEepkFKNppdCxsQ9/OthIDMYKEH7IH5pNsF/sYT9PjwkGik8IhxadDfLzgRotAwDQXyIZltubf4QwQzoSUt1i1APLoDSDLU1qbeai9JrUTuaUlvS+3fV/iZisS1J5QJQqgW2FF8+rLw80y6mZrihyq0HbEGa8F75pVmkr65nFa+U0rl98//TXW0p5TByeDwZI9eXkS2j00J50sn/d8AY3sN590hg/Bk14zbR9iA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DU2PR04MB8630.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(66946007)(66556008)(316002)(6666004)(6506007)(36756003)(6512007)(2906002)(8936002)(1076003)(52116002)(186003)(4326008)(956004)(66476007)(2616005)(5660300002)(83380400001)(38100700002)(44832011)(38350700002)(8676002)(26005)(6486002)(508600001)(86362001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rQuegkitfMBTsHTulbDJizcBL3cNpEhy6QlsypV0Ue4D+nxvGxe7uCxemr4yyALWDpjjDPdPazbyO9u5iJyYhzPfRFZRowvRLW7JIZO5DMVbYig9kCp0rnJ0X4c8PA8BCLz8PVN0/603gxeI0x1WlcuiueVhHsoBW4ADAy2eell7S2D0Q23mkKzgB6t00gnlwPZ9ShuedUxlTitKqQa4RZj/QTPhCr4tYrFi/+mC4VXNxHXNduesYkohJ6F9KV+tEkOsALoUhiMvP9SHIM/J8NltEa6r/OlnlODo59F2d1s2BS8f4Dj3YcoNPmNug2ZgILs8MtxuF0f74yXJEXy2ETEhEWOpPsk3WRVLqjoStC8KY5XxSxGq3sBVKXHmPud5d+9RAWT4Gw9/BsP85Ew2tBoghQpSAZ2KW4U7/GJ7qkAz7ivhM6Fwi5Gla0lMLh+HaFSnc3H0XQQJrXmDlETIMoBkAIPRg2Ihs53gZ0PxQCIu2Uy4nPO7f5bMuEtwyLusO9Ko0w5b0LcJzOWFcytjqUeeb5uMSX3JGdGyMet3RCJkZc8aFNV4c1ny8Q6MNEzZvgIShOlE+5QTBztbeWrZNEPJLYx5j9VbjzKEHF45+76g2bu8j9i+pRGs4DxT2n2K/L9FDZtvDblruZi6H7n8nL6/IfRJxNN97QSzmJpoANuEyoD1+f+mvaW4XgBeszsdPP5N5V7E5A4Jw96qTuOHwrZVJEkb2NJ3s/bxJ8TjYayTm2aZ1+3WRYeH9qZPGNd1wYVe2UeVaJqo/8ew4Wcf1gbqafKzOkoBkmzVeazl2BLOngScFWpvAJkbrg+Qp4CLGDd5VUZdCLIAVwqSyXh/zZCAaH4MUePB2ScYn9ZrenMBiEmCTTE4sd6uOIlNgwnZnzrRhujQPjZC3ldDN2B6mK0hDWULgTrwmJTzhObxckwRRAwp/1q8i6C7BQFO03s0KYOkaEAG1997NFmC+9EvjdEpG10ZAeNYF1GkLpRHNjVf+s2Y1HcNoQliOQn+smd8pBoO/ucuA+THd8rbL3UF0GgAPowC17jeqiQn22YtRpChcyLaR2PGygkkeIDan0JaaNSo4YRHk79qQp+BcArJYXp2rNk9eoVi4lbQvM8nDQMO3nmoSeAZadXWMWBbvueyHvNcbF0gBldXWGlSdkqMPnwI3If9H2YbFQAvGhkt6fb4LHKutffmSUt9bBchtpTYJArwOtamZXi2HVh3Bah+1kvtaPO5E8XhR2Hx0KShF0wsv9Zp4/E2Fusz+vVXSGOym9FNZ/LIga6Mugg/DM4VzYktTZSgtrkCJW9D4aJPKnecdDMw/YTq+HHTeBFB3F5U X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3896e82a-8b76-4c97-5dd4-08d98e7c66c4 X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8630.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2021 19:05:20.3050 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 8tCL6lrSBWuQ69T3cYQiI77zpfgNSv6UcsY4S4W+th+tKRHTO/UbYZNQ+glEbzXkqJrULIrgzlmKaLgxpIpZtA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8870 Subject: [dpdk-dev] [PATCH v4 09/15] crypto/dpaa2_sec: support OOP with raw buffer API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Gagandeep Singh add support for out of order processing with raw vector APIs. Signed-off-by: Gagandeep Singh --- drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 1 + drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 156 +++++++++++++++----- 2 files changed, 116 insertions(+), 41 deletions(-) diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h index f397b756e8..05bd7c0736 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h @@ -179,6 +179,7 @@ typedef int (*dpaa2_sec_build_fd_t)( typedef int (*dpaa2_sec_build_raw_dp_fd_t)(uint8_t *drv_ctx, struct rte_crypto_sgl *sgl, + struct rte_crypto_sgl *dest_sgl, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *auth_iv, diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c index 5c29c61f9d..4f78cef9c0 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c @@ -24,6 +24,7 @@ struct dpaa2_sec_raw_dp_ctx { static int build_raw_dp_chain_fd(uint8_t *drv_ctx, struct rte_crypto_sgl *sgl, + struct rte_crypto_sgl *dest_sgl, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *auth_iv, @@ -89,17 +90,33 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx, (cipher_len + icv_len) : cipher_len; - /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head); - sge->length = sgl->vec[0].len - ofs.ofs.auth.head; + /* OOP */ + if (dest_sgl) { + /* Configure Output SGE for Encap/Decap */ + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); + DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head; - /* o/p segs */ - for (i = 1; i < sgl->num; i++) { - sge++; - DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); - sge->length = sgl->vec[i].len; + /* o/p segs */ + for (i = 1; i < dest_sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = dest_sgl->vec[i].len; + } + } else { + /* Configure Output SGE for Encap/Decap */ + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); + DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + sge->length = sgl->vec[0].len - ofs.ofs.cipher.head; + + /* o/p segs */ + for (i = 1; i < sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = sgl->vec[i].len; + } } if (sess->dir == DIR_ENC) { @@ -160,6 +177,7 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx, static int build_raw_dp_aead_fd(uint8_t *drv_ctx, struct rte_crypto_sgl *sgl, + struct rte_crypto_sgl *dest_sgl, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *auth_iv, @@ -219,17 +237,33 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx, (aead_len + icv_len) : aead_len; - /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); - sge->length = sgl->vec[0].len - ofs.ofs.cipher.head; + /* OOP */ + if (dest_sgl) { + /* Configure Output SGE for Encap/Decap */ + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); + DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head; - /* o/p segs */ - for (i = 1; i < sgl->num; i++) { - sge++; - DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); - sge->length = sgl->vec[i].len; + /* o/p segs */ + for (i = 1; i < dest_sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = dest_sgl->vec[i].len; + } + } else { + /* Configure Output SGE for Encap/Decap */ + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); + DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + sge->length = sgl->vec[0].len - ofs.ofs.cipher.head; + + /* o/p segs */ + for (i = 1; i < sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = sgl->vec[i].len; + } } if (sess->dir == DIR_ENC) { @@ -294,6 +328,7 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx, static int build_raw_dp_auth_fd(uint8_t *drv_ctx, struct rte_crypto_sgl *sgl, + struct rte_crypto_sgl *dest_sgl, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *auth_iv, @@ -303,6 +338,7 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx, { RTE_SET_USED(iv); RTE_SET_USED(auth_iv); + RTE_SET_USED(dest_sgl); dpaa2_sec_session *sess = ((struct dpaa2_sec_raw_dp_ctx *)drv_ctx)->session; @@ -416,6 +452,7 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx, static int build_raw_dp_proto_fd(uint8_t *drv_ctx, struct rte_crypto_sgl *sgl, + struct rte_crypto_sgl *dest_sgl, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *auth_iv, @@ -466,20 +503,39 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx, DPAA2_SET_FLE_SG_EXT(op_fle); DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge)); - /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); - sge->length = sgl->vec[0].len; - out_len += sge->length; - /* o/p segs */ - for (i = 1; i < sgl->num; i++) { - sge++; - DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); + /* OOP */ + if (dest_sgl) { + /* Configure Output SGE for Encap/Decap */ + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); DPAA2_SET_FLE_OFFSET(sge, 0); - sge->length = sgl->vec[i].len; + sge->length = dest_sgl->vec[0].len; + out_len += sge->length; + /* o/p segs */ + for (i = 1; i < dest_sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = dest_sgl->vec[i].len; + out_len += sge->length; + } + sge->length = dest_sgl->vec[i - 1].tot_len; + + } else { + /* Configure Output SGE for Encap/Decap */ + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = sgl->vec[0].len; out_len += sge->length; + /* o/p segs */ + for (i = 1; i < sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = sgl->vec[i].len; + out_len += sge->length; + } + sge->length = sgl->vec[i - 1].tot_len; } - sge->length = sgl->vec[i - 1].tot_len; out_len += sge->length; DPAA2_SET_FLE_FIN(sge); @@ -528,6 +584,7 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx, static int build_raw_dp_cipher_fd(uint8_t *drv_ctx, struct rte_crypto_sgl *sgl, + struct rte_crypto_sgl *dest_sgl, struct rte_crypto_va_iova_ptr *iv, struct rte_crypto_va_iova_ptr *digest, struct rte_crypto_va_iova_ptr *auth_iv, @@ -593,17 +650,33 @@ build_raw_dp_cipher_fd(uint8_t *drv_ctx, op_fle->length = data_len; DPAA2_SET_FLE_SG_EXT(op_fle); - /* o/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, data_offset); - sge->length = sgl->vec[0].len - data_offset; + /* OOP */ + if (dest_sgl) { + /* o/p 1st seg */ + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); + DPAA2_SET_FLE_OFFSET(sge, data_offset); + sge->length = dest_sgl->vec[0].len - data_offset; - /* o/p segs */ - for (i = 1; i < sgl->num; i++) { - sge++; - DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); - sge->length = sgl->vec[i].len; + /* o/p segs */ + for (i = 1; i < dest_sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = dest_sgl->vec[i].len; + } + } else { + /* o/p 1st seg */ + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); + DPAA2_SET_FLE_OFFSET(sge, data_offset); + sge->length = sgl->vec[0].len - data_offset; + + /* o/p segs */ + for (i = 1; i < sgl->num; i++) { + sge++; + DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); + DPAA2_SET_FLE_OFFSET(sge, 0); + sge->length = sgl->vec[i].len; + } } DPAA2_SET_FLE_FIN(sge); @@ -706,6 +779,7 @@ dpaa2_sec_raw_enqueue_burst(void *qp_data, uint8_t *drv_ctx, memset(&fd_arr[loop], 0, sizeof(struct qbman_fd)); ret = sess->build_raw_dp_fd(drv_ctx, &vec->src_sgl[loop], + &vec->dest_sgl[loop], &vec->iv[loop], &vec->digest[loop], &vec->auth_iv[loop],