From patchwork Fri Oct 8 20:45:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 100842 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C6319A0C47; Fri, 8 Oct 2021 22:45:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AEFAF410DB; Fri, 8 Oct 2021 22:45:48 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 44D02410DB for ; Fri, 8 Oct 2021 22:45:47 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 198G9TeG015338; Fri, 8 Oct 2021 13:45:41 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=Zh8GAYfNF32uMDSTqgD/4nAK4zw21A7x7N6OU7XhRc0=; b=kFnw1VwLAI43xoIeap7SSlr9Wv5yrUHHJLTo0PoBD34/CoHTuaSG+bfCWz/OcI4CD/gm 2OvwVNiYRZBi0XT0rCx6m5jtR+pexsjiWJJem3Ess7YZFbrGRSpr8NvBT71/r5RLG7Cg gvYG+zkNyUzopcuAXjrqIiXKjUHfv0ebcJzn49Ag2e9QKu7Y/OPK/g3YR2061/Y68Ziy eh4xkqQ6a+HDu8wJUky8uUX0kVzxa71Zda9isnug6h5/1GmZLrkoVD51u/xgFlV7JFrV 3xXs24LdjOx1MNqnHKDtoyKK+TGu1aYHBNgW3ExL55n5Jqh4TqwGKOO+oRtLbCPcxE19 6Q== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 3bjs8nrv04-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 08 Oct 2021 13:45:40 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 8 Oct 2021 13:45:39 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 8 Oct 2021 13:45:39 -0700 Received: from localhost.localdomain (unknown [10.28.36.185]) by maili.marvell.com (Postfix) with ESMTP id C3FB73F705D; Fri, 8 Oct 2021 13:45:33 -0700 (PDT) From: Akhil Goyal To: CC: , , , , , , , , , , , , , , , , , , , Akhil Goyal Date: Sat, 9 Oct 2021 02:15:16 +0530 Message-ID: <20211008204516.3497060-3-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211008204516.3497060-1-gakhil@marvell.com> References: <20210731181327.660296-1-gakhil@marvell.com> <20211008204516.3497060-1-gakhil@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 2QOWZBduRB9s2pqTiTzd5_to6enYoD97 X-Proofpoint-ORIG-GUID: 2QOWZBduRB9s2pqTiTzd5_to6enYoD97 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-10-08_06,2021-10-07_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v2 3/3] security: add reserved bitfields X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In struct rte_security_ipsec_sa_options, for every new option added, there is an ABI breakage, to avoid, a reserved_opts bitfield is added to for the remaining bits available in the structure. Now for every new sa option, these reserved_opts can be reduced and new option can be added. Signed-off-by: Akhil Goyal Acked-by: Konstantin Ananyev Acked-by: Ray Kinsella --- v2: rebase and removed libabigail.abignore change. Exception may be added when there is a need for change. lib/security/rte_security.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h index 7eb9f109ae..c0ea13892e 100644 --- a/lib/security/rte_security.h +++ b/lib/security/rte_security.h @@ -258,6 +258,12 @@ struct rte_security_ipsec_sa_options { * PKT_TX_UDP_CKSUM or PKT_TX_L4_MASK in mbuf. */ uint32_t l4_csum_enable : 1; + + /** Reserved bit fields for future extension + * + * Note: reduce number of bits in reserved_opts for every new option + */ + uint32_t reserved_opts : 18; }; /** IPSec security association direction */