diff mbox series

[v2,06/27] common/cnxk: support RoC API to configure bandwidth profile

Message ID 20210927082223.757436-6-skori@marvell.com (mailing list archive)
State Superseded
Delegated to: Jerin Jacob
Headers show
Series [v2,01/27] common/cnxk: update policer MBOX APIs and HW definitions | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Sunil Kumar Kori Sept. 27, 2021, 8:22 a.m. UTC
From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC API to configure HW bandwidth profile for
CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h     | 108 ++++++++++++++
 drivers/common/cnxk/roc_nix_bpf.c | 231 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 340 insertions(+)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index bf451ecdbc..af9bbb659c 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -10,6 +10,54 @@ 
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX	      3
 
+/** NIX rate limits */
+#define MAX_RATE_DIV_EXP  12
+#define MAX_RATE_EXPONENT 0xf
+#define MAX_RATE_MANTISSA 0xff
+
+#define NIX_METER_RATE_CONST 2000000ULL
+
+/* NIX rate calculation in Bits/Sec
+ *	PIR_ADD = ((256 + NIX_*_PIR[RATE_MANTISSA])
+ *		<< NIX_*_PIR[RATE_EXPONENT]) / 256
+ *	PIR = (2E6 * PIR_ADD / (1 << NIX_*_PIR[RATE_DIVIDER_EXPONENT]))
+ *
+ *	CIR_ADD = ((256 + NIX_*_CIR[RATE_MANTISSA])
+ *		<< NIX_*_CIR[RATE_EXPONENT]) / 256
+ *	CIR = (2E6 * CIR_ADD / (CCLK_TICKS << NIX_*_CIR[RATE_DIVIDER_EXPONENT]))
+ */
+#define METER_RATE(exponent, mantissa, div_exp)                                \
+	((NIX_METER_RATE_CONST * ((256 + (mantissa)) << (exponent))) /         \
+	 (((1ull << (div_exp)) * 256)))
+
+/* Meter rate limits in Bits/Sec */
+#define ROC_NIX_BPF_RATE_MIN METER_RATE(0, 0, MAX_RATE_DIV_EXP)
+#define ROC_NIX_BPF_RATE_MAX METER_RATE(MAX_RATE_EXPONENT, MAX_RATE_MANTISSA, 0)
+
+#define ROC_NIX_DEFAULT_ADJUST_MANTISSA 511
+#define ROC_NIX_DEFAULT_ADJUST_EXPONENT 0
+
+/** NIX burst limits */
+#define MAX_BURST_EXPONENT 0xf
+#define MAX_BURST_MANTISSA 0xff
+
+/* NIX burst calculation
+ *	PIR_BURST = ((256 + NIX_*_PIR[BURST_MANTISSA])
+ *		<< (NIX_*_PIR[BURST_EXPONENT] + 1))
+ *			/ 256
+ *
+ *	CIR_BURST = ((256 + NIX_*_CIR[BURST_MANTISSA])
+ *		<< (NIX_*_CIR[BURST_EXPONENT] + 1))
+ *			/ 256
+ */
+#define METER_BURST(exponent, mantissa)                                        \
+	(((256 + (mantissa)) << ((exponent) + 1)) / 256)
+
+/** Meter burst limits */
+#define ROC_NIX_BPF_BURST_MIN METER_BURST(0, 0)
+#define ROC_NIX_BPF_BURST_MAX                                                  \
+	METER_BURST(MAX_BURST_EXPONENT, MAX_BURST_MANTISSA)
+
 enum roc_nix_rss_reta_sz {
 	ROC_NIX_RSS_RETA_SZ_64 = 64,
 	ROC_NIX_RSS_RETA_SZ_128 = 128,
@@ -39,6 +87,62 @@  enum roc_nix_bpf_level_flag {
 	ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+enum roc_nix_bpf_color {
+	ROC_NIX_BPF_COLOR_GREEN,
+	ROC_NIX_BPF_COLOR_YELLOW,
+	ROC_NIX_BPF_COLOR_RED,
+	ROC_NIX_BPF_COLOR_MAX
+};
+
+enum roc_nix_bpf_algo {
+	ROC_NIX_BPF_ALGO_NONE,
+	ROC_NIX_BPF_ALGO_2698,
+	ROC_NIX_BPF_ALGO_4115,
+	ROC_NIX_BPF_ALGO_2697
+};
+
+enum roc_nix_bpf_lmode { ROC_NIX_BPF_LMODE_BYTE, ROC_NIX_BPF_LMODE_PACKET };
+
+enum roc_nix_bpf_action {
+	ROC_NIX_BPF_ACTION_PASS,
+	ROC_NIX_BPF_ACTION_DROP,
+	ROC_NIX_BPF_ACTION_RED
+};
+
+struct roc_nix_bpf_cfg {
+	enum roc_nix_bpf_algo alg;
+	enum roc_nix_bpf_lmode lmode;
+	union {
+		/* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2697. */
+		struct {
+			uint64_t cir;
+			uint64_t cbs;
+			uint64_t ebs;
+		} algo2697;
+
+		/* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2698. */
+		struct {
+			uint64_t cir;
+			uint64_t pir;
+			uint64_t cbs;
+			uint64_t pbs;
+		} algo2698;
+
+		/* Valid when *alg* is set to ROC_NIX_BPF_ALGO_4115. */
+		struct {
+			uint64_t cir;
+			uint64_t eir;
+			uint64_t cbs;
+			uint64_t ebs;
+		} algo4115;
+	};
+
+	enum roc_nix_bpf_action action[ROC_NIX_BPF_COLOR_MAX];
+
+	/* Reserved for future config*/
+	uint32_t rsvd[3];
+};
+
 struct roc_nix_bpf_objs {
 	uint16_t level;
 	uint16_t count;
@@ -499,6 +603,10 @@  int __roc_api roc_nix_bpf_free(struct roc_nix *roc_nix,
 
 int __roc_api roc_nix_bpf_free_all(struct roc_nix *roc_nix);
 
+int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
+				 enum roc_nix_bpf_level_flag lvl_flag,
+				 struct roc_nix_bpf_cfg *cfg);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index 41d31bc6cd..b1a427caaf 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -26,6 +26,103 @@  get_mbox(struct roc_nix *roc_nix)
 	return dev->mbox;
 }
 
+static inline uint64_t
+meter_rate_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p,
+		  uint64_t *div_exp_p)
+{
+	uint64_t div_exp, exponent, mantissa;
+
+	/* Boundary checks */
+	if (value < ROC_NIX_BPF_RATE_MIN || value > ROC_NIX_BPF_RATE_MAX)
+		return 0;
+
+	if (value <= METER_RATE(0, 0, 0)) {
+		/* Calculate rate div_exp and mantissa using
+		 * the following formula:
+		 *
+		 * value = (2E6 * (256 + mantissa)
+		 *              / ((1 << div_exp) * 256))
+		 */
+		div_exp = 0;
+		exponent = 0;
+		mantissa = MAX_RATE_MANTISSA;
+
+		while (value < (NIX_METER_RATE_CONST / (1 << div_exp)))
+			div_exp += 1;
+
+		while (value < ((NIX_METER_RATE_CONST * (256 + mantissa)) /
+				((1 << div_exp) * 256)))
+			mantissa -= 1;
+	} else {
+		/* Calculate rate exponent and mantissa using
+		 * the following formula:
+		 *
+		 * value = (2E6 * ((256 + mantissa) << exponent)) / 256
+		 *
+		 */
+		div_exp = 0;
+		exponent = MAX_RATE_EXPONENT;
+		mantissa = MAX_RATE_MANTISSA;
+
+		while (value < (NIX_METER_RATE_CONST * (1 << exponent)))
+			exponent -= 1;
+
+		while (value < ((NIX_METER_RATE_CONST *
+				 ((256 + mantissa) << exponent)) /
+				256))
+			mantissa -= 1;
+	}
+
+	if (div_exp > MAX_RATE_DIV_EXP || exponent > MAX_RATE_EXPONENT ||
+	    mantissa > MAX_RATE_MANTISSA)
+		return 0;
+
+	if (div_exp_p)
+		*div_exp_p = div_exp;
+	if (exponent_p)
+		*exponent_p = exponent;
+	if (mantissa_p)
+		*mantissa_p = mantissa;
+
+	/* Calculate real rate value */
+	return METER_RATE(exponent, mantissa, div_exp);
+}
+
+static inline uint64_t
+meter_burst_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p)
+{
+	uint64_t exponent, mantissa;
+
+	if (value < ROC_NIX_BPF_BURST_MIN || value > ROC_NIX_BPF_BURST_MAX)
+		return 0;
+
+	/* Calculate burst exponent and mantissa using
+	 * the following formula:
+	 *
+	 * value = (((256 + mantissa) << (exponent + 1)
+	 / 256)
+	 *
+	 */
+	exponent = MAX_BURST_EXPONENT;
+	mantissa = MAX_BURST_MANTISSA;
+
+	while (value < (1ull << (exponent + 1)))
+		exponent -= 1;
+
+	while (value < ((256 + mantissa) << (exponent + 1)) / 256)
+		mantissa -= 1;
+
+	if (exponent > MAX_BURST_EXPONENT || mantissa > MAX_BURST_MANTISSA)
+		return 0;
+
+	if (exponent_p)
+		*exponent_p = exponent;
+	if (mantissa_p)
+		*mantissa_p = mantissa;
+
+	return METER_BURST(exponent, mantissa);
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -210,3 +307,137 @@  roc_nix_bpf_free_all(struct roc_nix *roc_nix)
 	req->free_all = true;
 	return mbox_process(mbox);
 }
+
+int
+roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
+		   enum roc_nix_bpf_level_flag lvl_flag,
+		   struct roc_nix_bpf_cfg *cfg)
+{
+	uint64_t exponent_p = 0, mantissa_p = 0, div_exp_p = 0;
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_req *aq;
+	uint8_t level_idx;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	if (!cfg)
+		return NIX_ERR_PARAM;
+
+	level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+	if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		return NIX_ERR_PARAM;
+
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | id;
+	aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+	aq->op = NIX_AQ_INSTOP_WRITE;
+
+	aq->prof.adjust_exponent = ROC_NIX_DEFAULT_ADJUST_EXPONENT;
+	aq->prof.adjust_mantissa = ROC_NIX_DEFAULT_ADJUST_MANTISSA;
+	if (cfg->lmode == ROC_NIX_BPF_LMODE_BYTE)
+		aq->prof.adjust_mantissa = ROC_NIX_DEFAULT_ADJUST_MANTISSA / 2;
+
+	aq->prof_mask.adjust_exponent = ~(aq->prof_mask.adjust_exponent);
+	aq->prof_mask.adjust_mantissa = ~(aq->prof_mask.adjust_mantissa);
+
+	switch (cfg->alg) {
+	case ROC_NIX_BPF_ALGO_2697:
+		meter_rate_to_nix(cfg->algo2697.cir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.cir_mantissa = mantissa_p;
+		aq->prof.cir_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2697.cbs, &exponent_p, &mantissa_p);
+		aq->prof.cbs_mantissa = mantissa_p;
+		aq->prof.cbs_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2697.ebs, &exponent_p, &mantissa_p);
+		aq->prof.pebs_mantissa = mantissa_p;
+		aq->prof.pebs_exponent = exponent_p;
+
+		aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa);
+		aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa);
+		aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa);
+		aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent);
+		aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent);
+		aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent);
+		break;
+
+	case ROC_NIX_BPF_ALGO_2698:
+		meter_rate_to_nix(cfg->algo2698.cir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.cir_mantissa = mantissa_p;
+		aq->prof.cir_exponent = exponent_p;
+
+		meter_rate_to_nix(cfg->algo2698.pir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.peir_mantissa = mantissa_p;
+		aq->prof.peir_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2698.cbs, &exponent_p, &mantissa_p);
+		aq->prof.cbs_mantissa = mantissa_p;
+		aq->prof.cbs_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2698.pbs, &exponent_p, &mantissa_p);
+		aq->prof.pebs_mantissa = mantissa_p;
+		aq->prof.pebs_exponent = exponent_p;
+
+		aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa);
+		aq->prof_mask.peir_mantissa = ~(aq->prof_mask.peir_mantissa);
+		aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa);
+		aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa);
+		aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent);
+		aq->prof_mask.peir_exponent = ~(aq->prof_mask.peir_exponent);
+		aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent);
+		aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent);
+		break;
+
+	case ROC_NIX_BPF_ALGO_4115:
+		meter_rate_to_nix(cfg->algo4115.cir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.cir_mantissa = mantissa_p;
+		aq->prof.cir_exponent = exponent_p;
+
+		meter_rate_to_nix(cfg->algo4115.eir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.peir_mantissa = mantissa_p;
+		aq->prof.peir_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo4115.cbs, &exponent_p, &mantissa_p);
+		aq->prof.cbs_mantissa = mantissa_p;
+		aq->prof.cbs_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo4115.ebs, &exponent_p, &mantissa_p);
+		aq->prof.pebs_mantissa = mantissa_p;
+		aq->prof.pebs_exponent = exponent_p;
+
+		aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa);
+		aq->prof_mask.peir_mantissa = ~(aq->prof_mask.peir_mantissa);
+		aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa);
+		aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa);
+
+		aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent);
+		aq->prof_mask.peir_exponent = ~(aq->prof_mask.peir_exponent);
+		aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent);
+		aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent);
+		break;
+
+	default:
+		return NIX_ERR_PARAM;
+	}
+
+	aq->prof.lmode = cfg->lmode;
+	aq->prof.gc_action = cfg->action[ROC_NIX_BPF_COLOR_GREEN];
+	aq->prof.yc_action = cfg->action[ROC_NIX_BPF_COLOR_YELLOW];
+	aq->prof.rc_action = cfg->action[ROC_NIX_BPF_COLOR_RED];
+
+	aq->prof_mask.lmode = ~(aq->prof_mask.lmode);
+	aq->prof_mask.gc_action = ~(aq->prof_mask.gc_action);
+	aq->prof_mask.yc_action = ~(aq->prof_mask.yc_action);
+	aq->prof_mask.rc_action = ~(aq->prof_mask.rc_action);
+
+	return mbox_process(mbox);
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index c45d524d65..6a009eaf35 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -78,6 +78,7 @@  INTERNAL {
 	roc_se_auth_key_set;
 	roc_se_ciph_key_set;
 	roc_nix_bpf_alloc;
+	roc_nix_bpf_config;
 	roc_nix_bpf_count_get;
 	roc_nix_bpf_free;
 	roc_nix_bpf_free_all;