From patchwork Mon Sep 27 08:22:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kumar Kori X-Patchwork-Id: 99721 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D61A7A0547; Mon, 27 Sep 2021 10:22:54 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 98F8B410F5; Mon, 27 Sep 2021 10:22:42 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 714DD4003D for ; Mon, 27 Sep 2021 10:22:41 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18QKMvKA019136; Mon, 27 Sep 2021 01:22:39 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=qsW1rm0ZzBWHO9AH0Byc1c2tQgbAL1PPG9jXezyM+X0=; b=bDIRpUZtikKlw8jvDTKwMd1fAGIoisXMCylK0nZjd1arUhRdDVVyQSJMVpy9aVNOOmVl 6JHB6SO/pHnO0e6U0AH10nFR4as/KKWmw5BgIjJORpoSjx8Q97nDh+G8KO0gNy9CW9DO gqU+BfoQgbZaIjL4yokx2njfRLXOZpq2ecRsgdJtsav+2hvPFCxIlvT+doXKcHYyEd2Z Vzk+uVTxL1oaUJBmlyvlBfQ9vlKpff06iTCfH2NtsxifdElLxGs3HgmrjBAlbIwpXl9u 1mvUdP5fzOUkQafoEaNONbH/Pd6yrseydyQSnYff72wyrgyyCAcHaFUVvPAio8/a7WWK 1A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3bavvuhtrk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 27 Sep 2021 01:22:39 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 27 Sep 2021 01:22:37 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 27 Sep 2021 01:22:37 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id 68E6C3F7040; Mon, 27 Sep 2021 01:22:35 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: Date: Mon, 27 Sep 2021 13:52:00 +0530 Message-ID: <20210927082223.757436-4-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210927082223.757436-1-skori@marvell.com> References: <20210927082223.757436-1-skori@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Bj9-lRd6lj3dX_f3Pdhf32fBGbKQhj5f X-Proofpoint-GUID: Bj9-lRd6lj3dX_f3Pdhf32fBGbKQhj5f X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-27_02,2021-09-24_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v2 04/27] common/cnxk: support RoC API to alloc bandwidth profiles X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Implement RoC API to allocate HW resources i.e. bandwidth profiles for policer processing on CN10K platform. Signed-off-by: Sunil Kumar Kori --- v2: - Rebase support on latest DPDK - Handled multilevel chaining for linear hierarchy - Review comments incorporated drivers/common/cnxk/roc_nix.h | 11 ++++ drivers/common/cnxk/roc_nix_bpf.c | 104 ++++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 1 + 3 files changed, 116 insertions(+) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 3d3e169977..b55333a01c 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -6,6 +6,7 @@ #define _ROC_NIX_H_ /* Constants */ +#define ROC_NIX_BPF_PER_PFFUNC 64 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF #define ROC_NIX_BPF_LEVEL_MAX 3 @@ -38,6 +39,12 @@ enum roc_nix_bpf_level_flag { ROC_NIX_BPF_LEVEL_F_TOP = BIT(2), }; +struct roc_nix_bpf_objs { + uint16_t level; + uint16_t count; + uint16_t ids[ROC_NIX_BPF_PER_PFFUNC]; +}; + struct roc_nix_vlan_config { uint32_t type; union { @@ -482,6 +489,10 @@ int __roc_api roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask, uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */); +int __roc_api roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask, + uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX], + struct roc_nix_bpf_objs *profs /* Out */); + uint8_t __roc_api roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag); diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c index af9dffa90c..06394bda07 100644 --- a/drivers/common/cnxk/roc_nix_bpf.c +++ b/drivers/common/cnxk/roc_nix_bpf.c @@ -13,6 +13,19 @@ (ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID | \ ROC_NIX_BPF_LEVEL_F_TOP) +static uint8_t sw_to_hw_lvl_map[] = {NIX_RX_BAND_PROF_LAYER_LEAF, + NIX_RX_BAND_PROF_LAYER_MIDDLE, + NIX_RX_BAND_PROF_LAYER_TOP}; + +static inline struct mbox * +get_mbox(struct roc_nix *roc_nix) +{ + struct nix *nix = roc_nix_to_nix_priv(roc_nix); + struct dev *dev = &nix->dev; + + return dev->mbox; +} + uint8_t roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f) { @@ -66,3 +79,94 @@ roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask, return 0; } + +int +roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask, + uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX], + struct roc_nix_bpf_objs *profs) +{ + uint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK; + struct mbox *mbox = get_mbox(roc_nix); + struct nix_bandprof_alloc_req *req; + struct nix_bandprof_alloc_rsp *rsp; + uint8_t leaf_idx, mid_idx, top_idx; + int rc = -ENOSPC, i; + + if (roc_model_is_cn9k()) + return NIX_ERR_HW_NOTSUP; + + if (!mask) + return NIX_ERR_PARAM; + + leaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF); + mid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID); + top_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP); + + if ((leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) && + (per_lvl_cnt[leaf_idx] > NIX_MAX_BPF_COUNT_LEAF_LAYER)) + return NIX_ERR_INVALID_RANGE; + + if ((mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) && + (per_lvl_cnt[mid_idx] > NIX_MAX_BPF_COUNT_MID_LAYER)) + return NIX_ERR_INVALID_RANGE; + + if ((top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) && + (per_lvl_cnt[top_idx] > NIX_MAX_BPF_COUNT_TOP_LAYER)) + return NIX_ERR_INVALID_RANGE; + + req = mbox_alloc_msg_nix_bandprof_alloc(mbox); + if (req == NULL) + goto exit; + + if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) { + req->prof_count[sw_to_hw_lvl_map[leaf_idx]] = + per_lvl_cnt[leaf_idx]; + } + + if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) { + req->prof_count[sw_to_hw_lvl_map[mid_idx]] = + per_lvl_cnt[mid_idx]; + } + + if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) { + req->prof_count[sw_to_hw_lvl_map[top_idx]] = + per_lvl_cnt[top_idx]; + } + + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + goto exit; + + if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) { + profs[leaf_idx].level = leaf_idx; + profs[leaf_idx].count = + rsp->prof_count[sw_to_hw_lvl_map[leaf_idx]]; + for (i = 0; i < profs[leaf_idx].count; i++) { + profs[leaf_idx].ids[i] = + rsp->prof_idx[sw_to_hw_lvl_map[leaf_idx]][i]; + } + } + + if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) { + profs[mid_idx].level = mid_idx; + profs[mid_idx].count = + rsp->prof_count[sw_to_hw_lvl_map[mid_idx]]; + for (i = 0; i < profs[mid_idx].count; i++) { + profs[mid_idx].ids[i] = + rsp->prof_idx[sw_to_hw_lvl_map[mid_idx]][i]; + } + } + + if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) { + profs[top_idx].level = top_idx; + profs[top_idx].count = + rsp->prof_count[sw_to_hw_lvl_map[top_idx]]; + for (i = 0; i < profs[top_idx].count; i++) { + profs[top_idx].ids[i] = + rsp->prof_idx[sw_to_hw_lvl_map[top_idx]][i]; + } + } + +exit: + return rc; +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 790a32e2e0..81e76919b5 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -77,6 +77,7 @@ INTERNAL { roc_model; roc_se_auth_key_set; roc_se_ciph_key_set; + roc_nix_bpf_alloc; roc_nix_bpf_count_get; roc_nix_bpf_level_to_idx; roc_nix_cq_dump;