From patchwork Mon Sep 27 08:22:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kumar Kori X-Patchwork-Id: 99730 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 19B31A0547; Mon, 27 Sep 2021 10:24:02 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7320F4114A; Mon, 27 Sep 2021 10:23:05 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 340E0410DA for ; Mon, 27 Sep 2021 10:23:03 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18QNq9wD030898; Mon, 27 Sep 2021 01:23:01 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=KT1V7uEfJR2tzSoW8Aqmoc0CSRLvlsJis9so12Q8B34=; b=LYsoDO4KoHjiBWkqiAlpLUjzR4atKV3LL5o0adioTEJx0KORwB2jS/Uz6JBeyPB3UqSr 5JNxMzbP7WTQ6kh5mEn8+kpYFdwjVvRzb+Bg5ISL32hUscVGchcIj+RwjqdMQvfCQ+DO erCE83bk5gpwTmSpRPwb/uzkb+aSPItGkwrWzWq2bUG/5ZcVIRtjE42oBARW5F+9/4CU VDbcGbYFRFOoMU6jDYur2AhsfrSID5+GQoyS/P04FMgevg7ruKDxfi4aKLrXmvzCrzXp NWluGTwjemulkn7XgPL2xyApnjpLLAWmmUX5/r/e/yDK17RoEjqlETPqy4n5EBAC9SnX 7A== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3bavvuhtt3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 27 Sep 2021 01:23:01 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 27 Sep 2021 01:22:58 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 27 Sep 2021 01:22:58 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id 2C9C73F70A0; Mon, 27 Sep 2021 01:22:56 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: Date: Mon, 27 Sep 2021 13:52:09 +0530 Message-ID: <20210927082223.757436-13-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210927082223.757436-1-skori@marvell.com> References: <20210927082223.757436-1-skori@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: GbmQ8DaVuDlzHd4ZxOK9gfuQf6wOljWj X-Proofpoint-GUID: GbmQ8DaVuDlzHd4ZxOK9gfuQf6wOljWj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-27_02,2021-09-24_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v2 13/27] common/cnxk: support RoC API to reset profile stats X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Implement RoC API to reset stats per bandwidth profile or per nixlf. Signed-off-by: Sunil Kumar Kori --- v2: - Rebase support on latest DPDK - Handled multilevel chaining for linear hierarchy - Review comments incorporated drivers/common/cnxk/roc_nix.h | 7 ++ drivers/common/cnxk/roc_nix_bpf.c | 113 ++++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 2 + 3 files changed, 122 insertions(+) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 1ad8a0ca04..c1a561928e 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -661,10 +661,17 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask, enum roc_nix_bpf_level_flag lvl_flag, uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */); +int __roc_api roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id, + uint64_t mask, + enum roc_nix_bpf_level_flag lvl_flag); + int __roc_api roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask, uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */); +int __roc_api roc_nix_bpf_lf_stats_reset(struct roc_nix *roc_nix, + uint64_t mask); + uint8_t __roc_api roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag); diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c index 137d2260bb..220d78ed84 100644 --- a/drivers/common/cnxk/roc_nix_bpf.c +++ b/drivers/common/cnxk/roc_nix_bpf.c @@ -929,6 +929,86 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask, return 0; } +int +roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id, uint64_t mask, + enum roc_nix_bpf_level_flag lvl_flag) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct nix_cn10k_aq_enq_req *aq; + uint8_t level_idx; + + if (roc_model_is_cn9k()) + return NIX_ERR_HW_NOTSUP; + + level_idx = roc_nix_bpf_level_to_idx(lvl_flag); + if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID) + return NIX_ERR_PARAM; + + aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox); + if (aq == NULL) + return -ENOSPC; + aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id); + aq->ctype = NIX_AQ_CTYPE_BAND_PROF; + aq->op = NIX_AQ_INSTOP_WRITE; + + if (mask & ROC_NIX_BPF_GREEN_PKT_F_PASS) { + aq->prof.green_pkt_pass = 0; + aq->prof_mask.green_pkt_pass = ~(aq->prof_mask.green_pkt_pass); + } + if (mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS) { + aq->prof.green_octs_pass = 0; + aq->prof_mask.green_octs_pass = + ~(aq->prof_mask.green_octs_pass); + } + if (mask & ROC_NIX_BPF_GREEN_PKT_F_DROP) { + aq->prof.green_pkt_drop = 0; + aq->prof_mask.green_pkt_drop = ~(aq->prof_mask.green_pkt_drop); + } + if (mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP) { + aq->prof.green_octs_drop = 0; + aq->prof_mask.green_octs_drop = + ~(aq->prof_mask.green_octs_drop); + } + if (mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS) { + aq->prof.yellow_pkt_pass = 0; + aq->prof_mask.yellow_pkt_pass = + ~(aq->prof_mask.yellow_pkt_pass); + } + if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS) { + aq->prof.yellow_octs_pass = 0; + aq->prof_mask.yellow_octs_pass = + ~(aq->prof_mask.yellow_octs_pass); + } + if (mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP) { + aq->prof.yellow_pkt_drop = 0; + aq->prof_mask.yellow_pkt_drop = + ~(aq->prof_mask.yellow_pkt_drop); + } + if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP) { + aq->prof.yellow_octs_drop = 0; + aq->prof_mask.yellow_octs_drop = + ~(aq->prof_mask.yellow_octs_drop); + } + if (mask & ROC_NIX_BPF_RED_PKT_F_PASS) { + aq->prof.red_pkt_pass = 0; + aq->prof_mask.red_pkt_pass = ~(aq->prof_mask.red_pkt_pass); + } + if (mask & ROC_NIX_BPF_RED_OCTS_F_PASS) { + aq->prof.red_octs_pass = 0; + aq->prof_mask.red_octs_pass = ~(aq->prof_mask.red_octs_pass); + } + if (mask & ROC_NIX_BPF_RED_PKT_F_DROP) { + aq->prof.red_pkt_drop = 0; + aq->prof_mask.red_pkt_drop = ~(aq->prof_mask.red_pkt_drop); + } + if (mask & ROC_NIX_BPF_RED_OCTS_F_DROP) { + aq->prof.red_octs_drop = 0; + aq->prof_mask.red_octs_drop = ~(aq->prof_mask.red_octs_drop); + } + + return mbox_process(mbox); +} + int roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask, uint64_t stats[ROC_NIX_BPF_STATS_MAX]) @@ -1026,3 +1106,36 @@ roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask, return 0; } + +int +roc_nix_bpf_lf_stats_reset(struct roc_nix *roc_nix, uint64_t mask) +{ + struct nix *nix = roc_nix_to_nix_priv(roc_nix); + + if (mask & ROC_NIX_BPF_GREEN_PKT_F_PASS) + NIX_RST_STATS(ROC_NIX_BPF_GREEN_PKT_F_PASS); + if (mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS) + NIX_RST_STATS(ROC_NIX_BPF_GREEN_OCTS_F_PASS); + if (mask & ROC_NIX_BPF_GREEN_PKT_F_DROP) + NIX_RST_STATS(ROC_NIX_BPF_GREEN_PKT_F_DROP); + if (mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP) + NIX_RST_STATS(ROC_NIX_BPF_GREEN_OCTS_F_DROP); + if (mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS) + NIX_RST_STATS(ROC_NIX_BPF_YELLOW_PKT_F_PASS); + if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS) + NIX_RST_STATS(ROC_NIX_BPF_YELLOW_OCTS_F_PASS); + if (mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP) + NIX_RST_STATS(ROC_NIX_BPF_YELLOW_PKT_F_DROP); + if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP) + NIX_RST_STATS(ROC_NIX_BPF_YELLOW_OCTS_F_DROP); + if (mask & ROC_NIX_BPF_RED_PKT_F_PASS) + NIX_RST_STATS(ROC_NIX_BPF_RED_PKT_F_PASS); + if (mask & ROC_NIX_BPF_RED_OCTS_F_PASS) + NIX_RST_STATS(ROC_NIX_BPF_RED_OCTS_F_PASS); + if (mask & ROC_NIX_BPF_RED_PKT_F_DROP) + NIX_RST_STATS(ROC_NIX_BPF_RED_PKT_F_DROP); + if (mask & ROC_NIX_BPF_RED_OCTS_F_DROP) + NIX_RST_STATS(ROC_NIX_BPF_RED_OCTS_F_DROP); + + return 0; +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 52e7fa1e89..3b08fb0025 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -87,8 +87,10 @@ INTERNAL { roc_nix_bpf_free_all; roc_nix_bpf_level_to_idx; roc_nix_bpf_lf_stats_read; + roc_nix_bpf_lf_stats_reset; roc_nix_bpf_pre_color_tbl_setup; roc_nix_bpf_stats_read; + roc_nix_bpf_stats_reset; roc_nix_bpf_stats_to_idx; roc_nix_cq_dump; roc_nix_cq_fini;