From patchwork Thu Sep 23 01:49:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alvin Zhang X-Patchwork-Id: 99452 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 24616A0C46; Thu, 23 Sep 2021 03:50:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0EE1541229; Thu, 23 Sep 2021 03:50:03 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 0196541221; Thu, 23 Sep 2021 03:50:00 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10115"; a="210821927" X-IronPort-AV: E=Sophos;i="5.85,315,1624345200"; d="scan'208";a="210821927" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Sep 2021 18:50:00 -0700 X-IronPort-AV: E=Sophos;i="5.85,315,1624345200"; d="scan'208";a="533999708" Received: from shwdenpg235.ccr.corp.intel.com ([10.253.106.22]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Sep 2021 18:49:58 -0700 From: Alvin Zhang To: xiaoyun.li@intel.com, konstantin.ananyev@intel.com Cc: dev@dpdk.org, Alvin Zhang , stable@dpdk.org Date: Thu, 23 Sep 2021 09:49:51 +0800 Message-Id: <20210923014951.12696-2-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210923014951.12696-1-alvinx.zhang@intel.com> References: <20210922024952.11848-1-alvinx.zhang@intel.com> <20210923014951.12696-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v5 2/2] app/testpmd: fix txonly forwording X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When random number of Tx segments is enabled, because the actual number of segments may be only one, the first segment of the Tx packets must accommodate a complete being sending Eth/IP/UDP packet. Besides, if multiple flow is enabled, the forwarding will update the IP and UDP header, these headers shouldn't cross segments. This also requires the first Tx segment can accommodate a complete Eth/IP/UDP packet. In addition, if time stamp is enabled, the forwarding needs more Tx segment space for time stamp information. This patch adds checks in beginning of forward engine to make sure all above conditions are met. Bugzilla ID: 797 Fixes: 79bec05b32b7 ("app/testpmd: add ability to split outgoing packets") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang Acked-by: Xiaoyun Li --- v5: fixes a compilation issue --- app/test-pmd/txonly.c | 67 ++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 55 insertions(+), 12 deletions(-) diff --git a/app/test-pmd/txonly.c b/app/test-pmd/txonly.c index 386a4ff..e7b1b42 100644 --- a/app/test-pmd/txonly.c +++ b/app/test-pmd/txonly.c @@ -40,6 +40,13 @@ #include "testpmd.h" +struct tx_timestamp { + rte_be32_t signature; + rte_be16_t pkt_idx; + rte_be16_t queue_idx; + rte_be64_t ts; +}; + /* use RFC863 Discard Protocol */ uint16_t tx_udp_src_port = 9; uint16_t tx_udp_dst_port = 9; @@ -257,12 +264,7 @@ if (unlikely(timestamp_enable)) { uint64_t skew = RTE_PER_LCORE(timestamp_qskew); - struct { - rte_be32_t signature; - rte_be16_t pkt_idx; - rte_be16_t queue_idx; - rte_be64_t ts; - } timestamp_mark; + struct tx_timestamp timestamp_mark; if (unlikely(timestamp_init_req != RTE_PER_LCORE(timestamp_idone))) { @@ -438,13 +440,23 @@ static int tx_only_begin(portid_t pi) { - uint16_t pkt_data_len; + uint16_t pkt_hdr_len, pkt_data_len; int dynf; - pkt_data_len = (uint16_t) (tx_pkt_length - ( - sizeof(struct rte_ether_hdr) + - sizeof(struct rte_ipv4_hdr) + - sizeof(struct rte_udp_hdr))); + pkt_hdr_len = (uint16_t)(sizeof(struct rte_ether_hdr) + + sizeof(struct rte_ipv4_hdr) + + sizeof(struct rte_udp_hdr)); + pkt_data_len = tx_pkt_length - pkt_hdr_len; + + if ((tx_pkt_split == TX_PKT_SPLIT_RND || txonly_multi_flow) && + tx_pkt_seg_lengths[0] < pkt_hdr_len) { + TESTPMD_LOG(ERR, + "Random segment number or multiple flow enabled," + " but tx_pkt_seg_lengths[0] %u < %u (needed)\n", + tx_pkt_seg_lengths[0], pkt_hdr_len); + return -EINVAL; + } + setup_pkt_udp_ip_headers(&pkt_ip_hdr, &pkt_udp_hdr, pkt_data_len); timestamp_enable = false; @@ -463,8 +475,39 @@ timestamp_mask && timestamp_off >= 0 && !rte_eth_read_clock(pi, ×tamp_initial[pi]); - if (timestamp_enable) + + if (timestamp_enable) { + pkt_hdr_len += sizeof(struct tx_timestamp); + + if (tx_pkt_split == TX_PKT_SPLIT_RND) { + if (tx_pkt_seg_lengths[0] < pkt_hdr_len) { + TESTPMD_LOG(ERR, + "Time stamp and random segment number enabled," + " but tx_pkt_seg_lengths[0] %u < %u (needed)\n", + tx_pkt_seg_lengths[0], pkt_hdr_len); + return -EINVAL; + } + } else { + uint16_t total = 0; + uint8_t i; + + for (i = 0; i < tx_pkt_nb_segs; i++) { + total += tx_pkt_seg_lengths[i]; + if (total >= pkt_hdr_len) + break; + } + + if (total < pkt_hdr_len) { + TESTPMD_LOG(ERR, + "No enough Tx segment space for time stamp info." + " total %u < %u (needed)\n", + total, pkt_hdr_len); + return -EINVAL; + } + } timestamp_init_req++; + } + /* Make sure all settings are visible on forwarding cores.*/ rte_wmb(); return 0;