diff mbox series

[04/27] common/cnxk: support RoC API to alloc bandwidth profiles

Message ID 20210906075450.1452123-4-skori@marvell.com (mailing list archive)
State Superseded
Delegated to: Jerin Jacob
Headers show
Series [01/27] common/cnxk: update policer MBOX APIs and HW definitions | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Sunil Kumar Kori Sept. 6, 2021, 7:54 a.m. UTC
From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC API to allocate HW resources i.e. bandwidth
profiles for policer processing on CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |  11 ++++
 drivers/common/cnxk/roc_nix_bpf.c | 104 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 116 insertions(+)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index e96328005e..2ce3ebbb5f 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -6,6 +6,7 @@ 
 #define _ROC_NIX_H_
 
 /* Constants */
+#define ROC_NIX_BPF_PER_PFFUNC	      64
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX	      3
 
@@ -38,6 +39,12 @@  enum roc_nix_bpf_level_flag {
 	ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+struct roc_nix_bpf_objs {
+	uint16_t level;
+	uint16_t count;
+	uint16_t ids[ROC_NIX_BPF_PER_PFFUNC];
+};
+
 struct roc_nix_vlan_config {
 	uint32_t type;
 	union {
@@ -478,6 +485,10 @@  int __roc_api
 roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
 		      uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */);
 
+int __roc_api roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
+				uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
+				struct roc_nix_bpf_objs *profs /* Out */);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index af9dffa90c..06394bda07 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -13,6 +13,19 @@ 
 	(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |                  \
 	 ROC_NIX_BPF_LEVEL_F_TOP)
 
+static uint8_t sw_to_hw_lvl_map[] = {NIX_RX_BAND_PROF_LAYER_LEAF,
+				     NIX_RX_BAND_PROF_LAYER_MIDDLE,
+				     NIX_RX_BAND_PROF_LAYER_TOP};
+
+static inline struct mbox *
+get_mbox(struct roc_nix *roc_nix)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct dev *dev = &nix->dev;
+
+	return dev->mbox;
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -66,3 +79,94 @@  roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
 
 	return 0;
 }
+
+int
+roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
+		  uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
+		  struct roc_nix_bpf_objs *profs)
+{
+	uint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK;
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_bandprof_alloc_req *req;
+	struct nix_bandprof_alloc_rsp *rsp;
+	uint8_t leaf_idx, mid_idx, top_idx;
+	int rc = -ENOSPC, i;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	if (!mask)
+		return NIX_ERR_PARAM;
+
+	leaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF);
+	mid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID);
+	top_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP);
+
+	if ((leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+	    (per_lvl_cnt[leaf_idx] > NIX_MAX_BPF_COUNT_LEAF_LAYER))
+		return NIX_ERR_INVALID_RANGE;
+
+	if ((mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+	    (per_lvl_cnt[mid_idx] > NIX_MAX_BPF_COUNT_MID_LAYER))
+		return NIX_ERR_INVALID_RANGE;
+
+	if ((top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+	    (per_lvl_cnt[top_idx] > NIX_MAX_BPF_COUNT_TOP_LAYER))
+		return NIX_ERR_INVALID_RANGE;
+
+	req = mbox_alloc_msg_nix_bandprof_alloc(mbox);
+	if (req == NULL)
+		goto exit;
+
+	if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		req->prof_count[sw_to_hw_lvl_map[leaf_idx]] =
+			per_lvl_cnt[leaf_idx];
+	}
+
+	if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		req->prof_count[sw_to_hw_lvl_map[mid_idx]] =
+			per_lvl_cnt[mid_idx];
+	}
+
+	if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		req->prof_count[sw_to_hw_lvl_map[top_idx]] =
+			per_lvl_cnt[top_idx];
+	}
+
+	rc = mbox_process_msg(mbox, (void *)&rsp);
+	if (rc)
+		goto exit;
+
+	if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		profs[leaf_idx].level = leaf_idx;
+		profs[leaf_idx].count =
+			rsp->prof_count[sw_to_hw_lvl_map[leaf_idx]];
+		for (i = 0; i < profs[leaf_idx].count; i++) {
+			profs[leaf_idx].ids[i] =
+				rsp->prof_idx[sw_to_hw_lvl_map[leaf_idx]][i];
+		}
+	}
+
+	if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		profs[mid_idx].level = mid_idx;
+		profs[mid_idx].count =
+			rsp->prof_count[sw_to_hw_lvl_map[mid_idx]];
+		for (i = 0; i < profs[mid_idx].count; i++) {
+			profs[mid_idx].ids[i] =
+				rsp->prof_idx[sw_to_hw_lvl_map[mid_idx]][i];
+		}
+	}
+
+	if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		profs[top_idx].level = top_idx;
+		profs[top_idx].count =
+			rsp->prof_count[sw_to_hw_lvl_map[top_idx]];
+		for (i = 0; i < profs[top_idx].count; i++) {
+			profs[top_idx].ids[i] =
+				rsp->prof_idx[sw_to_hw_lvl_map[top_idx]][i];
+		}
+	}
+
+exit:
+	return rc;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 7cae7dfc74..b7e1d4e8c8 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -74,6 +74,7 @@  INTERNAL {
 	roc_model;
 	roc_se_auth_key_set;
 	roc_se_ciph_key_set;
+	roc_nix_bpf_alloc;
 	roc_nix_bpf_count_get;
 	roc_nix_bpf_level_to_idx;
 	roc_nix_cq_dump;