From patchwork Mon Sep 6 07:54:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kumar Kori X-Patchwork-Id: 98047 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F2A3DA0C4D; Mon, 6 Sep 2021 09:55:55 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0023D4114F; Mon, 6 Sep 2021 09:55:24 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id DD12541104 for ; Mon, 6 Sep 2021 09:55:22 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 185N0bE1022892; Mon, 6 Sep 2021 00:55:21 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=uw3ScSemxvcmtSt38cOX0l8RkyfBbToOeMbltEcoHFc=; b=dkdOjJqAUpWLpD1ZUTX2z4sv3SBcoKx6189ps2VEjeW84gOBMZaXXO1Yi1MrjHXH2UMH eIVoz+Fg5Q1XLHEETK+hhLay+WZmdioKH1DwAlOFHjK1ryza2g+KlGinoBrskNEFgTL5 zX9PrepSrQ2QEaT1GXhJPDYY7mGs/z64BmsR/HhJSGfD71RSZgszrWLXr2fd+2KIGd3b MH4p2EH6CMgSWHCR2a7Pu0eVplAfaVf2J6lBICaCYI4raF4ebDE2txQYZ4Nq6a4c7Ztd OWhMcNPolMPqfxE9nFflsSvsxy8QJnNeZ/cq/hdz2Ct+78NZ+b8YXotR7OkiTiSv/UeI 4g== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3aw2sp1sm9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 06 Sep 2021 00:55:20 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 6 Sep 2021 00:55:19 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 6 Sep 2021 00:55:19 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id 3E91B3F70AE; Mon, 6 Sep 2021 00:55:17 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: Date: Mon, 6 Sep 2021 13:24:33 +0530 Message-ID: <20210906075450.1452123-10-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210906075450.1452123-1-skori@marvell.com> References: <20210906075450.1452123-1-skori@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: h2TgBq7NEZJRwaUE6XXwRROQtjIAqDPj X-Proofpoint-ORIG-GUID: h2TgBq7NEZJRwaUE6XXwRROQtjIAqDPj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-06_02,2021-09-03_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 10/27] common/cnxk: support RoC API to connect bandwidth profiles X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori To maintain chain of bandwidth profiles, they needs to be connected. Implement RoC API to connect two bandwidth profiles at different levels. Signed-off-by: Sunil Kumar Kori --- drivers/common/cnxk/roc_nix.h | 6 ++++++ drivers/common/cnxk/roc_nix_bpf.c | 36 +++++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 1 + 3 files changed, 43 insertions(+) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 36f6a35c50..08795cd76a 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -7,6 +7,7 @@ /* Constants */ #define ROC_NIX_BPF_PER_PFFUNC 64 +#define ROC_NIX_BPF_ID_INVALID 0xFFFF #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF #define ROC_NIX_BPF_LEVEL_MAX 3 @@ -630,6 +631,11 @@ int __roc_api roc_nix_bpf_pre_color_tbl_setup( struct roc_nix *roc_nix, uint16_t id, enum roc_nix_bpf_level_flag lvl_flag, struct roc_nix_bpf_precolor *tbl); +/* Use ROC_NIX_BPF_ID_INVALID as dst_id to disconnect */ +int __roc_api roc_nix_bpf_connect(struct roc_nix *roc_nix, + enum roc_nix_bpf_level_flag lvl_flag, + uint16_t src_id, uint16_t dst_id); + uint8_t __roc_api roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag); diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c index aae6f0ec77..e75440dc6f 100644 --- a/drivers/common/cnxk/roc_nix_bpf.c +++ b/drivers/common/cnxk/roc_nix_bpf.c @@ -743,3 +743,39 @@ roc_nix_bpf_pre_color_tbl_setup(struct roc_nix *roc_nix, uint16_t id, exit: return rc; } + +int +roc_nix_bpf_connect(struct roc_nix *roc_nix, + enum roc_nix_bpf_level_flag lvl_flag, uint16_t src_id, + uint16_t dst_id) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct nix_cn10k_aq_enq_req *aq; + uint8_t level_idx; + + if (roc_model_is_cn9k()) + return NIX_ERR_HW_NOTSUP; + + level_idx = roc_nix_bpf_level_to_idx(lvl_flag); + if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID) + return NIX_ERR_PARAM; + + aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox); + if (aq == NULL) + return -ENOSPC; + aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | src_id; + aq->ctype = NIX_AQ_CTYPE_BAND_PROF; + aq->op = NIX_AQ_INSTOP_WRITE; + + if (dst_id == ROC_NIX_BPF_ID_INVALID) { + aq->prof.hl_en = false; + aq->prof_mask.hl_en = ~(aq->prof_mask.hl_en); + } else { + aq->prof.hl_en = true; + aq->prof.band_prof_id = dst_id; + aq->prof_mask.hl_en = ~(aq->prof_mask.hl_en); + aq->prof_mask.band_prof_id = ~(aq->prof_mask.band_prof_id); + } + + return mbox_process(mbox); +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 984c239766..ef60615446 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -76,6 +76,7 @@ INTERNAL { roc_se_ciph_key_set; roc_nix_bpf_alloc; roc_nix_bpf_config; + roc_nix_bpf_connect; roc_nix_bpf_count_get; roc_nix_bpf_dump; roc_nix_bpf_ena_dis;