diff mbox series

[2/3] net/bnxt: check FW capability for VLAN offloads

Message ID 20210823081214.9725-3-kalesh-anakkur.purayil@broadcom.com (mailing list archive)
State Accepted, archived
Delegated to: Ajit Khaparde
Headers show
Series bnxt fixes | expand

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Kalesh Anakkur Purayil Aug. 23, 2021, 8:12 a.m. UTC
From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>

VLAN offload capability may be disabled in the FW. The driver
should not attempt to override or utilize this feature in such
scenarios since it will not work as expected.

Fixes: 0a6d2a720078 ("net/bnxt: get device infos")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt.h        | 6 +++---
 drivers/net/bnxt/bnxt_ethdev.c | 4 ++++
 drivers/net/bnxt/bnxt_hwrm.c   | 9 +++++++++
 3 files changed, 16 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 494a1ef..3ccc06c 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -577,8 +577,7 @@  struct bnxt_rep_info {
 	ETH_RSS_NONFRAG_IPV6_UDP |	\
 	ETH_RSS_LEVEL_MASK)
 
-#define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
-				     DEV_TX_OFFLOAD_IPV4_CKSUM | \
+#define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_IPV4_CKSUM | \
 				     DEV_TX_OFFLOAD_TCP_CKSUM | \
 				     DEV_TX_OFFLOAD_UDP_CKSUM | \
 				     DEV_TX_OFFLOAD_TCP_TSO | \
@@ -591,7 +590,6 @@  struct bnxt_rep_info {
 				     DEV_TX_OFFLOAD_MULTI_SEGS)
 
 #define BNXT_DEV_RX_OFFLOAD_SUPPORT (DEV_RX_OFFLOAD_VLAN_FILTER | \
-				     DEV_RX_OFFLOAD_VLAN_STRIP | \
 				     DEV_RX_OFFLOAD_IPV4_CKSUM | \
 				     DEV_RX_OFFLOAD_UDP_CKSUM | \
 				     DEV_RX_OFFLOAD_TCP_CKSUM | \
@@ -737,6 +735,7 @@  struct bnxt {
 #define BNXT_FW_CAP_ADV_FLOW_COUNTERS	BIT(6)
 #define BNXT_FW_CAP_LINK_ADMIN		BIT(7)
 #define BNXT_FW_CAP_TRUFLOW_EN		BIT(8)
+#define BNXT_FW_CAP_VLAN_TX_INSERT	BIT(9)
 #define BNXT_TRUFLOW_EN(bp)	((bp)->fw_cap & BNXT_FW_CAP_TRUFLOW_EN)
 
 	pthread_mutex_t         flow_lock;
@@ -745,6 +744,7 @@  struct bnxt {
 #define BNXT_VNIC_CAP_COS_CLASSIFY	BIT(0)
 #define BNXT_VNIC_CAP_OUTER_RSS		BIT(1)
 #define BNXT_VNIC_CAP_RX_CMPL_V2	BIT(2)
+#define BNXT_VNIC_CAP_VLAN_RX_STRIP	BIT(3)
 	unsigned int		rx_nr_rings;
 	unsigned int		rx_cp_nr_rings;
 	unsigned int		rx_num_qs_per_vnic;
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index de34a2f..e072771 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -981,9 +981,13 @@  static int bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 	dev_info->rx_offload_capa = BNXT_DEV_RX_OFFLOAD_SUPPORT;
 	if (bp->flags & BNXT_FLAG_PTP_SUPPORTED)
 		dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP;
+	if (bp->vnic_cap_flags & BNXT_VNIC_CAP_VLAN_RX_STRIP)
+		dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_VLAN_STRIP;
 	dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
 	dev_info->tx_offload_capa = BNXT_DEV_TX_OFFLOAD_SUPPORT |
 				    dev_info->tx_queue_offload_capa;
+	if (bp->fw_cap & BNXT_FW_CAP_VLAN_TX_INSERT)
+		dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
 	dev_info->flow_type_rss_offloads = BNXT_ETH_RSS_SUPPORT;
 
 	dev_info->speed_capa = bnxt_get_speed_capabilities(bp);
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 73deb41..d641d70 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -941,6 +941,10 @@  static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
 	if (flags & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_LINK_ADMIN_STATUS_SUPPORTED)
 		bp->fw_cap |= BNXT_FW_CAP_LINK_ADMIN;
 
+	if (!(flags & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VLAN_ACCELERATION_TX_DISABLED)) {
+		bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT;
+		PMD_DRV_LOG(DEBUG, "VLAN acceleration for TX is enabled\n");
+	}
 unlock:
 	HWRM_UNLOCK();
 
@@ -1001,6 +1005,11 @@  int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)
 	if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_RX_CMPL_V2_CAP)
 		bp->vnic_cap_flags |= BNXT_VNIC_CAP_RX_CMPL_V2;
 
+	if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_VLAN_STRIP_CAP) {
+		bp->vnic_cap_flags |= BNXT_VNIC_CAP_VLAN_RX_STRIP;
+		PMD_DRV_LOG(DEBUG, "Rx VLAN strip capability enabled\n");
+	}
+
 	bp->max_tpa_v2 = rte_le_to_cpu_16(resp->max_aggs_supported);
 
 	HWRM_UNLOCK();