From patchwork Tue Aug 10 02:51:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 96744 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F14D1A0C54; Tue, 10 Aug 2021 04:49:09 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 06E6341171; Tue, 10 Aug 2021 04:48:47 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id A841741121 for ; Tue, 10 Aug 2021 04:48:45 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10070"; a="214808416" X-IronPort-AV: E=Sophos;i="5.84,309,1620716400"; d="scan'208";a="214808416" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Aug 2021 19:48:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,309,1620716400"; d="scan'208";a="483823559" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 09 Aug 2021 19:48:43 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang , Vignesh Sridhar Date: Tue, 10 Aug 2021 10:51:17 +0800 Message-Id: <20210810025140.1698163-6-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210810025140.1698163-1-qi.z.zhang@intel.com> References: <20210810025140.1698163-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 05/28] net/ice/base: add timestamp masks X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Adding macros for shift and masking of the lower timestamp work in the Rx flex descriptor. The LSB of the timestamp-low word indicates the validity of the timestamp while the rest 7 bits contain the timestamp. Signed-off-by: Vignesh Sridhar Signed-off-by: Qi Zhang Acked-by: Junfeng Guo --- drivers/net/ice/base/ice_lan_tx_rx.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index 696c6a30ae..4255e9963e 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -879,6 +879,14 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; +/* For ice_32b_rx_flex_desc.ts_low: + * [0]: Timestamp-low validity bit + * [1:7]: Timestamp-low value + */ +#define ICE_RX_FLEX_DESC_TS_L_VALID_S 0x01 +#define ICE_RX_FLEX_DESC_TS_L_VALID_M ICE_RX_FLEX_DESC_TS_L_VALID_S +#define ICE_RX_FLEX_DESC_TS_L_M 0xFE + #define ICE_RXQ_CTX_SIZE_DWORDS 8 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22