diff mbox series

4/6] eal/x86: support register dump for oops

Message ID 20210730084938.2426128-5-jerinj@marvell.com (mailing list archive)
State Superseded
Delegated to: Thomas Monjalon
Headers show
Series 4/6] eal/x86: support register dump for oops | expand

Checks

Context Check Description
ci/Intel-compilation warning apply issues
ci/checkpatch success coding style OK

Commit Message

Jerin Jacob Kollanukkaran July 30, 2021, 8:49 a.m. UTC
From: Jerin Jacob <jerinj@marvell.com>

Dump the x86 arch state register in oops
handling routine.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
---
 lib/eal/unix/eal_oops.c | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
diff mbox series

Patch

diff --git a/lib/eal/unix/eal_oops.c b/lib/eal/unix/eal_oops.c
index 118b236f35..da71481ade 100644
--- a/lib/eal/unix/eal_oops.c
+++ b/lib/eal/unix/eal_oops.c
@@ -132,6 +132,38 @@  stack_code_dump(void *stack, void *code)
 	mem32_dump(code);
 	oops_print("\n");
 }
+
+#if defined(RTE_ARCH_X86_64) && defined(RTE_EXEC_ENV_LINUX)
+static void
+archinfo_dump(ucontext_t *uc)
+{
+
+	mcontext_t *mc = &uc->uc_mcontext;
+
+	oops_print("R8 : 0x%.16llx  ", mc->gregs[REG_R8]);
+	oops_print("R9 : 0x%.16llx\n", mc->gregs[REG_R9]);
+	oops_print("R10: 0x%.16llx  ", mc->gregs[REG_R10]);
+	oops_print("R11: 0x%.16llx\n", mc->gregs[REG_R11]);
+	oops_print("R12: 0x%.16llx  ", mc->gregs[REG_R12]);
+	oops_print("R13: 0x%.16llx\n", mc->gregs[REG_R13]);
+	oops_print("R14: 0x%.16llx  ", mc->gregs[REG_R14]);
+	oops_print("R15: 0x%.16llx\n", mc->gregs[REG_R15]);
+	oops_print("RAX: 0x%.16llx  ", mc->gregs[REG_RAX]);
+	oops_print("RBX: 0x%.16llx\n", mc->gregs[REG_RBX]);
+	oops_print("RCX: 0x%.16llx  ", mc->gregs[REG_RCX]);
+	oops_print("RDX: 0x%.16llx\n", mc->gregs[REG_RDX]);
+	oops_print("RBP: 0x%.16llx  ", mc->gregs[REG_RBP]);
+	oops_print("RSP: 0x%.16llx\n", mc->gregs[REG_RSP]);
+	oops_print("RSI: 0x%.16llx  ", mc->gregs[REG_RSI]);
+	oops_print("RDI: 0x%.16llx\n", mc->gregs[REG_RDI]);
+	oops_print("RIP: 0x%.16llx  ", mc->gregs[REG_RIP]);
+	oops_print("EFL: 0x%.16llx\n", mc->gregs[REG_EFL]);
+
+	stack_code_dump((void *)mc->gregs[REG_RSP], (void *)mc->gregs[REG_RIP]);
+}
+
+#else
+
 static void
 archinfo_dump(ucontext_t *uc)
 {
@@ -140,6 +172,8 @@  archinfo_dump(ucontext_t *uc)
 	stack_code_dump(NULL, NULL);
 }
 
+#endif
+
 static void
 default_signal_handler_invoke(int sig)
 {