From patchwork Thu Jul 15 13:53:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 95885 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C5127A0A0C; Thu, 15 Jul 2021 15:53:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 510A741244; Thu, 15 Jul 2021 15:53:51 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 2120D4122E for ; Thu, 15 Jul 2021 15:53:48 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 16FDpY9K022886; Thu, 15 Jul 2021 06:53:45 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=ZJwq4SsjjD8NgTUpjjWLuOWmMrodLajQa35IxUliFpo=; b=KbsPFRw8Fwg4lrN/HrUzt9JS8z3hc4MhQbfxrEEtL2dDrTa8J4RaWKNHF4JPBdIea1p3 SDcLQFJRLJd+o8S0AFUez87nO/k5C2e+UukNyI7y6AVUzB+mIIkAVnNhn5Nm4b0VlEc6 N81j/iN21IBuZXm6f8NJHCbmsbrqAnXS+0st/3bW4kyjRKI2lbpOzmk6s2nmVRFn2ShZ k7l3f7LSh4uXV85F71wXKwp/OuWcmcQkD2EuzBHdl7PupolkV4VNUpDNbBJZF0dHN9V+ JB1RRmFccGotA6/w41HRewbvyhlgkydhRdeJpdsCU1hu37uZ4hB6BNGfZk2I8dvAffuK Mg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 39t95sjknw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 15 Jul 2021 06:53:45 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 15 Jul 2021 06:53:42 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 15 Jul 2021 06:53:42 -0700 Received: from localhost.localdomain (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id AF2363F707E; Thu, 15 Jul 2021 06:53:40 -0700 (PDT) From: Tomasz Duszynski To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: , Tomasz Duszynski Date: Thu, 15 Jul 2021 08:53:28 -0500 Message-ID: <20210715135330.2541009-3-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210715135330.2541009-1-tduszynski@marvell.com> References: <20210715135330.2541009-1-tduszynski@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: TOlwn3CSq0MkGvQXTEGi0we8qwGnYNJ- X-Proofpoint-ORIG-GUID: TOlwn3CSq0MkGvQXTEGi0we8qwGnYNJ- X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-15_07:2021-07-14, 2021-07-15 signatures=0 Subject: [dpdk-dev] [PATCH 2/4] common/cnxk: support setting BPHY CGX/RPM FEC X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for setting FEC for a given LMAC. Signed-off-by: Tomasz Duszynski --- drivers/common/cnxk/roc_bphy_cgx.c | 18 ++++++++++++++++++ drivers/common/cnxk/roc_bphy_cgx.h | 3 +++ drivers/common/cnxk/roc_bphy_cgx_priv.h | 4 ++++ drivers/common/cnxk/version.map | 1 + 4 files changed, 26 insertions(+) diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c index 467b67686b..9e53fe238e 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.c +++ b/drivers/common/cnxk/roc_bphy_cgx.c @@ -396,6 +396,24 @@ roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac) return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false); } +int +roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, + enum roc_bphy_cgx_eth_link_fec fec) +{ + uint64_t scr1, scr0; + + if (!roc_cgx) + return -EINVAL; + + if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac)) + return -EINVAL; + + scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_SET_FEC) | + FIELD_PREP(SCR1_ETH_SET_FEC_ARGS, fec); + + return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0); +} + int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, enum roc_bphy_cgx_eth_link_fec *fec) diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h index 9439f88b34..d522d4e202 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.h +++ b/drivers/common/cnxk/roc_bphy_cgx.h @@ -115,6 +115,9 @@ __roc_api int roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac); __roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac); +__roc_api int roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx, + unsigned int lmac, + enum roc_bphy_cgx_eth_link_fec fec); __roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, enum roc_bphy_cgx_eth_link_fec *fec); diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h index 93aa43ef5a..e45a13ef09 100644 --- a/drivers/common/cnxk/roc_bphy_cgx_priv.h +++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h @@ -67,6 +67,7 @@ enum eth_cmd_id { ETH_CMD_MODE_CHANGE = 11, /* hot plug support */ ETH_CMD_INTF_SHUTDOWN = 12, ETH_CMD_GET_SUPPORTED_FEC = 18, + ETH_CMD_SET_FEC = 19, ETH_CMD_SET_PTP_MODE = 34, }; @@ -130,6 +131,9 @@ enum eth_cmd_own { #define SCR1_ETH_MODE_CHANGE_ARGS_PORT GENMASK_ULL(21, 14) #define SCR1_ETH_MODE_CHANGE_ARGS_MODE GENMASK_ULL(63, 22) +/* struct eth_set_fec_args */ +#define SCR1_ETH_SET_FEC_ARGS GENMASK_ULL(9, 8) + #define SCR1_OWN_STATUS GENMASK_ULL(1, 0) #endif /* _ROC_BPHY_CGX_PRIV_H_ */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 3b9b283b6e..738c77eaed 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -24,6 +24,7 @@ INTERNAL { roc_ae_fpm_put; roc_bphy_cgx_dev_fini; roc_bphy_cgx_dev_init; + roc_bphy_cgx_fec_set; roc_bphy_cgx_fec_supported_get; roc_bphy_cgx_get_linkinfo; roc_bphy_cgx_intlbk_disable;