diff mbox series

[v2] crypto/aesni_gcm: fix performance issue

Message ID 20210629151907.28734-1-kai.ji@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series [v2] crypto/aesni_gcm: fix performance issue |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot success github build: passed
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-testing success Testing PASS
ci/iol-mellanox-Functional fail Functional Testing issues
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-intel-Performance fail Performance Testing issues
ci/iol-abi-testing success Testing PASS

Commit Message

Ji, Kai June 29, 2021, 3:19 p.m. UTC 
  This patch fixes the aesni_gcm performance issue on systems with AVX512
CPU flag presented but with VAES CPU flag missing, such as Skylake.

Fixes: 81fe96a0cece ("crypto/aesni_gcm: use architecture independent API")
Cc: pablo.de.lara.guarch@intel.com

Signed-off-by: Kai Ji <kai.ji@intel.com>
---
v2: Checkpatch fix

 drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

Comments

Fan Zhang June 29, 2021, 3:25 p.m. UTC | #1 
> -----Original Message-----
> From: Ji, Kai <kai.ji@intel.com>
> Sent: Tuesday, June 29, 2021 4:19 PM
> To: dev@dpdk.org
> Cc: Zhang, Roy Fan <roy.fan.zhang@intel.com>; Ji, Kai <kai.ji@intel.com>; De
> Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>
> Subject: [dpdk-dev v2] crypto/aesni_gcm: fix performance issue
> 
> This patch fixes the aesni_gcm performance issue on systems with AVX512
> CPU flag presented but with VAES CPU flag missing, such as Skylake.
> 
> Fixes: 81fe96a0cece ("crypto/aesni_gcm: use architecture independent API")
> Cc: pablo.de.lara.guarch@intel.com
> 
> Signed-off-by: Kai Ji <kai.ji@intel.com>

Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Akhil Goyal July 7, 2021, 1:36 p.m. UTC | #2 
> >
> > This patch fixes the aesni_gcm performance issue on systems with AVX512
> > CPU flag presented but with VAES CPU flag missing, such as Skylake.
> >
> > Fixes: 81fe96a0cece ("crypto/aesni_gcm: use architecture independent
> API")
> > Cc: pablo.de.lara.guarch@intel.com
> >
> > Signed-off-by: Kai Ji <kai.ji@intel.com>
> 
> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>

Applied to dpdk-next-crypto

Thanks
diff mbox series

Patch

diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index bc87e44a9d..886e2a5aaa 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -842,8 +842,14 @@  aesni_gcm_create(const char *name,
 		init_mb_mgr_avx2(mb_mgr);
 		break;
 	case RTE_AESNI_GCM_AVX512:
-		dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512;
-		init_mb_mgr_avx512(mb_mgr);
+		if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_VAES)) {
+			dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512;
+			init_mb_mgr_avx512(mb_mgr);
+		} else {
+			dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
+			init_mb_mgr_avx2(mb_mgr);
+			vector_mode = RTE_AESNI_GCM_AVX2;
+		}
 		break;
 	default:
 		AESNI_GCM_LOG(ERR, "Unsupported vector mode %u\n", vector_mode);