From patchwork Mon Jun 21 15:04:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 94650 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 667F1A0547; Mon, 21 Jun 2021 17:08:00 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2224F4121B; Mon, 21 Jun 2021 17:06:11 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8DC7B4123C for ; Mon, 21 Jun 2021 17:06:09 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15LF5HTE008514; Mon, 21 Jun 2021 08:06:08 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=F/XLZVEolZNKcLfjPFimpy0cZ4LpfVT3NYBPNVj5uYY=; b=hQRaDNw+6KWqkIAIwJDjz8o069aKiffLYkY9gF8UUH/fxiQ1TTWa0f/g7rtoZux2w7tE 71/nIGzEpRs6QpN2tPs4Zi+ofGuR4Zl4nnqzSLH3+b5D5n0v2kmhb0Q9Wg5fka4Xrdtu phCytqhXYwE8WSExpy9FSe9orMwkkHSAI28x71d8EtCM7A1f9roFq6ZLwvPC8ZgXlCNt CA5QhWoKbo6tY459WunXFOTXv2aKEg2umC7E4I7lt0nrqE9aSlaH1EANIxMQzPVAp/gu eeJlhLJeN8ZjmdXJPe9/EULKc4xrsuVrPpeNPM/OIEKM6CK+FZEzUSTcQ2/dRo0Zr/Gd 9g== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 39aj2xja3w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 21 Jun 2021 08:06:08 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 21 Jun 2021 08:06:07 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 21 Jun 2021 08:06:07 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id DFCFA3F705D; Mon, 21 Jun 2021 08:06:05 -0700 (PDT) From: Tomasz Duszynski To: Jakub Palider , Tomasz Duszynski CC: , , Jerin Jacob Date: Mon, 21 Jun 2021 17:04:42 +0200 Message-ID: <20210621150449.19070-26-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621150449.19070-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> <20210621150449.19070-1-tduszynski@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: R6iyHCmiZvbfk74-efRSoN3Fn4nhCjLk X-Proofpoint-ORIG-GUID: R6iyHCmiZvbfk74-efRSoN3Fn4nhCjLk X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-21_06:2021-06-21, 2021-06-21 signatures=0 Subject: [dpdk-dev] [PATCH v3 25/32] raw/cnxk_bphy: support for reading bphy queue count X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for reading number of available queues from baseband phy. Currently only single queue is supported. Signed-off-by: Jakub Palider Signed-off-by: Tomasz Duszynski Reviewed-by: Jerin Jacob --- drivers/raw/cnxk_bphy/cnxk_bphy.c | 9 +++++++++ drivers/raw/cnxk_bphy/cnxk_bphy_irq.h | 7 +++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c index 00b6c5035..04e822586 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c @@ -29,6 +29,14 @@ bphy_rawdev_get_name(char *name, struct rte_pci_device *pci_dev) pci_dev->addr.function); } +static uint16_t +cnxk_bphy_irq_queue_count(struct rte_rawdev *dev) +{ + struct bphy_device *bphy_dev = (struct bphy_device *)dev->dev_private; + + return RTE_DIM(bphy_dev->queues); +} + static int cnxk_bphy_irq_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id, rte_rawdev_obj_t queue_conf, @@ -47,6 +55,7 @@ cnxk_bphy_irq_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id, static const struct rte_rawdev_ops bphy_rawdev_ops = { .queue_def_conf = cnxk_bphy_irq_queue_def_conf, + .queue_count = cnxk_bphy_irq_queue_count, }; static int diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h index 77169b1b7..16243efc9 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h @@ -15,9 +15,16 @@ struct bphy_mem { struct rte_mem_resource res2; }; +struct bphy_irq_queue { + /* queue holds up to one response */ + void *rsp; +}; + struct bphy_device { struct roc_bphy_irq_chip *irq_chip; struct bphy_mem mem; + /* bphy irq interface supports single queue only */ + struct bphy_irq_queue queues[1]; }; #endif /* _CNXK_BPHY_IRQ_ */