Add support for reading number of available queues from baseband
phy. Currently only single queue is supported.
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/raw/cnxk_bphy/cnxk_bphy.c | 9 +++++++++
drivers/raw/cnxk_bphy/cnxk_bphy_irq.h | 7 +++++++
2 files changed, 16 insertions(+)
@@ -29,6 +29,14 @@ bphy_rawdev_get_name(char *name, struct rte_pci_device *pci_dev)
pci_dev->addr.function);
}
+static uint16_t
+cnxk_bphy_irq_queue_count(struct rte_rawdev *dev)
+{
+ struct bphy_device *bphy_dev = (struct bphy_device *)dev->dev_private;
+
+ return RTE_DIM(bphy_dev->queues);
+}
+
static int
cnxk_bphy_irq_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,
rte_rawdev_obj_t queue_conf,
@@ -47,6 +55,7 @@ cnxk_bphy_irq_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,
static const struct rte_rawdev_ops bphy_rawdev_ops = {
.queue_def_conf = cnxk_bphy_irq_queue_def_conf,
+ .queue_count = cnxk_bphy_irq_queue_count,
};
static int
@@ -15,9 +15,16 @@ struct bphy_mem {
struct rte_mem_resource res2;
};
+struct bphy_irq_queue {
+ /* queue holds up to one response */
+ void *rsp;
+};
+
struct bphy_device {
struct roc_bphy_irq_chip *irq_chip;
struct bphy_mem mem;
+ /* bphy irq interface supports single queue only */
+ struct bphy_irq_queue queues[1];
};
#endif /* _CNXK_BPHY_IRQ_ */