From patchwork Mon Jun 21 07:51:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Zhang X-Patchwork-Id: 94603 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 05D6AA0547; Mon, 21 Jun 2021 10:02:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E018041197; Mon, 21 Jun 2021 10:02:43 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 37FE041191 for ; Mon, 21 Jun 2021 10:02:43 +0200 (CEST) IronPort-SDR: I5ecP7CKl98iCziPCCgPae59WYv16/w9ipx+lAr0preJDe312VJoeAvx83R/BPoB+4e0cE6u8l lAISse3scNnA== X-IronPort-AV: E=McAfee;i="6200,9189,10021"; a="270643194" X-IronPort-AV: E=Sophos;i="5.83,289,1616482800"; d="scan'208";a="270643194" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2021 01:02:42 -0700 IronPort-SDR: f9f0GFyDDWkgpCuydgPdv5w07F9JR/angJ9ypHpF32BO1Z3uSKp35H2QfGXPmmFBQHF+0N8Rl+ v06TtFDuW8LQ== X-IronPort-AV: E=Sophos;i="5.83,289,1616482800"; d="scan'208";a="452101864" Received: from unknown (HELO intel-npg-odc-srv03.cd.intel.com) ([10.240.178.145]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2021 01:02:40 -0700 From: Robin Zhang To: dev@dpdk.org Cc: beilei.xing@intel.com, junfeng.guo@intel.com, stevex.yang@intel.com, Robin Zhang , Stanislaw Grzeszczak Date: Mon, 21 Jun 2021 07:51:56 +0000 Message-Id: <20210621075206.4020456-6-robinx.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621075206.4020456-1-robinx.zhang@intel.com> References: <20210618063851.3694702-1-robinx.zhang@intel.com> <20210621075206.4020456-1-robinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 05/15] net/i40e/base: define new Shadow RAM pointers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add definitions for Shadow RAM pointers: 6th FPA module, 5th FPA module in X722 and Preservation Rules Module. Signed-off-by: Stanislaw Grzeszczak Signed-off-by: Robin Zhang --- drivers/net/i40e/base/i40e_type.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index cf41345834..e5a3729183 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -1555,6 +1555,9 @@ struct i40e_hw_port_stats { #define I40E_SR_FEATURE_CONFIGURATION_PTR 0x49 #define I40E_SR_CONFIGURATION_METADATA_PTR 0x4D #define I40E_SR_IMMEDIATE_VALUES_PTR 0x4E +#define I40E_SR_PRESERVATION_RULES_PTR 0x70 +#define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR 0x71 +#define I40E_SR_6TH_FREE_PROVISION_AREA_PTR 0x71 /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */ #define I40E_SR_VPD_MODULE_MAX_SIZE 1024