diff mbox series

[v2,34/58] net/bnxt: add support to identify duplicate flows

Message ID 20210613000652.28191-35-ajit.khaparde@broadcom.com (mailing list archive)
State Accepted
Delegated to: Ajit Khaparde
Headers show
Series enhancements to host based flow table management | expand

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Ajit Khaparde June 13, 2021, 12:06 a.m. UTC
From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>

Conflict resolution feature allows rejection of flows based on
the previously added flows that conflict. For instance, a five
tuple flow is added and then you add a new flow with only 4 tuple
instead having same layer2 details then it will be rejected.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/tf_ulp/bnxt_ulp.c            |    12 +-
 drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c       |     8 +-
 drivers/net/bnxt/tf_ulp/meson.build           |     1 +
 drivers/net/bnxt/tf_ulp/ulp_def_rules.c       |    10 +-
 drivers/net/bnxt/tf_ulp/ulp_flow_db.c         |    62 +-
 drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c         |    38 +-
 drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h         |     3 +-
 drivers/net/bnxt/tf_ulp/ulp_mapper.c          |   789 +-
 drivers/net/bnxt/tf_ulp/ulp_matcher.c         |     2 +
 drivers/net/bnxt/tf_ulp/ulp_port_db.c         |     4 +-
 drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c |   412 +
 drivers/net/bnxt/tf_ulp/ulp_rte_parser.c      |    47 +-
 drivers/net/bnxt/tf_ulp/ulp_template_db_act.c |   766 +-
 .../net/bnxt/tf_ulp/ulp_template_db_class.c   |  4144 +--
 .../net/bnxt/tf_ulp/ulp_template_db_enum.h    |  1233 +-
 .../net/bnxt/tf_ulp/ulp_template_db_field.h   |  1394 +-
 .../tf_ulp/ulp_template_db_stingray_act.c     |  3706 +-
 .../tf_ulp/ulp_template_db_stingray_class.c   | 28599 ++++-----------
 drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c |  1024 +-
 drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h |    24 +-
 .../bnxt/tf_ulp/ulp_template_db_wh_plus_act.c |  3705 +-
 .../tf_ulp/ulp_template_db_wh_plus_class.c    | 28654 ++++------------
 drivers/net/bnxt/tf_ulp/ulp_template_struct.h |    61 +-
 drivers/net/bnxt/tf_ulp/ulp_tun.c             |   225 +-
 drivers/net/bnxt/tf_ulp/ulp_tun.h             |    37 +-
 drivers/net/bnxt/tf_ulp/ulp_utils.c           |    16 +-
 drivers/net/bnxt/tf_ulp/ulp_utils.h           |    10 +-
 27 files changed, 15666 insertions(+), 59320 deletions(-)
 create mode 100644 drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c
diff mbox series

Patch

diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
index 59fb530fb1..0975a4689f 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
@@ -22,7 +22,6 @@ 
 #include "ulp_flow_db.h"
 #include "ulp_mapper.h"
 #include "ulp_port_db.h"
-#include "ulp_tun.h"
 
 /* Linked list of all TF sessions. */
 STAILQ_HEAD(, bnxt_ulp_session_state) bnxt_ulp_session_list =
@@ -55,14 +54,13 @@  bnxt_ulp_devid_get(struct bnxt *bp,
 {
 	if (BNXT_CHIP_P5(bp))
 		return -EINVAL;
-	/* Assuming Whitney */
-	*ulp_dev_id = BNXT_ULP_DEVICE_ID_WH_PLUS;
 
 	if (BNXT_STINGRAY(bp))
 		*ulp_dev_id = BNXT_ULP_DEVICE_ID_STINGRAY;
 	else
 		/* Assuming Whitney */
 		*ulp_dev_id = BNXT_ULP_DEVICE_ID_WH_PLUS;
+
 	return 0;
 }
 
@@ -400,21 +398,18 @@  ulp_eem_tbl_scope_init(struct bnxt *bp)
 
 	if (bnxt_ulp_cntxt_mem_type_get(bp->ulp_ctx, &mtype))
 		return -EINVAL;
-
 	if (mtype != BNXT_ULP_FLOW_MEM_TYPE_EXT) {
 		BNXT_TF_DBG(INFO, "Table Scope alloc is not required\n");
 		return 0;
 	}
 
 	bnxt_init_tbl_scope_parms(bp, &params);
-
 	rc = tf_alloc_tbl_scope(&bp->tfp, &params);
 	if (rc) {
 		BNXT_TF_DBG(ERR, "Unable to allocate eem table scope rc = %d\n",
 			    rc);
 		return rc;
 	}
-
 	rc = bnxt_ulp_cntxt_tbl_scope_id_set(bp->ulp_ctx, params.tbl_scope_id);
 	if (rc) {
 		BNXT_TF_DBG(ERR, "Unable to set table scope id\n");
@@ -534,8 +529,6 @@  ulp_ctx_init(struct bnxt *bp,
 	if (rc)
 		goto error_deinit;
 
-	ulp_tun_tbl_init(ulp_data->tun_tbl);
-
 	bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, &bp->tfp);
 	return rc;
 
@@ -547,8 +540,7 @@  ulp_ctx_init(struct bnxt *bp,
 
 /* The function to initialize ulp dparms with devargs */
 static int32_t
-ulp_dparms_init(struct bnxt *bp,
-		struct bnxt_ulp_context *ulp_ctx)
+ulp_dparms_init(struct bnxt *bp, struct bnxt_ulp_context *ulp_ctx)
 {
 	struct bnxt_ulp_device_params *dparms;
 	uint32_t dev_id;
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
index 836e94bc60..2c1a2a7be3 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
@@ -79,7 +79,6 @@  bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,
 			    struct ulp_rte_parser_params *params,
 			    enum bnxt_ulp_fdb_type flow_type)
 {
-	memset(mapper_cparms, 0, sizeof(*mapper_cparms));
 	mapper_cparms->flow_type	= flow_type;
 	mapper_cparms->app_priority	= params->priority;
 	mapper_cparms->dir_attr		= params->dir_attr;
@@ -95,6 +94,12 @@  bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,
 	mapper_cparms->parent_flow	= params->parent_flow;
 	mapper_cparms->parent_fid	= params->parent_fid;
 	mapper_cparms->fld_bitmap	= &params->fld_bitmap;
+
+	/* update the signature fields into the computed field list */
+	ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_HDR_SIG_ID,
+			    params->hdr_sig_id);
+	ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_FLOW_SIG_ID,
+			    params->flow_sig_id);
 }
 
 /* Function to create the rte flow. */
@@ -177,7 +182,6 @@  bnxt_ulp_flow_create(struct rte_eth_dev *dev,
 	params.fid = fid;
 	params.func_id = func_id;
 	params.priority = attr->priority;
-	params.port_id = dev->data->port_id;
 	/* Perform the rte flow post process */
 	ret = bnxt_ulp_rte_parser_post_process(&params);
 	if (ret == BNXT_TF_RC_ERROR)
diff --git a/drivers/net/bnxt/tf_ulp/meson.build b/drivers/net/bnxt/tf_ulp/meson.build
index 611d7ab58e..701a510f27 100644
--- a/drivers/net/bnxt/tf_ulp/meson.build
+++ b/drivers/net/bnxt/tf_ulp/meson.build
@@ -23,6 +23,7 @@  sources += files(
         'ulp_fc_mgr.c',
         'ulp_tun.c',
         'ulp_gen_tbl.c',
+	'ulp_rte_handler_tbl.c',
         'ulp_template_db_wh_plus_act.c',
         'ulp_template_db_wh_plus_class.c',
         'ulp_template_db_stingray_act.c',
diff --git a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c
index 8a3c5ee8fb..72a6bcd1b3 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c
@@ -366,7 +366,7 @@  ulp_default_flow_create(struct rte_eth_dev *eth_dev,
 		goto err1;
 	}
 
-	rc = ulp_flow_db_fid_alloc(ulp_ctx, BNXT_ULP_FDB_TYPE_DEFAULT,
+	rc = ulp_flow_db_fid_alloc(ulp_ctx, mapper_params.flow_type,
 				   mapper_params.func_id, &fid);
 	if (rc) {
 		BNXT_TF_DBG(ERR, "Unable to allocate flow table entry\n");
@@ -383,7 +383,7 @@  ulp_default_flow_create(struct rte_eth_dev *eth_dev,
 	return 0;
 
 err3:
-	ulp_flow_db_fid_free(ulp_ctx, BNXT_ULP_FDB_TYPE_DEFAULT, fid);
+	ulp_flow_db_fid_free(ulp_ctx, mapper_params.flow_type, fid);
 err2:
 	bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
 err1:
@@ -437,7 +437,7 @@  void
 bnxt_ulp_destroy_df_rules(struct bnxt *bp, bool global)
 {
 	struct bnxt_ulp_df_rule_info *info;
-	uint16_t port_id;
+	uint8_t port_id;
 
 	if (!BNXT_TRUFLOW_EN(bp) ||
 	    BNXT_ETH_DEV_IS_REPRESENTOR(bp->eth_dev))
@@ -501,7 +501,7 @@  int32_t
 bnxt_ulp_create_df_rules(struct bnxt *bp)
 {
 	struct bnxt_ulp_df_rule_info *info;
-	uint16_t port_id;
+	uint8_t port_id;
 	int rc;
 
 	if (!BNXT_TRUFLOW_EN(bp) ||
@@ -575,7 +575,7 @@  bnxt_ulp_create_vfr_default_rules(struct rte_eth_dev *vfr_ethdev)
 	struct rte_eth_dev *parent_dev = vfr->parent_dev;
 	struct bnxt *bp = parent_dev->data->dev_private;
 	uint16_t vfr_port_id = vfr_ethdev->data->port_id;
-	uint16_t port_id;
+	uint8_t port_id;
 	int rc;
 
 	if (!bp || !BNXT_TRUFLOW_EN(bp))
diff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c
index c599e0c7e1..8537388da6 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c
@@ -48,17 +48,21 @@  ulp_flow_db_active_flows_bit_set(struct bnxt_ulp_flow_db *flow_db,
 	uint32_t a_idx = idx / ULP_INDEX_BITMAP_SIZE;
 
 	if (flag) {
-		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
+		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR || flow_type ==
+		    BNXT_ULP_FDB_TYPE_RID)
 			ULP_INDEX_BITMAP_SET(f_tbl->active_reg_flows[a_idx],
 					     idx);
-		else
+		if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT || flow_type ==
+		    BNXT_ULP_FDB_TYPE_RID)
 			ULP_INDEX_BITMAP_SET(f_tbl->active_dflt_flows[a_idx],
 					     idx);
 	} else {
-		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
+		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR || flow_type ==
+		    BNXT_ULP_FDB_TYPE_RID)
 			ULP_INDEX_BITMAP_RESET(f_tbl->active_reg_flows[a_idx],
 					       idx);
-		else
+		if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT || flow_type ==
+		    BNXT_ULP_FDB_TYPE_RID)
 			ULP_INDEX_BITMAP_RESET(f_tbl->active_dflt_flows[a_idx],
 					       idx);
 	}
@@ -85,9 +89,15 @@  ulp_flow_db_active_flows_bit_is_set(struct bnxt_ulp_flow_db *flow_db,
 	if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
 		return ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx],
 					    idx);
-	else
+	else if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT)
 		return ULP_INDEX_BITMAP_GET(f_tbl->active_dflt_flows[a_idx],
 					    idx);
+	else if (flow_type == BNXT_ULP_FDB_TYPE_RID)
+		return (ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx],
+					     idx) &&
+			ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx],
+					     idx));
+	return 0;
 }
 
 static inline enum tf_dir
@@ -213,7 +223,7 @@  ulp_flow_db_alloc_resource(struct bnxt_ulp_flow_db *flow_db)
 		return -ENOMEM;
 	}
 	size = (flow_tbl->num_flows / sizeof(uint64_t)) + 1;
-	size =  ULP_BYTE_ROUND_OFF_8(size);
+	size = ULP_BYTE_ROUND_OFF_8(size);
 	flow_tbl->active_reg_flows = rte_zmalloc("active reg flows", size,
 						 ULP_BUFFER_ALIGN_64_BYTE);
 	if (!flow_tbl->active_reg_flows) {
@@ -617,7 +627,7 @@  ulp_flow_db_fid_alloc(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
+	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -674,7 +684,7 @@  ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
+	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -688,7 +698,7 @@  ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,
 
 	/* check if the flow is active or not */
 	if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) {
-		BNXT_TF_DBG(ERR, "flow does not exist\n");
+		BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid);
 		return -EINVAL;
 	}
 
@@ -769,7 +779,7 @@  ulp_flow_db_resource_del(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
+	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -783,7 +793,7 @@  ulp_flow_db_resource_del(struct bnxt_ulp_context *ulp_ctxt,
 
 	/* check if the flow is active or not */
 	if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) {
-		BNXT_TF_DBG(ERR, "flow does not exist\n");
+		BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid);
 		return -EINVAL;
 	}
 
@@ -868,9 +878,8 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 		     enum bnxt_ulp_fdb_type flow_type,
 		     uint32_t fid)
 {
-	struct bnxt_tun_cache_entry *tun_tbl;
-	struct bnxt_ulp_flow_tbl *flow_tbl;
 	struct bnxt_ulp_flow_db *flow_db;
+	struct bnxt_ulp_flow_tbl *flow_tbl;
 
 	flow_db = bnxt_ulp_cntxt_ptr2_flow_db_get(ulp_ctxt);
 	if (!flow_db) {
@@ -878,7 +887,7 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
+	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -893,7 +902,7 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 
 	/* check if the flow is active or not */
 	if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) {
-		BNXT_TF_DBG(ERR, "flow does not exist\n");
+		BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid);
 		return -EINVAL;
 	}
 	flow_tbl->head_index--;
@@ -901,6 +910,7 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 		BNXT_TF_DBG(ERR, "FlowDB: Head Ptr is zero\n");
 		return -ENOENT;
 	}
+
 	flow_tbl->flow_tbl_stack[flow_tbl->head_index] = fid;
 
 	/* Clear the flows bitmap */
@@ -909,18 +919,12 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 	if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
 		ulp_flow_db_func_id_set(flow_db, fid, 0);
 
-	tun_tbl = bnxt_ulp_cntxt_ptr2_tun_tbl_get(ulp_ctxt);
-	if (!tun_tbl)
-		return -EINVAL;
-
-	ulp_clear_tun_inner_entry(tun_tbl, fid);
-
 	/* all good, return success */
 	return 0;
 }
 
 /*
- * Get the flow database entry details
+ *Get the flow database entry details
  *
  * ulp_ctxt [in] Ptr to ulp_context
  * flow_type [in] - specify default or regular
@@ -947,7 +951,7 @@  ulp_flow_db_resource_get(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
+	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -1003,10 +1007,14 @@  ulp_flow_db_next_entry_get(struct bnxt_ulp_flow_db *flow_db,
 	uint64_t *active_flows;
 	struct bnxt_ulp_flow_tbl *flowtbl = &flow_db->flow_tbl;
 
-	if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
+	if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) {
 		active_flows = flowtbl->active_reg_flows;
-	else
+	} else if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT) {
 		active_flows = flowtbl->active_dflt_flows;
+	} else {
+		BNXT_TF_DBG(ERR, "Invalid flow type %x\n", flow_type);
+			return -EINVAL;
+	}
 
 	do {
 		/* increment the flow id to find the next valid flow id */
@@ -1199,7 +1207,7 @@  ulp_flow_db_resource_params_get(struct bnxt_ulp_context *ulp_ctx,
 		return -EINVAL;
 	}
 
-	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
+	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -1601,7 +1609,7 @@  ulp_flow_db_child_flow_reset(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
+	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c
index 62a5924a36..da394ba210 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c
@@ -47,7 +47,7 @@  ulp_mapper_generic_tbl_list_init(struct bnxt_ulp_mapper_data *mapper_data)
 		if (tbl->result_num_entries != 0) {
 			/* add 4 bytes for reference count */
 			entry->mem_data_size = (tbl->result_num_entries + 1) *
-				(tbl->result_byte_size + sizeof(uint32_t));
+				(tbl->result_num_bytes + sizeof(uint32_t));
 
 			/* allocate the big chunk of memory */
 			entry->mem_data = rte_zmalloc("ulp mapper gen tbl",
@@ -60,7 +60,7 @@  ulp_mapper_generic_tbl_list_init(struct bnxt_ulp_mapper_data *mapper_data)
 			}
 			/* Populate the generic table container */
 			entry->container.num_elem = tbl->result_num_entries;
-			entry->container.byte_data_size = tbl->result_byte_size;
+			entry->container.byte_data_size = tbl->result_num_bytes;
 			entry->container.ref_count =
 				(uint32_t *)entry->mem_data;
 			size = sizeof(uint32_t) * (tbl->result_num_entries + 1);
@@ -168,7 +168,6 @@  ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir)
  * Set the data in the generic table entry, Data is in Big endian format
  *
  * entry [in] - generic table entry
- * offset [in] - The offset in bits where the data has to be set
  * len [in] - The length of the data in bits to be set
  * data [in] - pointer to the data to be used for setting the value.
  * data_size [in] - length of the data pointer in bytes.
@@ -177,7 +176,7 @@  ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir)
  */
 int32_t
 ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry,
-				  uint32_t offset, uint32_t len, uint8_t *data,
+				  uint32_t len, uint8_t *data,
 				  uint32_t data_size)
 {
 	/* validate the null arguments */
@@ -187,32 +186,13 @@  ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry,
 	}
 
 	/* check the size of the buffer for validation */
-	if ((offset + len) > ULP_BYTE_2_BITS(entry->byte_data_size) ||
+	if (len > ULP_BYTE_2_BITS(entry->byte_data_size) ||
 	    data_size < ULP_BITS_2_BYTE(len)) {
-		BNXT_TF_DBG(ERR, "invalid offset or length %x:%x:%x\n",
-			    offset, len, entry->byte_data_size);
+		BNXT_TF_DBG(ERR, "invalid offset or length %x:%x\n",
+			    len, entry->byte_data_size);
 		return -EINVAL;
 	}
-
-	/* adjust the data pointer */
-	data = data + (data_size - ULP_BITS_2_BYTE(len));
-
-	/* Push the data into the byte data array */
-	if (entry->byte_order == BNXT_ULP_BYTE_ORDER_LE) {
-		if (ulp_bs_push_lsb(entry->byte_data, offset, len, data) !=
-		    len) {
-			BNXT_TF_DBG(ERR, "write failed offset = %x, len =%x\n",
-				    offset, len);
-			return -EIO;
-		}
-	} else {
-		if (ulp_bs_push_msb(entry->byte_data, offset, len, data) !=
-		    len) {
-			BNXT_TF_DBG(ERR, "write failed offset = %x, len =%x\n",
-				    offset, len);
-			return -EIO;
-		}
-	}
+	memcpy(entry->byte_data, data, ULP_BITS_2_BYTE(len));
 	return 0;
 }
 
@@ -267,7 +247,7 @@  ulp_mapper_gen_tbl_res_free(struct bnxt_ulp_context *ulp_ctx,
 {
 	struct ulp_mapper_gen_tbl_entry entry;
 	int32_t tbl_idx;
-	uint32_t fid;
+	uint32_t fid = 0;
 
 	/* Extract the resource sub type and direction */
 	tbl_idx = ulp_mapper_gen_tbl_idx_calculate(res->resource_sub_type,
@@ -310,7 +290,7 @@  ulp_mapper_gen_tbl_res_free(struct bnxt_ulp_context *ulp_ctx,
 	fid = tfp_be_to_cpu_32(fid);
 
 	/* Destroy the flow associated with the shared flow id */
-	if (ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR,
+	if (ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_RID,
 				    fid))
 		BNXT_TF_DBG(ERR, "Error in deleting shared flow id %x\n", fid);
 
diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h
index 701a8d10e5..6236dc3ca2 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h
@@ -101,7 +101,6 @@  ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir);
  * Set the data in the generic table entry
  *
  * entry [in] - generic table entry
- * offset [in] - The offset in bits where the data has to be set
  * len [in] - The length of the data in bits to be set
  * data [in] - pointer to the data to be used for setting the value.
  * data_size [in] - length of the data pointer in bytes.
@@ -110,7 +109,7 @@  ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir);
  */
 int32_t
 ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry,
-				  uint32_t offset, uint32_t len, uint8_t *data,
+				  uint32_t len, uint8_t *data,
 				  uint32_t data_size);
 
 /*
diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
index 8dc2e18f9f..206f3d54f2 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
@@ -19,6 +19,20 @@ 
 #include "tf_util.h"
 #include "ulp_template_db_tbl.h"
 
+static const char *
+ulp_mapper_tmpl_name_str(enum bnxt_ulp_template_type tmpl_type)
+{
+	switch (tmpl_type) {
+	case BNXT_ULP_TEMPLATE_TYPE_CLASS:
+		return "class";
+	case BNXT_ULP_TEMPLATE_TYPE_ACTION:
+		return "action";
+	default:
+		return "invalid template type";
+	}
+}
+
+
 static struct bnxt_ulp_glb_resource_info *
 ulp_mapper_glb_resource_info_list_get(uint32_t *num_entries)
 {
@@ -42,7 +56,7 @@  ulp_mapper_glb_resource_read(struct bnxt_ulp_mapper_data *mapper_data,
 			     uint64_t *regval)
 {
 	if (!mapper_data || !regval ||
-	    dir >= TF_DIR_MAX || idx >= BNXT_ULP_GLB_REGFILE_INDEX_LAST)
+	    dir >= TF_DIR_MAX || idx >= BNXT_ULP_GLB_RF_IDX_LAST)
 		return -EINVAL;
 
 	*regval = mapper_data->glb_res_tbl[dir][idx].resource_hndl;
@@ -65,7 +79,7 @@  ulp_mapper_glb_resource_write(struct bnxt_ulp_mapper_data *data,
 
 	/* validate the arguments */
 	if (!data || res->direction >= TF_DIR_MAX ||
-	    res->glb_regfile_index >= BNXT_ULP_GLB_REGFILE_INDEX_LAST)
+	    res->glb_regfile_index >= BNXT_ULP_GLB_RF_IDX_LAST)
 		return -EINVAL;
 
 	/* write to the mapper data */
@@ -191,10 +205,27 @@  ulp_mapper_glb_template_table_get(uint32_t *num_entries)
 	return ulp_glb_template_tbl;
 }
 
-static uint8_t *
-ulp_mapper_glb_field_tbl_get(uint32_t idx)
+static int32_t
+ulp_mapper_glb_field_tbl_get(struct bnxt_ulp_mapper_parms *parms,
+			     uint32_t operand,
+			     uint8_t *val)
 {
-	return &ulp_glb_field_tbl[idx];
+	uint32_t t_idx;
+
+	t_idx = parms->class_tid << (BNXT_ULP_HDR_SIG_ID_SHIFT +
+				     BNXT_ULP_GLB_FIELD_TBL_SHIFT);
+	t_idx += ULP_COMP_FLD_IDX_RD(parms, BNXT_ULP_CF_IDX_HDR_SIG_ID) <<
+		BNXT_ULP_GLB_FIELD_TBL_SHIFT;
+	t_idx += operand;
+
+	if (t_idx >= BNXT_ULP_GLB_FIELD_TBL_SIZE) {
+		BNXT_TF_DBG(ERR, "Invalid hdr field index %x:%x:%x\n",
+			    parms->class_tid, t_idx, operand);
+		*val = 0;
+		return -EINVAL; /* error */
+	}
+	*val = ulp_glb_field_tbl[t_idx];
+	return 0;
 }
 
 /*
@@ -286,7 +317,7 @@  ulp_mapper_tbl_list_get(struct bnxt_ulp_mapper_parms *mparms,
  *
  * Returns array of Key fields, or NULL on error.
  */
-static struct bnxt_ulp_mapper_key_field_info *
+static struct bnxt_ulp_mapper_key_info *
 ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms,
 			  struct bnxt_ulp_mapper_tbl_info *tbl,
 			  uint32_t *num_flds)
@@ -295,7 +326,7 @@  ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms,
 	const struct bnxt_ulp_template_device_tbls *dev_tbls;
 
 	dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type];
-	if (!dev_tbls->key_field_list) {
+	if (!dev_tbls->key_info_list) {
 		*num_flds = 0;
 		return NULL;
 	}
@@ -303,7 +334,7 @@  ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms,
 	idx		= tbl->key_start_idx;
 	*num_flds	= tbl->key_num_fields;
 
-	return &dev_tbls->key_field_list[idx];
+	return &dev_tbls->key_info_list[idx];
 }
 
 /*
@@ -319,7 +350,7 @@  ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms,
  *
  * Returns array of data fields, or NULL on error.
  */
-static struct bnxt_ulp_mapper_result_field_info *
+static struct bnxt_ulp_mapper_field_info *
 ulp_mapper_result_fields_get(struct bnxt_ulp_mapper_parms *mparms,
 			     struct bnxt_ulp_mapper_tbl_info *tbl,
 			     uint32_t *num_flds,
@@ -510,6 +541,41 @@  ulp_mapper_child_flow_free(struct bnxt_ulp_context *ulp,
 	return 0;
 }
 
+/*
+ * Process the flow database opcode alloc action.
+ * returns 0 on success
+ */
+static int32_t
+ulp_mapper_fdb_opc_alloc_rid(struct bnxt_ulp_mapper_parms *parms,
+			     struct bnxt_ulp_mapper_tbl_info *tbl)
+{
+	uint32_t rid = 0;
+	uint64_t val64;
+	int32_t rc = 0;
+
+	/* allocate a new fid */
+	rc = ulp_flow_db_fid_alloc(parms->ulp_ctx,
+				   BNXT_ULP_FDB_TYPE_RID,
+				   0, &rid);
+	if (rc) {
+		BNXT_TF_DBG(ERR,
+			    "Unable to allocate flow table entry\n");
+		return -EINVAL;
+	}
+	/* Store the allocated fid in regfile*/
+	val64 = rid;
+	rc = ulp_regfile_write(parms->regfile, tbl->fdb_operand,
+			       tfp_cpu_to_be_64(val64));
+	if (rc) {
+		BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n",
+			    tbl->fdb_operand);
+		ulp_flow_db_fid_free(parms->ulp_ctx,
+				     BNXT_ULP_FDB_TYPE_RID, rid);
+		return -EINVAL;
+	}
+	return 0;
+}
+
 /*
  * Process the flow database opcode action.
  * returns 0 on success.
@@ -519,68 +585,40 @@  ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms,
 			   struct bnxt_ulp_mapper_tbl_info *tbl,
 			   struct ulp_flow_db_res_params *fid_parms)
 {
-	uint32_t push_fid, fid = 0;
+	uint32_t push_fid;
 	uint64_t val64;
+	enum bnxt_ulp_fdb_type flow_type;
 	int32_t rc = 0;
 
 	switch (tbl->fdb_opcode) {
 	case BNXT_ULP_FDB_OPC_PUSH:
 		push_fid = parms->fid;
+		flow_type = parms->flow_type;
 		break;
 	case BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE:
-		/* allocate a new fid */
-		rc = ulp_flow_db_fid_alloc(parms->ulp_ctx,
-					   parms->flow_type,
-					   tbl->resource_func, &fid);
-		if (rc) {
-			BNXT_TF_DBG(ERR,
-				    "Unable to allocate flow table entry\n");
-			return rc;
-		}
-		/* Store the allocated fid in regfile*/
-		val64 = fid;
-		rc = ulp_regfile_write(parms->regfile, tbl->flow_db_operand,
-				       tfp_cpu_to_be_64(val64));
-		if (!rc) {
-			BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n",
-				    tbl->flow_db_operand);
-			rc = -EINVAL;
-			goto error;
-		}
-		/* Use the allocated fid to update the flow resource */
-		push_fid = fid;
-		break;
 	case BNXT_ULP_FDB_OPC_PUSH_REGFILE:
 		/* get the fid from the regfile */
-		rc = ulp_regfile_read(parms->regfile, tbl->flow_db_operand,
+		rc = ulp_regfile_read(parms->regfile, tbl->fdb_operand,
 				      &val64);
 		if (!rc) {
 			BNXT_TF_DBG(ERR, "regfile[%d] read oob\n",
-				    tbl->flow_db_operand);
+				    tbl->fdb_operand);
 			return -EINVAL;
 		}
 		/* Use the extracted fid to update the flow resource */
-		push_fid = tfp_be_to_cpu_64((uint32_t)val64);
+		push_fid = (uint32_t)tfp_be_to_cpu_64(val64);
+		flow_type = BNXT_ULP_FDB_TYPE_RID;
 		break;
 	default:
 		return rc; /* Nothing to be done */
 	}
 
 	/* Add the resource to the flow database */
-	rc = ulp_flow_db_resource_add(parms->ulp_ctx, parms->flow_type,
+	rc = ulp_flow_db_resource_add(parms->ulp_ctx, flow_type,
 				      push_fid, fid_parms);
-	if (rc) {
+	if (rc)
 		BNXT_TF_DBG(ERR, "Failed to add res to flow %x rc = %d\n",
 			    push_fid, rc);
-		goto error;
-	}
-	return rc;
-
-error:
-	/* free the allocated fid */
-	if (fid)
-		ulp_flow_db_fid_free(parms->ulp_ctx,
-				     BNXT_ULP_FDB_TYPE_REGULAR, fid);
 	return rc;
 }
 
@@ -651,6 +689,7 @@  ulp_mapper_tbl_ident_scan_ext(struct bnxt_ulp_mapper_parms *parms,
 				    byte_data_size);
 			return -EINVAL;
 		}
+		val64 = 0;
 		if (byte_order == BNXT_ULP_BYTE_ORDER_LE)
 			ulp_bs_pull_lsb(byte_data, (uint8_t *)&val64,
 					sizeof(val64),
@@ -662,9 +701,8 @@  ulp_mapper_tbl_ident_scan_ext(struct bnxt_ulp_mapper_parms *parms,
 					idents[i].ident_bit_size);
 
 		/* Write it to the regfile, val64 is already in big-endian*/
-		if (!ulp_regfile_write(parms->regfile,
-				       idents[i].regfile_idx,
-				       val64)) {
+		if (ulp_regfile_write(parms->regfile,
+				      idents[i].regfile_idx, val64)) {
 			BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n",
 				    idents[i].regfile_idx);
 			return -EINVAL;
@@ -712,7 +750,7 @@  ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms,
 	}
 
 	id = (uint64_t)tfp_cpu_to_be_64(iparms.id);
-	if (!ulp_regfile_write(parms->regfile, idx, id)) {
+	if (ulp_regfile_write(parms->regfile, idx, id)) {
 		BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", idx);
 		rc = -EINVAL;
 		/* Need to free the identifier, so goto error */
@@ -805,7 +843,7 @@  ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms,
 
 	/* Write it to the regfile */
 	id = (uint64_t)tfp_cpu_to_be_64(sparms.search_id);
-	if (!ulp_regfile_write(parms->regfile, ident->regfile_idx, id)) {
+	if (ulp_regfile_write(parms->regfile, ident->regfile_idx, id)) {
 		BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", idx);
 		rc = -EINVAL;
 		/* Need to free the identifier, so goto error */
@@ -842,107 +880,38 @@  ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms,
 }
 
 static int32_t
-ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
-				enum tf_dir dir,
-				struct bnxt_ulp_mapper_result_field_info *fld,
-				struct ulp_blob *blob,
-				const char *name)
+ulp_mapper_field_process(struct bnxt_ulp_mapper_parms *parms,
+			 enum tf_dir dir,
+			 struct bnxt_ulp_mapper_field_info *fld,
+			 struct ulp_blob *blob,
+			 uint8_t is_key,
+			 const char *name)
 {
-	uint16_t idx, size_idx;
-	uint8_t	 *val = NULL;
-	uint16_t write_idx = blob->write_idx;
-	uint64_t regval;
 	uint32_t val_size = 0, field_size = 0;
-	uint64_t act_bit;
+	uint64_t hdr_bit, act_bit, regval;
+	uint16_t write_idx = blob->write_idx;
+	uint16_t idx, size_idx, bitlen;
+	uint8_t	*val = NULL;
 	uint8_t act_val[16];
-	uint64_t hdr_bit;
-
-	switch (fld->result_opcode) {
-	case BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT:
-		val = fld->result_operand;
-		if (!ulp_blob_push(blob, val, fld->field_bit_size)) {
-			BNXT_TF_DBG(ERR, "%s failed to add field\n", name);
-			return -EINVAL;
-		}
-		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP:
-		if (!ulp_operand_read(fld->result_operand,
-				      (uint8_t *)&idx, sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
-			return -EINVAL;
-		}
-		idx = tfp_be_to_cpu_16(idx);
+	uint8_t bit;
 
-		if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) {
-			BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx);
-			return -EINVAL;
-		}
-		val = &parms->act_prop->act_details[idx];
-		field_size = ulp_mapper_act_prop_size_get(idx);
-		if (fld->field_bit_size < ULP_BYTE_2_BITS(field_size)) {
-			field_size  = field_size -
-			    ((fld->field_bit_size + 7) / 8);
-			val += field_size;
-		}
-		if (!ulp_blob_push(blob, val, fld->field_bit_size)) {
-			BNXT_TF_DBG(ERR, "%s push field failed\n", name);
-			return -EINVAL;
-		}
-		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT:
-		if (!ulp_operand_read(fld->result_operand,
-				      (uint8_t *)&act_bit, sizeof(uint64_t))) {
-			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
-			return -EINVAL;
-		}
-		act_bit = tfp_be_to_cpu_64(act_bit);
-		memset(act_val, 0, sizeof(act_val));
-		if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit))
-			act_val[0] = 1;
-		if (fld->field_bit_size > ULP_BYTE_2_BITS(sizeof(act_val))) {
-			BNXT_TF_DBG(ERR, "%s field size is incorrect\n", name);
-			return -EINVAL;
-		}
-		if (!ulp_blob_push(blob, act_val, fld->field_bit_size)) {
-			BNXT_TF_DBG(ERR, "%s push field failed\n", name);
+	bitlen = fld->field_bit_size;
+	switch (fld->field_opcode) {
+	case BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT:
+		val = fld->field_operand;
+		if (!ulp_blob_push(blob, val, bitlen)) {
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
 			return -EINVAL;
 		}
-		val = act_val;
 		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ:
-		if (!ulp_operand_read(fld->result_operand,
-				      (uint8_t *)&idx, sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
-			return -EINVAL;
-		}
-		idx = tfp_be_to_cpu_16(idx);
-
-		if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) {
-			BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx);
-			return -EINVAL;
-		}
-		val = &parms->act_prop->act_details[idx];
-
-		/* get the size index next */
-		if (!ulp_operand_read(&fld->result_operand[sizeof(uint16_t)],
-				      (uint8_t *)&size_idx, sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
-			return -EINVAL;
-		}
-		size_idx = tfp_be_to_cpu_16(size_idx);
-
-		if (size_idx >= BNXT_ULP_ACT_PROP_IDX_LAST) {
-			BNXT_TF_DBG(ERR, "act_prop[%d] oob\n", size_idx);
+	case BNXT_ULP_FIELD_OPC_SET_TO_ZERO:
+		if (ulp_blob_pad_push(blob, bitlen) < 0) {
+			BNXT_TF_DBG(ERR, "%s too large for blob\n", name);
 			return -EINVAL;
 		}
-		memcpy(&val_size, &parms->act_prop->act_details[size_idx],
-		       sizeof(uint32_t));
-		val_size = tfp_be_to_cpu_32(val_size);
-		val_size = ULP_BYTE_2_BITS(val_size);
-		ulp_blob_push_encap(blob, val, val_size);
 		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE:
-		if (!ulp_operand_read(fld->result_operand,
+	case BNXT_ULP_FIELD_OPC_SET_TO_REGFILE:
+		if (!ulp_operand_read(fld->field_operand,
 				      (uint8_t *)&idx, sizeof(uint16_t))) {
 			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
 			return -EINVAL;
@@ -956,58 +925,52 @@  ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
 			return -EINVAL;
 		}
 
-		val = ulp_blob_push_64(blob, &regval, fld->field_bit_size);
+		val = ulp_blob_push_64(blob, &regval, bitlen);
 		if (!val) {
-			BNXT_TF_DBG(ERR, "%s push field failed\n", name);
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
 			return -EINVAL;
 		}
 		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE:
-		if (!ulp_operand_read(fld->result_operand,
+	case BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE:
+		if (!ulp_operand_read(fld->field_operand,
 				      (uint8_t *)&idx,
 				      sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
+			BNXT_TF_DBG(ERR, "%s operand read failed.\n", name);
 			return -EINVAL;
 		}
 		idx = tfp_be_to_cpu_16(idx);
 		if (ulp_mapper_glb_resource_read(parms->mapper_data,
 						 dir,
 						 idx, &regval)) {
-			BNXT_TF_DBG(ERR, "%s regfile[%d] read failed.\n",
+			BNXT_TF_DBG(ERR, "%s global regfile[%d] read failed.\n",
 				    name, idx);
 			return -EINVAL;
 		}
-		val = ulp_blob_push_64(blob, &regval, fld->field_bit_size);
+		val = ulp_blob_push_64(blob, &regval, bitlen);
 		if (!val) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
 			return -EINVAL;
 		}
 		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD:
-		if (!ulp_operand_read(fld->result_operand,
+	case BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD:
+		if (!ulp_operand_read(fld->field_operand,
 				      (uint8_t *)&idx,
 				      sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
+			BNXT_TF_DBG(ERR, "%s operand read failed.\n",
+				    name);
 			return -EINVAL;
 		}
 		idx = tfp_be_to_cpu_16(idx);
 		if (idx < BNXT_ULP_CF_IDX_LAST)
 			val = ulp_blob_push_32(blob, &parms->comp_fld[idx],
-					       fld->field_bit_size);
+					       bitlen);
 		if (!val) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
 			return -EINVAL;
 		}
 		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_ZERO:
-		if (ulp_blob_pad_push(blob, fld->field_bit_size) < 0) {
-			BNXT_TF_DBG(ERR, "%s too large for blob\n", name);
-			return -EINVAL;
-		}
-
-		break;
-	case BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST:
-		if (!ulp_operand_read(fld->result_operand,
+	case BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST:
+		if (!ulp_operand_read(fld->field_operand,
 				      (uint8_t *)&act_bit, sizeof(uint64_t))) {
 			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
 			return -EINVAL;
@@ -1015,10 +978,11 @@  ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
 		act_bit = tfp_be_to_cpu_64(act_bit);
 		if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit)) {
 			/* Action bit is set so consider operand_true */
-			if (!ulp_operand_read(fld->result_operand_true,
+			if (!ulp_operand_read(fld->field_operand_true,
 					      (uint8_t *)&idx,
 					      sizeof(uint16_t))) {
-				BNXT_TF_DBG(ERR, "%s operand read failed\n",
+				BNXT_TF_DBG(ERR,
+					    "%s true operand read failed\n",
 					    name);
 				return -EINVAL;
 			}
@@ -1030,28 +994,27 @@  ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
 			}
 			val = &parms->act_prop->act_details[idx];
 			field_size = ulp_mapper_act_prop_size_get(idx);
-			if (fld->field_bit_size < ULP_BYTE_2_BITS(field_size)) {
-				field_size  = field_size -
-				    ((fld->field_bit_size + 7) / 8);
+			if (bitlen < ULP_BYTE_2_BITS(field_size)) {
+				field_size  = field_size - ((bitlen + 7) / 8);
 				val += field_size;
 			}
-			if (!ulp_blob_push(blob, val, fld->field_bit_size)) {
-				BNXT_TF_DBG(ERR, "%s push field failed\n",
+			if (!ulp_blob_push(blob, val, bitlen)) {
+				BNXT_TF_DBG(ERR, "%s push to blob failed\n",
 					    name);
 				return -EINVAL;
 			}
 		} else {
 			/* action bit is not set, use the operand false */
-			val = fld->result_operand_false;
-			if (!ulp_blob_push(blob, val, fld->field_bit_size)) {
-				BNXT_TF_DBG(ERR, "%s failed to add field\n",
+			val = fld->field_operand_false;
+			if (!ulp_blob_push(blob, val, bitlen)) {
+				BNXT_TF_DBG(ERR, "%s push to blob failed\n",
 					    name);
 				return -EINVAL;
 			}
 		}
 		break;
-	case BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST:
-		if (!ulp_operand_read(fld->result_operand,
+	case BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST:
+		if (!ulp_operand_read(fld->field_operand,
 				      (uint8_t *)&act_bit, sizeof(uint64_t))) {
 			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
 			return -EINVAL;
@@ -1059,22 +1022,22 @@  ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
 		act_bit = tfp_be_to_cpu_64(act_bit);
 		if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit)) {
 			/* Action bit is set so consider operand_true */
-			val = fld->result_operand_true;
+			val = fld->field_operand_true;
 		} else {
 			/* action bit is not set, use the operand false */
-			val = fld->result_operand_false;
+			val = fld->field_operand_false;
 		}
-		if (!ulp_blob_push(blob, val, fld->field_bit_size)) {
-			BNXT_TF_DBG(ERR, "%s failed to add field\n",
+		if (!ulp_blob_push(blob, val, bitlen)) {
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n",
 				    name);
 			return -EINVAL;
 		}
 		break;
-	case BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF:
-		if (!ulp_operand_read(fld->result_operand,
+	case BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF:
+		if (!ulp_operand_read(fld->field_operand,
 				      (uint8_t *)&idx,
 				      sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
+			BNXT_TF_DBG(ERR, "%s operand read failed.\n", name);
 			return -EINVAL;
 		}
 		idx = tfp_be_to_cpu_16(idx);
@@ -1084,9 +1047,9 @@  ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
 		}
 		/* check if the computed field is set */
 		if (ULP_COMP_FLD_IDX_RD(parms, idx))
-			val = fld->result_operand_true;
+			val = fld->field_operand_true;
 		else
-			val = fld->result_operand_false;
+			val = fld->field_operand_false;
 
 		/* read the appropriate computed field */
 		if (!ulp_operand_read(val, (uint8_t *)&idx, sizeof(uint16_t))) {
@@ -1098,15 +1061,14 @@  ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
 			BNXT_TF_DBG(ERR, "%s invalid index %u\n", name, idx);
 			return -EINVAL;
 		}
-		val = ulp_blob_push_32(blob, &parms->comp_fld[idx],
-				       fld->field_bit_size);
+		val = ulp_blob_push_32(blob, &parms->comp_fld[idx], bitlen);
 		if (!val) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
 			return -EINVAL;
 		}
 		break;
-	case BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST:
-		if (!ulp_operand_read(fld->result_operand,
+	case BNXT_ULP_FIELD_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST:
+		if (!ulp_operand_read(fld->field_operand,
 				      (uint8_t *)&hdr_bit, sizeof(uint64_t))) {
 			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
 			return -EINVAL;
@@ -1114,20 +1076,128 @@  ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
 		hdr_bit = tfp_be_to_cpu_64(hdr_bit);
 		if (ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, hdr_bit)) {
 			/* Header bit is set so consider operand_true */
-			val = fld->result_operand_true;
+			val = fld->field_operand_true;
 		} else {
 			/* Header bit is not set, use the operand false */
-			val = fld->result_operand_false;
+			val = fld->field_operand_false;
 		}
-		if (!ulp_blob_push(blob, val, fld->field_bit_size)) {
-			BNXT_TF_DBG(ERR, "%s failed to add field\n",
+		if (!ulp_blob_push(blob, val, bitlen)) {
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n",
 				    name);
 			return -EINVAL;
 		}
 		break;
+	case BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP:
+		if (!ulp_operand_read(fld->field_operand,
+				      (uint8_t *)&idx, sizeof(uint16_t))) {
+			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
+			return -EINVAL;
+		}
+		idx = tfp_be_to_cpu_16(idx);
+
+		if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) {
+			BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx);
+			return -EINVAL;
+		}
+		val = &parms->act_prop->act_details[idx];
+		field_size = ulp_mapper_act_prop_size_get(idx);
+		if (bitlen < ULP_BYTE_2_BITS(field_size)) {
+			field_size  = field_size - ((bitlen + 7) / 8);
+			val += field_size;
+		}
+		if (!ulp_blob_push(blob, val, bitlen)) {
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
+			return -EINVAL;
+		}
+		break;
+	case BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT:
+		if (!ulp_operand_read(fld->field_operand,
+				      (uint8_t *)&act_bit, sizeof(uint64_t))) {
+			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
+			return -EINVAL;
+		}
+		act_bit = tfp_be_to_cpu_64(act_bit);
+		memset(act_val, 0, sizeof(act_val));
+		if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit))
+			act_val[0] = 1;
+		if (bitlen > ULP_BYTE_2_BITS(sizeof(act_val))) {
+			BNXT_TF_DBG(ERR, "%s field size is incorrect\n", name);
+			return -EINVAL;
+		}
+		if (!ulp_blob_push(blob, act_val, bitlen)) {
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
+			return -EINVAL;
+		}
+		val = act_val;
+		break;
+	case BNXT_ULP_FIELD_OPC_SET_TO_ENCAP_ACT_PROP_SZ:
+		if (!ulp_operand_read(fld->field_operand,
+				      (uint8_t *)&idx, sizeof(uint16_t))) {
+			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
+			return -EINVAL;
+		}
+		idx = tfp_be_to_cpu_16(idx);
+
+		if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) {
+			BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx);
+			return -EINVAL;
+		}
+		val = &parms->act_prop->act_details[idx];
+
+		/* get the size index next */
+		if (!ulp_operand_read(&fld->field_operand[sizeof(uint16_t)],
+				      (uint8_t *)&size_idx, sizeof(uint16_t))) {
+			BNXT_TF_DBG(ERR, "%s operand read failed\n", name);
+			return -EINVAL;
+		}
+		size_idx = tfp_be_to_cpu_16(size_idx);
+
+		if (size_idx >= BNXT_ULP_ACT_PROP_IDX_LAST) {
+			BNXT_TF_DBG(ERR, "act_prop[%d] oob\n", size_idx);
+			return -EINVAL;
+		}
+		memcpy(&val_size, &parms->act_prop->act_details[size_idx],
+		       sizeof(uint32_t));
+		val_size = tfp_be_to_cpu_32(val_size);
+		val_size = ULP_BYTE_2_BITS(val_size);
+		ulp_blob_push_encap(blob, val, val_size);
+		break;
+	case BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD:
+		if (!ulp_operand_read(fld->field_operand, (uint8_t *)&idx,
+				      sizeof(uint16_t))) {
+			BNXT_TF_DBG(ERR, "%s operand read failed.\n", name);
+			return -EINVAL;
+		}
+		idx = tfp_be_to_cpu_16(idx);
+		/* get the index from the global field list */
+		if (ulp_mapper_glb_field_tbl_get(parms, idx, &bit)) {
+			BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n",
+				    idx);
+			return -EINVAL;
+		}
+		if (is_key)
+			val = parms->hdr_field[bit].spec;
+		else
+			val = parms->hdr_field[bit].mask;
+
+		/*
+		 * Need to account for how much data was pushed to the header
+		 * field vs how much is to be inserted in the key/mask.
+		 */
+		field_size = parms->hdr_field[bit].size;
+		if (bitlen < ULP_BYTE_2_BITS(field_size)) {
+			field_size  = field_size - ((bitlen + 7) / 8);
+			val += field_size;
+		}
+
+		if (!ulp_blob_push(blob, val, bitlen)) {
+			BNXT_TF_DBG(ERR, "%s push to blob failed\n", name);
+			return -EINVAL;
+		}
+		break;
 	default:
-		BNXT_TF_DBG(ERR, "invalid result mapper opcode 0x%x at %d\n",
-			    fld->result_opcode, write_idx);
+		BNXT_TF_DBG(ERR, "%s invalid field opcode 0x%x at %d\n",
+			    name, fld->field_opcode, write_idx);
 		return -EINVAL;
 	}
 	return 0;
@@ -1143,7 +1213,7 @@  ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,
 			    struct ulp_blob *data,
 			    const char *name)
 {
-	struct bnxt_ulp_mapper_result_field_info *dflds;
+	struct bnxt_ulp_mapper_field_info *dflds;
 	uint32_t i, num_flds = 0, encap_flds = 0;
 	int32_t rc = 0;
 
@@ -1169,8 +1239,8 @@  ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,
 			ulp_blob_encap_swap_idx_set(data);
 
 		/* Process the result fields */
-		rc = ulp_mapper_result_field_process(parms, tbl->direction,
-						     &dflds[i], data, name);
+		rc = ulp_mapper_field_process(parms, tbl->direction,
+					      &dflds[i], data, 0, name);
 		if (rc) {
 			BNXT_TF_DBG(ERR, "data field failed\n");
 			return rc;
@@ -1184,139 +1254,6 @@  ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,
 	return rc;
 }
 
-/* Function to alloc action record and set the table. */
-static int32_t
-ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms,
-				 enum tf_dir dir,
-				 struct bnxt_ulp_mapper_key_field_info *f,
-				 struct ulp_blob *blob,
-				 uint8_t is_key,
-				 const char *name)
-{
-	uint64_t val64;
-	uint16_t idx, bitlen;
-	uint32_t opcode;
-	uint8_t *operand;
-	struct ulp_regfile *regfile = parms->regfile;
-	uint8_t *val = NULL;
-	struct bnxt_ulp_mapper_key_field_info *fld = f;
-	uint32_t field_size;
-
-	if (is_key) {
-		operand = fld->spec_operand;
-		opcode	= fld->spec_opcode;
-	} else {
-		operand = fld->mask_operand;
-		opcode	= fld->mask_opcode;
-	}
-
-	bitlen = fld->field_bit_size;
-
-	switch (opcode) {
-	case BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT:
-		val = operand;
-		if (!ulp_blob_push(blob, val, bitlen)) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
-			return -EINVAL;
-		}
-		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_ZERO:
-		if (ulp_blob_pad_push(blob, bitlen) < 0) {
-			BNXT_TF_DBG(ERR, "%s pad too large for blob\n", name);
-			return -EINVAL;
-		}
-
-		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD:
-		if (!ulp_operand_read(operand, (uint8_t *)&idx,
-				      sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
-			return -EINVAL;
-		}
-		idx = tfp_be_to_cpu_16(idx);
-		if (is_key)
-			val = parms->hdr_field[idx].spec;
-		else
-			val = parms->hdr_field[idx].mask;
-
-		/*
-		 * Need to account for how much data was pushed to the header
-		 * field vs how much is to be inserted in the key/mask.
-		 */
-		field_size = parms->hdr_field[idx].size;
-		if (bitlen < ULP_BYTE_2_BITS(field_size)) {
-			field_size  = field_size - ((bitlen + 7) / 8);
-			val += field_size;
-		}
-
-		if (!ulp_blob_push(blob, val, bitlen)) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
-			return -EINVAL;
-		}
-		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD:
-		if (!ulp_operand_read(operand, (uint8_t *)&idx,
-				      sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
-			return -EINVAL;
-		}
-		idx = tfp_be_to_cpu_16(idx);
-		if (idx < BNXT_ULP_CF_IDX_LAST)
-			val = ulp_blob_push_32(blob, &parms->comp_fld[idx],
-					       bitlen);
-		if (!val) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
-			return -EINVAL;
-		}
-		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE:
-		if (!ulp_operand_read(operand, (uint8_t *)&idx,
-				      sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
-			return -EINVAL;
-		}
-		idx = tfp_be_to_cpu_16(idx);
-
-		if (!ulp_regfile_read(regfile, idx, &val64)) {
-			BNXT_TF_DBG(ERR, "%s regfile[%d] read failed.\n",
-				    name, idx);
-			return -EINVAL;
-		}
-
-		val = ulp_blob_push_64(blob, &val64, bitlen);
-		if (!val) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
-			return -EINVAL;
-		}
-		break;
-	case BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE:
-		if (!ulp_operand_read(operand, (uint8_t *)&idx,
-				      sizeof(uint16_t))) {
-			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
-			return -EINVAL;
-		}
-		idx = tfp_be_to_cpu_16(idx);
-		if (ulp_mapper_glb_resource_read(parms->mapper_data,
-						 dir,
-						 idx, &val64)) {
-			BNXT_TF_DBG(ERR, "%s regfile[%d] read failed.\n",
-				    name, idx);
-			return -EINVAL;
-		}
-		val = ulp_blob_push_64(blob, &val64, bitlen);
-		if (!val) {
-			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
-			return -EINVAL;
-		}
-		break;
-	default:
-		BNXT_TF_DBG(ERR, "invalid keymask mapper opcode 0x%x\n",
-			    opcode);
-		return -EINVAL;
-	}
-	return 0;
-}
-
 static int32_t
 ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms,
 			     struct bnxt_ulp_mapper_tbl_info *tbl,
@@ -1380,7 +1317,7 @@  ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms,
 	mark = tfp_be_to_cpu_32(mark);
 
 	if (!ulp_regfile_read(parms->regfile,
-			      BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
+			      BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
 			      &val64)) {
 		BNXT_TF_DBG(ERR, "read action ptr main failed\n");
 		return -EINVAL;
@@ -1423,7 +1360,7 @@  ulp_mapper_mark_vfr_idx_process(struct bnxt_ulp_mapper_parms *parms,
 
 	 /* Get the main action pointer */
 	if (!ulp_regfile_read(parms->regfile,
-			      BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
+			      BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
 			      &val64)) {
 		BNXT_TF_DBG(ERR, "read action ptr main failed\n");
 		return -EINVAL;
@@ -1521,8 +1458,8 @@  ulp_mapper_tcam_tbl_entry_write(struct bnxt_ulp_mapper_parms *parms,
 	sparms.idx		= idx;
 	/* Already verified the key/mask lengths */
 	sparms.key		= ulp_blob_data_get(key, &tmplen);
-	sparms.key_sz_in_bits	= tmplen;
 	sparms.mask		= ulp_blob_data_get(mask, &tmplen);
+	sparms.key_sz_in_bits	= tbl->key_bit_size;
 	sparms.result		= ulp_blob_data_get(data, &tmplen);
 
 	if (tbl->result_bit_size != tmplen) {
@@ -1575,7 +1512,7 @@  static int32_t
 ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 			    struct bnxt_ulp_mapper_tbl_info *tbl)
 {
-	struct bnxt_ulp_mapper_key_field_info	*kflds;
+	struct bnxt_ulp_mapper_key_info	*kflds;
 	struct ulp_blob key, mask, data, update_data;
 	uint32_t i, num_kflds;
 	struct tf *tfp;
@@ -1632,20 +1569,22 @@  ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 	 */
 	for (i = 0; i < num_kflds; i++) {
 		/* Setup the key */
-		rc = ulp_mapper_keymask_field_process(parms, tbl->direction,
-						      &kflds[i],
-						      &key, 1, "TCAM Key");
+		rc = ulp_mapper_field_process(parms, tbl->direction,
+					      &kflds[i].field_info_spec,
+					      &key, 1, "TCAM Key");
 		if (rc) {
-			BNXT_TF_DBG(ERR, "Key field set failed.\n");
+			BNXT_TF_DBG(ERR, "Key field set failed %s\n",
+				    kflds[i].field_info_spec.description);
 			return rc;
 		}
 
 		/* Setup the mask */
-		rc = ulp_mapper_keymask_field_process(parms, tbl->direction,
-						      &kflds[i],
-						      &mask, 0, "TCAM Mask");
+		rc = ulp_mapper_field_process(parms, tbl->direction,
+					      &kflds[i].field_info_mask,
+					      &mask, 0, "TCAM Mask");
 		if (rc) {
-			BNXT_TF_DBG(ERR, "Mask field set failed.\n");
+			BNXT_TF_DBG(ERR, "Mask field set failed %s\n",
+				    kflds[i].field_info_mask.description);
 			return rc;
 		}
 	}
@@ -1728,8 +1667,8 @@  ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 	}
 
 	/* Write the tcam index into the regfile*/
-	if (!ulp_regfile_write(parms->regfile, tbl->tbl_operand,
-			       (uint64_t)tfp_cpu_to_be_64(idx))) {
+	if (ulp_regfile_write(parms->regfile, tbl->tbl_operand,
+			      (uint64_t)tfp_cpu_to_be_64(idx))) {
 		BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n",
 			    tbl->tbl_operand);
 		rc = -EINVAL;
@@ -1786,7 +1725,7 @@  static int32_t
 ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 			  struct bnxt_ulp_mapper_tbl_info *tbl)
 {
-	struct bnxt_ulp_mapper_key_field_info	*kflds;
+	struct bnxt_ulp_mapper_key_info	*kflds;
 	struct ulp_blob key, data;
 	uint32_t i, num_kflds;
 	uint16_t tmplen;
@@ -1822,9 +1761,9 @@  ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 	/* create the key */
 	for (i = 0; i < num_kflds; i++) {
 		/* Setup the key */
-		rc = ulp_mapper_keymask_field_process(parms, tbl->direction,
-						      &kflds[i],
-						      &key, 1, "EM Key");
+		rc = ulp_mapper_field_process(parms, tbl->direction,
+					      &kflds[i].field_info_spec,
+					      &key, 1, "EM Key");
 		if (rc) {
 			BNXT_TF_DBG(ERR, "Key field set failed.\n");
 			return rc;
@@ -2150,7 +2089,7 @@  ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 		rc = ulp_regfile_write(parms->regfile,
 				       tbl->tbl_operand,
 				       tfp_cpu_to_be_64(regval));
-		if (!rc) {
+		if (rc) {
 			BNXT_TF_DBG(ERR, "Failed to write regfile[%d] rc=%d\n",
 				    tbl->tbl_operand, rc);
 			goto error;
@@ -2326,7 +2265,7 @@  static int32_t
 ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 			   struct bnxt_ulp_mapper_tbl_info *tbl)
 {
-	struct bnxt_ulp_mapper_key_field_info *kflds;
+	struct bnxt_ulp_mapper_key_info *kflds;
 	struct ulp_flow_db_res_params fid_parms;
 	struct ulp_mapper_gen_tbl_entry gen_tbl_ent, *g;
 	uint16_t tmplen;
@@ -2351,9 +2290,9 @@  ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 	}
 	for (i = 0; i < num_kflds; i++) {
 		/* Setup the key */
-		rc = ulp_mapper_keymask_field_process(parms, tbl->direction,
-						      &kflds[i],
-						      &key, 1, "Gen Tbl Key");
+		rc = ulp_mapper_field_process(parms, tbl->direction,
+					      &kflds[i].field_info_spec,
+					      &key, 1, "Gen Tbl Key");
 		if (rc) {
 			BNXT_TF_DBG(ERR,
 				    "Failed to create key for Gen tbl rc=%d\n",
@@ -2416,7 +2355,7 @@  ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 
 		/* Initialize the blob data */
 		if (!ulp_blob_init(&data, tbl->result_bit_size,
-				   BNXT_ULP_BYTE_ORDER_BE)) {
+				   gen_tbl_ent.byte_order)) {
 			BNXT_TF_DBG(ERR, "Failed initial index table blob\n");
 			return -EINVAL;
 		}
@@ -2429,7 +2368,7 @@  ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 			return rc;
 		}
 		byte_data = ulp_blob_data_get(&data, &tmplen);
-		rc = ulp_mapper_gen_tbl_entry_data_set(&gen_tbl_ent, 0,
+		rc = ulp_mapper_gen_tbl_entry_data_set(&gen_tbl_ent,
 						       tmplen, byte_data,
 						       ULP_BITS_2_BYTE(tmplen));
 		if (rc) {
@@ -2448,11 +2387,11 @@  ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 
 	/* Set the generic entry hit */
 	rc = ulp_regfile_write(parms->regfile,
-			       BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT,
+			       BNXT_ULP_RF_IDX_GENERIC_TBL_HIT,
 			       tfp_cpu_to_be_64(gen_tbl_hit));
-	if (!rc) {
+	if (rc) {
 		BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n",
-			    BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT);
+			    BNXT_ULP_RF_IDX_GENERIC_TBL_HIT);
 		return -EIO;
 	}
 
@@ -2557,8 +2496,7 @@  ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms,
 			    int32_t *res)
 {
 	int32_t rc = 0;
-	uint8_t *bit;
-	uint32_t idx;
+	uint8_t bit;
 	uint64_t regval;
 
 	switch (opc) {
@@ -2621,26 +2559,22 @@  ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms,
 		}
 		break;
 	case BNXT_ULP_COND_OPC_FIELD_BIT_IS_SET:
-		idx = (parms->class_tid << BNXT_ULP_GLB_FIELD_TBL_SHIFT) |
-			operand;
-		bit = ulp_mapper_glb_field_tbl_get(idx);
-		if (!bit) {
+		rc = ulp_mapper_glb_field_tbl_get(parms, operand, &bit);
+		if (rc) {
 			BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n",
-				    idx);
+				    operand);
 			return -EINVAL;
 		}
-		*res = ULP_BITMAP_ISSET(parms->fld_bitmap->bits, (1 << *bit));
+		*res = ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit);
 		break;
 	case BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET:
-		idx = (parms->class_tid << BNXT_ULP_GLB_FIELD_TBL_SHIFT) |
-			operand;
-		bit = ulp_mapper_glb_field_tbl_get(idx);
-		if (!bit) {
+		rc = ulp_mapper_glb_field_tbl_get(parms, operand, &bit);
+		if (rc) {
 			BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n",
-				    idx);
+				    operand);
 			return -EINVAL;
 		}
-		*res = !ULP_BITMAP_ISSET(parms->fld_bitmap->bits, (1 << *bit));
+		*res = !ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit);
 		break;
 	case BNXT_ULP_COND_OPC_REGFILE_IS_SET:
 		if (!ulp_regfile_read(parms->regfile, operand, &regval)) {
@@ -2728,6 +2662,70 @@  ulp_mapper_cond_opc_list_process(struct bnxt_ulp_mapper_parms *parms,
 	return rc;
 }
 
+/*
+ * Processes conflict resolution and returns both a status and result.
+ * The status must be checked prior to verifying the result.
+ *
+ * returns 0 for success, negative on failure
+ * returns res = 1 for true, res = 0 for false.
+ */
+static int32_t
+ulp_mapper_conflict_resolution_process(struct bnxt_ulp_mapper_parms *parms,
+				       struct bnxt_ulp_mapper_tbl_info *tbl,
+				       int32_t *res)
+{
+	int32_t rc = 0;
+	uint64_t regval;
+	uint64_t comp_sig_id;
+
+	*res = 0;
+	switch (tbl->accept_opcode) {
+	case BNXT_ULP_ACCEPT_OPC_ALWAYS:
+		*res = 1;
+		break;
+	case BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH:
+		/* perform the signature validation*/
+		if (tbl->resource_func ==
+		    BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE) {
+			/* Perform the check that generic table is hit or not */
+			if (!ulp_regfile_read(parms->regfile,
+					      BNXT_ULP_RF_IDX_GENERIC_TBL_HIT,
+					      &regval)) {
+				BNXT_TF_DBG(ERR, "regfile[%d] read oob\n",
+					    BNXT_ULP_RF_IDX_GENERIC_TBL_HIT);
+				return -EINVAL;
+			}
+			if (!regval) {
+				/* not a hit so no need to check flow sign*/
+				*res = 1;
+				return rc;
+			}
+		}
+		/* compare the new flow signature against stored one */
+		if (!ulp_regfile_read(parms->regfile,
+				      BNXT_ULP_RF_IDX_FLOW_SIG_ID,
+				      &regval)) {
+			BNXT_TF_DBG(ERR, "regfile[%d] read oob\n",
+				    BNXT_ULP_RF_IDX_FLOW_SIG_ID);
+			return -EINVAL;
+		}
+		comp_sig_id = ULP_COMP_FLD_IDX_RD(parms,
+						  BNXT_ULP_CF_IDX_FLOW_SIG_ID);
+		regval = tfp_be_to_cpu_64(regval);
+		if (comp_sig_id == regval)
+			*res = 1;
+		else
+			BNXT_TF_DBG(ERR, "failed signature match %x:%x\n",
+				    (uint32_t)comp_sig_id, (uint32_t)regval);
+		break;
+	default:
+		BNXT_TF_DBG(ERR, "Invalid accept opcode %d\n",
+			    tbl->accept_opcode);
+		return -EINVAL;
+	}
+	return rc;
+}
+
 static int32_t
 ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 {
@@ -2757,9 +2755,8 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 		/* Reject the template if True */
 		if (cond_rc) {
 			BNXT_TF_DBG(ERR, "%s Template %d rejected.\n",
-				    (parms->tmpl_type ==
-				     BNXT_ULP_TEMPLATE_TYPE_CLASS) ?
-				    "class" : "action", tid);
+				    ulp_mapper_tmpl_name_str(parms->tmpl_type),
+				    tid);
 			return -EINVAL;
 		}
 	}
@@ -2767,8 +2764,8 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 	tbls = ulp_mapper_tbl_list_get(parms, tid, &num_tbls);
 	if (!tbls || !num_tbls) {
 		BNXT_TF_DBG(ERR, "No %s tables for %d:%d\n",
-			    (parms->tmpl_type == BNXT_ULP_TEMPLATE_TYPE_CLASS) ?
-			    "class" : "action", parms->dev_id, tid);
+			    ulp_mapper_tmpl_name_str(parms->tmpl_type),
+			    parms->dev_id, tid);
 		return -EINVAL;
 	}
 
@@ -2793,6 +2790,15 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 		if (!cond_rc)
 			continue;
 
+		/* process the fdb opcode for alloc push */
+		if (tbl->fdb_opcode == BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE) {
+			rc = ulp_mapper_fdb_opc_alloc_rid(parms, tbl);
+			if (rc) {
+				BNXT_TF_DBG(ERR, "Failed to do fdb alloc\n");
+				return rc;
+			}
+		}
+
 		switch (tbl->resource_func) {
 		case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE:
 			rc = ulp_mapper_tcam_tbl_process(parms, tbl);
@@ -2825,13 +2831,22 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 				    tbl->resource_func);
 			goto error;
 		}
+
+		/* perform the post table process */
+		rc  = ulp_mapper_conflict_resolution_process(parms, tbl,
+							     &cond_rc);
+		if (rc || !cond_rc) {
+			BNXT_TF_DBG(ERR, "Failed due to conflict resolution\n");
+			rc = -EINVAL;
+			goto error;
+		}
 	}
 
 	return rc;
 error:
 	BNXT_TF_DBG(ERR, "%s tables failed creation for %d:%d\n",
-		    (parms->tmpl_type = BNXT_ULP_TEMPLATE_TYPE_CLASS) ?
-		    "class" : "action", parms->dev_id, tid);
+		    ulp_mapper_tmpl_name_str(parms->tmpl_type),
+		    parms->dev_id, tid);
 	return rc;
 }
 
@@ -3054,7 +3069,7 @@  ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
 {
 	struct bnxt_ulp_mapper_parms parms;
 	struct ulp_regfile regfile;
-	int32_t	 rc, trc;
+	int32_t	 rc = 0, trc;
 
 	if (!ulp_ctx || !cparms)
 		return -EINVAL;
@@ -3109,14 +3124,6 @@  ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
 		return -EINVAL;
 	}
 
-	rc = ulp_regfile_write(parms.regfile,
-			       BNXT_ULP_REGFILE_INDEX_CLASS_TID,
-			       tfp_cpu_to_be_64((uint64_t)parms.class_tid));
-	if (!rc) {
-		BNXT_TF_DBG(ERR, "Unable to write template ID to regfile\n");
-		return -EINVAL;
-	}
-
 	/* Process the action template list from the selected action table*/
 	if (parms.act_tid) {
 		parms.tmpl_type = BNXT_ULP_TEMPLATE_TYPE_ACTION;
@@ -3152,7 +3159,7 @@  ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
 
 flow_error:
 	/* Free all resources that were allocated during flow creation */
-	trc = ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR,
+	trc = ulp_mapper_flow_destroy(ulp_ctx, parms.flow_type,
 				      parms.fid);
 	if (trc)
 		BNXT_TF_DBG(ERR, "Failed to free all resources rc=%d\n", trc);
diff --git a/drivers/net/bnxt/tf_ulp/ulp_matcher.c b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
index e23867f8b9..275214d489 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_matcher.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
@@ -77,6 +77,8 @@  ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,
 	BNXT_TF_DBG(DEBUG, "Found matching pattern template %d\n",
 		    class_match->class_tid);
 	*class_id = class_match->class_tid;
+	params->hdr_sig_id = class_match->hdr_sig_id;
+	params->flow_sig_id = class_match->flow_sig_id;
 	return BNXT_TF_RC_SUCCESS;
 
 error:
diff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.c b/drivers/net/bnxt/tf_ulp/ulp_port_db.c
index a11e6786c0..cc66c78312 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_port_db.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.c
@@ -185,15 +185,13 @@  int32_t	ulp_port_db_dev_port_intf_update(struct bnxt_ulp_context *ulp_ctxt,
 	port_data = &port_db->phy_port_list[func->phy_port_id];
 	if (!port_data->port_valid) {
 		port_data->port_svif =
-			bnxt_get_svif(port_id, false,
-				      BNXT_ULP_INTF_TYPE_INVALID);
+			bnxt_get_svif(port_id, false, BNXT_ULP_INTF_TYPE_INVALID);
 		port_data->port_spif = bnxt_get_phy_port_id(port_id);
 		port_data->port_parif =
 			bnxt_get_parif(port_id, BNXT_ULP_INTF_TYPE_INVALID);
 		port_data->port_vport = bnxt_get_vport(port_id);
 		port_data->port_valid = true;
 	}
-
 	return 0;
 }
 
diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c
new file mode 100644
index 0000000000..8054bac189
--- /dev/null
+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c
@@ -0,0 +1,412 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2014-2021 Broadcom
+ * All rights reserved.
+ */
+
+#include "ulp_template_db_enum.h"
+#include "ulp_template_struct.h"
+#include "ulp_rte_parser.h"
+
+/*
+ * This structure has to be indexed based on the rte_flow_action_type that is
+ * part of DPDK. The below array is list of parsing functions for each of the
+ * flow actions that are supported.
+ */
+struct bnxt_ulp_rte_act_info ulp_act_info[] = {
+	[RTE_FLOW_ACTION_TYPE_END] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_END,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_VOID] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_void_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_PASSTHRU] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_JUMP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_jump_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_MARK] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_mark_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_FLAG] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_QUEUE] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_DROP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_drop_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_COUNT] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_count_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_RSS] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_rss_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_PF] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_pf_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_VF] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_vf_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_PHY_PORT] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_phy_port_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_PORT_ID] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_port_id_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_METER] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_SECURITY] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_of_pop_vlan_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_of_push_vlan_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_of_set_vlan_vid_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_of_set_vlan_pcp_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_vxlan_encap_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_vxlan_decap_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_set_ipv4_src_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_set_ipv4_dst_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_set_tp_src_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_set_tp_dst_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_DEC_TTL] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
+	.proto_act_func          = ulp_rte_dec_ttl_act_handler
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_TTL] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	},
+	[RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {
+	.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
+	.proto_act_func          = NULL
+	}
+};
+
+/*
+ * This table has to be indexed based on the rte_flow_item_type that is part of
+ * DPDK. The below array is list of parsing functions for each of the flow items
+ * that are supported.
+ */
+struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {
+	[RTE_FLOW_ITEM_TYPE_END] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_END,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_VOID] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_void_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_INVERT] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ANY] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_PF] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_pf_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_VF] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_vf_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_phy_port_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_PORT_ID] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_port_id_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_RAW] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ETH] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_eth_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_VLAN] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_vlan_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_IPV4] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_ipv4_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_IPV6] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_ipv6_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_ICMP] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_UDP] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_udp_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_TCP] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_tcp_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_SCTP] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_VXLAN] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
+	.proto_hdr_func          = ulp_rte_vxlan_hdr_handler
+	},
+	[RTE_FLOW_ITEM_TYPE_E_TAG] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_NVGRE] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_MPLS] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_GRE] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_FUZZY] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_GTP] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_GTPC] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_GTPU] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ESP] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_GENEVE] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ICMP6] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_MARK] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_META] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_GRE_KEY] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_GTP_PSC] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_PPPOES] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_PPPOED] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_NSH] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_IGMP] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_AH] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	},
+	[RTE_FLOW_ITEM_TYPE_HIGIG2] = {
+	.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
+	.proto_hdr_func          = NULL
+	}
+};
diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
index 3fb29c0cb4..f5f9ff6839 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
@@ -3,7 +3,6 @@ 
  * All rights reserved.
  */
 
-#include <rte_vxlan.h>
 #include "bnxt.h"
 #include "ulp_template_db_enum.h"
 #include "ulp_template_struct.h"
@@ -228,11 +227,6 @@  bnxt_ulp_comp_fld_intf_update(struct ulp_rte_parser_params *params)
 					    BNXT_ULP_CF_IDX_VF_FUNC_PARIF,
 					    parif);
 
-			/* populate the loopback parif */
-			ULP_COMP_FLD_IDX_WR(params,
-					    BNXT_ULP_CF_IDX_LOOPBACK_PARIF,
-					    BNXT_ULP_SYM_VF_FUNC_PARIF);
-
 		} else {
 			/* Set DRV func PARIF */
 			if (ulp_port_db_parif_get(params->ulp_ctx, ifindex,
@@ -301,6 +295,9 @@  ulp_post_process_normal_flow(struct ulp_rte_parser_params *params)
 	/* Merge the hdr_fp_bit into the proto header bit */
 	params->hdr_bitmap.bits |= params->hdr_fp_bit.bits;
 
+	/* Update the comp fld fid */
+	ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_FID, params->fid);
+
 	/* Update the computed interface parameters */
 	bnxt_ulp_comp_fld_intf_update(params);
 
@@ -686,10 +683,8 @@  ulp_rte_eth_hdr_handler(const struct rte_flow_item *item,
 		ulp_rte_prsr_mask_copy(params, &idx, &eth_mask->type,
 				       sizeof(eth_mask->type));
 	}
-	/* Add number of vlan header elements */
+	/* Add number of Eth header elements */
 	params->field_idx += BNXT_ULP_PROTO_HDR_ETH_NUM;
-	params->vlan_idx = params->field_idx;
-	params->field_idx += BNXT_ULP_PROTO_HDR_VLAN_NUM;
 
 	/* Update the protocol hdr bitmap */
 	if (ULP_BITMAP_ISSET(params->hdr_bitmap.bits,
@@ -722,7 +717,7 @@  ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
 	const struct rte_flow_item_vlan *vlan_mask = item->mask;
 	struct ulp_rte_hdr_field *field;
 	struct ulp_rte_hdr_bitmap	*hdr_bit;
-	uint32_t idx = params->vlan_idx;
+	uint32_t idx = params->field_idx;
 	uint16_t vlan_tag, priority;
 	uint32_t outer_vtag_num;
 	uint32_t inner_vtag_num;
@@ -781,8 +776,8 @@  ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
 		ulp_rte_prsr_mask_copy(params, &idx, &vlan_mask->inner_type,
 				       sizeof(vlan_mask->inner_type));
 	}
-	/* Set the vlan index to new incremented value */
-	params->vlan_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
+	/* Set the field index to new incremented value */
+	params->field_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
 
 	/* Get the outer tag and inner tag counts */
 	outer_vtag_num = ULP_COMP_FLD_IDX_RD(params,
@@ -1013,13 +1008,6 @@  ulp_rte_ipv4_hdr_handler(const struct rte_flow_item *item,
 		ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, 1);
 	}
 
-	/* Some of the PMD applications may set the protocol field
-	 * in the IPv4 spec but don't set the mask. So, consider
-	 * the mask in the proto value calculation.
-	 */
-	if (ipv4_mask)
-		proto &= ipv4_mask->hdr.next_proto_id;
-
 	/* Update the field protocol hdr bitmap */
 	ulp_rte_l3_proto_type_update(params, proto, inner_flag);
 	ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L3_HDR_CNT, ++cnt);
@@ -1117,8 +1105,8 @@  ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,
 				       &vtcf_mask,
 				       size);
 		/*
-		 * The TC and flow label field are ignored since OVS is
-		 * setting it for match and it is not supported.
+		 * The TC and flow label field are ignored since OVS is setting
+		 * it for match and it is not supported.
 		 * This is a work around and
 		 * shall be addressed in the future.
 		 */
@@ -1158,13 +1146,6 @@  ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,
 		ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, 1);
 	}
 
-	/* Some of the PMD applications may set the protocol field
-	 * in the IPv6 spec but don't set the mask. So, consider
-	 * the mask in proto value calculation.
-	 */
-	if (ipv6_mask)
-		proto &= ipv6_mask->hdr.proto;
-
 	/* Update the field protocol hdr bitmap */
 	ulp_rte_l3_proto_type_update(params, proto, inner_flag);
 	ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L3_HDR_CNT, ++cnt);
@@ -1549,7 +1530,7 @@  ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
 		buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG];
 		ulp_encap_buffer_copy(buff,
 				      item->spec,
-				      sizeof(struct rte_vlan_hdr),
+				      sizeof(struct rte_flow_item_vlan),
 				      ULP_BUFFER_ALIGN_8_BYTE);
 
 		if (!ulp_rte_item_skip_void(&item, 1))
@@ -1560,15 +1541,15 @@  ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
 	if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
 		vlan_num++;
 		memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG +
-		       sizeof(struct rte_vlan_hdr)],
+		       sizeof(struct rte_flow_item_vlan)],
 		       item->spec,
-		       sizeof(struct rte_vlan_hdr));
+		       sizeof(struct rte_flow_item_vlan));
 		if (!ulp_rte_item_skip_void(&item, 1))
 			return BNXT_TF_RC_ERROR;
 	}
 	/* Update the vlan count and size of more than one */
 	if (vlan_num) {
-		vlan_size = vlan_num * sizeof(struct rte_vlan_hdr);
+		vlan_size = vlan_num * sizeof(struct rte_flow_item_vlan);
 		vlan_num = tfp_cpu_to_be_32(vlan_num);
 		memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM],
 		       &vlan_num,
@@ -1727,7 +1708,7 @@  ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
 		BNXT_TF_DBG(ERR, "vxlan encap does not have vni\n");
 		return BNXT_TF_RC_ERROR;
 	}
-	vxlan_size = sizeof(struct rte_vxlan_hdr);
+	vxlan_size = sizeof(struct rte_flow_item_vxlan);
 	/* copy the vxlan details */
 	memcpy(&vxlan_spec, item->spec, vxlan_size);
 	vxlan_spec.flags = 0x08;
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c
index 92d3c043ef..4cb532adb7 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c
@@ -3,813 +3,141 @@ 
  * All rights reserved.
  */
 
+/* date: Mon Nov 23 17:33:02 2020 */
+
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
 #include "ulp_template_struct.h"
-#include "ulp_rte_parser.h"
+#include "ulp_template_db_tbl.h"
 
 /*
  * Action signature table:
  * maps hash id to ulp_act_match_list[] index
  */
 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
-	[BNXT_ULP_ACT_HID_015a] = 1,
-	[BNXT_ULP_ACT_HID_00eb] = 2,
-	[BNXT_ULP_ACT_HID_0043] = 3,
-	[BNXT_ULP_ACT_HID_03d8] = 4,
-	[BNXT_ULP_ACT_HID_02c1] = 5,
-	[BNXT_ULP_ACT_HID_015e] = 6,
-	[BNXT_ULP_ACT_HID_00ef] = 7,
-	[BNXT_ULP_ACT_HID_0047] = 8,
-	[BNXT_ULP_ACT_HID_03dc] = 9,
-	[BNXT_ULP_ACT_HID_02c5] = 10,
-	[BNXT_ULP_ACT_HID_025b] = 11,
-	[BNXT_ULP_ACT_HID_01ec] = 12,
-	[BNXT_ULP_ACT_HID_0144] = 13,
-	[BNXT_ULP_ACT_HID_04d9] = 14,
-	[BNXT_ULP_ACT_HID_03c2] = 15,
-	[BNXT_ULP_ACT_HID_025f] = 16,
-	[BNXT_ULP_ACT_HID_01f0] = 17,
-	[BNXT_ULP_ACT_HID_0148] = 18,
-	[BNXT_ULP_ACT_HID_04dd] = 19,
-	[BNXT_ULP_ACT_HID_03c6] = 20,
-	[BNXT_ULP_ACT_HID_0000] = 21,
-	[BNXT_ULP_ACT_HID_0002] = 22,
-	[BNXT_ULP_ACT_HID_0800] = 23,
-	[BNXT_ULP_ACT_HID_0101] = 24,
-	[BNXT_ULP_ACT_HID_0020] = 25,
-	[BNXT_ULP_ACT_HID_0901] = 26,
-	[BNXT_ULP_ACT_HID_0121] = 27,
-	[BNXT_ULP_ACT_HID_0004] = 28,
-	[BNXT_ULP_ACT_HID_0006] = 29,
-	[BNXT_ULP_ACT_HID_0804] = 30,
-	[BNXT_ULP_ACT_HID_0105] = 31,
-	[BNXT_ULP_ACT_HID_0024] = 32,
-	[BNXT_ULP_ACT_HID_0905] = 33,
-	[BNXT_ULP_ACT_HID_0125] = 34,
-	[BNXT_ULP_ACT_HID_0001] = 35,
-	[BNXT_ULP_ACT_HID_0005] = 36,
-	[BNXT_ULP_ACT_HID_0009] = 37,
-	[BNXT_ULP_ACT_HID_000d] = 38,
-	[BNXT_ULP_ACT_HID_0021] = 39,
-	[BNXT_ULP_ACT_HID_0029] = 40,
-	[BNXT_ULP_ACT_HID_0025] = 41,
-	[BNXT_ULP_ACT_HID_002d] = 42,
-	[BNXT_ULP_ACT_HID_0801] = 43,
-	[BNXT_ULP_ACT_HID_0809] = 44,
-	[BNXT_ULP_ACT_HID_0805] = 45,
-	[BNXT_ULP_ACT_HID_080d] = 46,
-	[BNXT_ULP_ACT_HID_0c15] = 47,
-	[BNXT_ULP_ACT_HID_0c19] = 48,
-	[BNXT_ULP_ACT_HID_02f6] = 49,
-	[BNXT_ULP_ACT_HID_04f8] = 50,
-	[BNXT_ULP_ACT_HID_01df] = 51,
-	[BNXT_ULP_ACT_HID_07e5] = 52,
-	[BNXT_ULP_ACT_HID_06ce] = 53,
-	[BNXT_ULP_ACT_HID_02fa] = 54,
-	[BNXT_ULP_ACT_HID_04fc] = 55,
-	[BNXT_ULP_ACT_HID_01e3] = 56,
-	[BNXT_ULP_ACT_HID_07e9] = 57,
-	[BNXT_ULP_ACT_HID_06d2] = 58,
-	[BNXT_ULP_ACT_HID_03f7] = 59,
-	[BNXT_ULP_ACT_HID_05f9] = 60,
-	[BNXT_ULP_ACT_HID_02e0] = 61,
-	[BNXT_ULP_ACT_HID_08e6] = 62,
-	[BNXT_ULP_ACT_HID_07cf] = 63,
-	[BNXT_ULP_ACT_HID_03fb] = 64,
-	[BNXT_ULP_ACT_HID_05fd] = 65,
-	[BNXT_ULP_ACT_HID_02e4] = 66,
-	[BNXT_ULP_ACT_HID_08ea] = 67,
-	[BNXT_ULP_ACT_HID_07d3] = 68,
-	[BNXT_ULP_ACT_HID_040d] = 69,
-	[BNXT_ULP_ACT_HID_040f] = 70,
-	[BNXT_ULP_ACT_HID_0413] = 71,
-	[BNXT_ULP_ACT_HID_0567] = 72,
-	[BNXT_ULP_ACT_HID_0a49] = 73,
-	[BNXT_ULP_ACT_HID_050e] = 74,
-	[BNXT_ULP_ACT_HID_0668] = 75,
-	[BNXT_ULP_ACT_HID_0b4a] = 76,
-	[BNXT_ULP_ACT_HID_0411] = 77,
-	[BNXT_ULP_ACT_HID_056b] = 78,
-	[BNXT_ULP_ACT_HID_0a4d] = 79,
-	[BNXT_ULP_ACT_HID_0512] = 80,
-	[BNXT_ULP_ACT_HID_066c] = 81,
-	[BNXT_ULP_ACT_HID_0b4e] = 82
+	[BNXT_ULP_ACT_HID_0000] = 1,
+	[BNXT_ULP_ACT_HID_0001] = 2,
+	[BNXT_ULP_ACT_HID_0400] = 3,
+	[BNXT_ULP_ACT_HID_0331] = 4,
+	[BNXT_ULP_ACT_HID_0010] = 5,
+	[BNXT_ULP_ACT_HID_0731] = 6,
+	[BNXT_ULP_ACT_HID_0341] = 7,
+	[BNXT_ULP_ACT_HID_0002] = 8,
+	[BNXT_ULP_ACT_HID_0003] = 9,
+	[BNXT_ULP_ACT_HID_0402] = 10,
+	[BNXT_ULP_ACT_HID_0333] = 11,
+	[BNXT_ULP_ACT_HID_0012] = 12,
+	[BNXT_ULP_ACT_HID_0733] = 13,
+	[BNXT_ULP_ACT_HID_0343] = 14
 };
 
 /* Array for the act matcher list */
 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	[1] = {
-	.act_hid = BNXT_ULP_ACT_HID_015a,
+	.act_hid = BNXT_ULP_ACT_HID_0000,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[2] = {
-	.act_hid = BNXT_ULP_ACT_HID_00eb,
+	.act_hid = BNXT_ULP_ACT_HID_0001,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
+		BNXT_ULP_ACTION_BIT_DROP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[3] = {
-	.act_hid = BNXT_ULP_ACT_HID_0043,
+	.act_hid = BNXT_ULP_ACT_HID_0400,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACTION_BIT_POP_VLAN |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[4] = {
-	.act_hid = BNXT_ULP_ACT_HID_03d8,
+	.act_hid = BNXT_ULP_ACT_HID_0331,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
+		BNXT_ULP_ACTION_BIT_DEC_TTL |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[5] = {
-	.act_hid = BNXT_ULP_ACT_HID_02c1,
+	.act_hid = BNXT_ULP_ACT_HID_0010,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
+		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[6] = {
-	.act_hid = BNXT_ULP_ACT_HID_015e,
+	.act_hid = BNXT_ULP_ACT_HID_0731,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACTION_BIT_DEC_TTL |
+		BNXT_ULP_ACTION_BIT_POP_VLAN |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[7] = {
-	.act_hid = BNXT_ULP_ACT_HID_00ef,
+	.act_hid = BNXT_ULP_ACT_HID_0341,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
+		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
+		BNXT_ULP_ACTION_BIT_DEC_TTL |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[8] = {
-	.act_hid = BNXT_ULP_ACT_HID_0047,
+	.act_hid = BNXT_ULP_ACT_HID_0002,
 	.act_sig = { .bits =
 		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[9] = {
-	.act_hid = BNXT_ULP_ACT_HID_03dc,
+	.act_hid = BNXT_ULP_ACT_HID_0003,
 	.act_sig = { .bits =
 		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
+		BNXT_ULP_ACTION_BIT_DROP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[10] = {
-	.act_hid = BNXT_ULP_ACT_HID_02c5,
+	.act_hid = BNXT_ULP_ACT_HID_0402,
 	.act_sig = { .bits =
 		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
+		BNXT_ULP_ACTION_BIT_POP_VLAN |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
 	[11] = {
-	.act_hid = BNXT_ULP_ACT_HID_025b,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[12] = {
-	.act_hid = BNXT_ULP_ACT_HID_01ec,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[13] = {
-	.act_hid = BNXT_ULP_ACT_HID_0144,
+	.act_hid = BNXT_ULP_ACT_HID_0333,
 	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[14] = {
-	.act_hid = BNXT_ULP_ACT_HID_04d9,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[15] = {
-	.act_hid = BNXT_ULP_ACT_HID_03c2,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[16] = {
-	.act_hid = BNXT_ULP_ACT_HID_025f,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
 		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[17] = {
-	.act_hid = BNXT_ULP_ACT_HID_01f0,
-	.act_sig = { .bits =
 		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 1
 	},
-	[18] = {
-	.act_hid = BNXT_ULP_ACT_HID_0148,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[19] = {
-	.act_hid = BNXT_ULP_ACT_HID_04dd,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[20] = {
-	.act_hid = BNXT_ULP_ACT_HID_03c6,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 1
-	},
-	[21] = {
-	.act_hid = BNXT_ULP_ACT_HID_0000,
-	.act_sig = { .bits =
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[22] = {
-	.act_hid = BNXT_ULP_ACT_HID_0002,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DROP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[23] = {
-	.act_hid = BNXT_ULP_ACT_HID_0800,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_POP_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[24] = {
-	.act_hid = BNXT_ULP_ACT_HID_0101,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[25] = {
-	.act_hid = BNXT_ULP_ACT_HID_0020,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[26] = {
-	.act_hid = BNXT_ULP_ACT_HID_0901,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_POP_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[27] = {
-	.act_hid = BNXT_ULP_ACT_HID_0121,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[28] = {
-	.act_hid = BNXT_ULP_ACT_HID_0004,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[29] = {
-	.act_hid = BNXT_ULP_ACT_HID_0006,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_DROP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[30] = {
-	.act_hid = BNXT_ULP_ACT_HID_0804,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_POP_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[31] = {
-	.act_hid = BNXT_ULP_ACT_HID_0105,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[32] = {
-	.act_hid = BNXT_ULP_ACT_HID_0024,
+	[12] = {
+	.act_hid = BNXT_ULP_ACT_HID_0012,
 	.act_sig = { .bits =
 		BNXT_ULP_ACTION_BIT_COUNT |
 		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
+	.act_tid = 1
 	},
-	[33] = {
-	.act_hid = BNXT_ULP_ACT_HID_0905,
+	[13] = {
+	.act_hid = BNXT_ULP_ACT_HID_0733,
 	.act_sig = { .bits =
 		BNXT_ULP_ACTION_BIT_COUNT |
 		BNXT_ULP_ACTION_BIT_DEC_TTL |
 		BNXT_ULP_ACTION_BIT_POP_VLAN |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
+	.act_tid = 1
 	},
-	[34] = {
-	.act_hid = BNXT_ULP_ACT_HID_0125,
+	[14] = {
+	.act_hid = BNXT_ULP_ACT_HID_0343,
 	.act_sig = { .bits =
 		BNXT_ULP_ACTION_BIT_COUNT |
 		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
 		BNXT_ULP_ACTION_BIT_DEC_TTL |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 2
-	},
-	[35] = {
-	.act_hid = BNXT_ULP_ACT_HID_0001,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[36] = {
-	.act_hid = BNXT_ULP_ACT_HID_0005,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[37] = {
-	.act_hid = BNXT_ULP_ACT_HID_0009,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_RSS |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[38] = {
-	.act_hid = BNXT_ULP_ACT_HID_000d,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_RSS |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[39] = {
-	.act_hid = BNXT_ULP_ACT_HID_0021,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[40] = {
-	.act_hid = BNXT_ULP_ACT_HID_0029,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_RSS |
-		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[41] = {
-	.act_hid = BNXT_ULP_ACT_HID_0025,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[42] = {
-	.act_hid = BNXT_ULP_ACT_HID_002d,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_RSS |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_VXLAN_DECAP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[43] = {
-	.act_hid = BNXT_ULP_ACT_HID_0801,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_POP_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[44] = {
-	.act_hid = BNXT_ULP_ACT_HID_0809,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_RSS |
-		BNXT_ULP_ACTION_BIT_POP_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[45] = {
-	.act_hid = BNXT_ULP_ACT_HID_0805,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_POP_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[46] = {
-	.act_hid = BNXT_ULP_ACT_HID_080d,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_MARK |
-		BNXT_ULP_ACTION_BIT_RSS |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_POP_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.act_tid = 3
-	},
-	[47] = {
-	.act_hid = BNXT_ULP_ACT_HID_0c15,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_VXLAN_ENCAP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 4
-	},
-	[48] = {
-	.act_hid = BNXT_ULP_ACT_HID_0c19,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_VXLAN_ENCAP |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 4
-	},
-	[49] = {
-	.act_hid = BNXT_ULP_ACT_HID_02f6,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[50] = {
-	.act_hid = BNXT_ULP_ACT_HID_04f8,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[51] = {
-	.act_hid = BNXT_ULP_ACT_HID_01df,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[52] = {
-	.act_hid = BNXT_ULP_ACT_HID_07e5,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[53] = {
-	.act_hid = BNXT_ULP_ACT_HID_06ce,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[54] = {
-	.act_hid = BNXT_ULP_ACT_HID_02fa,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[55] = {
-	.act_hid = BNXT_ULP_ACT_HID_04fc,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[56] = {
-	.act_hid = BNXT_ULP_ACT_HID_01e3,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[57] = {
-	.act_hid = BNXT_ULP_ACT_HID_07e9,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[58] = {
-	.act_hid = BNXT_ULP_ACT_HID_06d2,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[59] = {
-	.act_hid = BNXT_ULP_ACT_HID_03f7,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[60] = {
-	.act_hid = BNXT_ULP_ACT_HID_05f9,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[61] = {
-	.act_hid = BNXT_ULP_ACT_HID_02e0,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[62] = {
-	.act_hid = BNXT_ULP_ACT_HID_08e6,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[63] = {
-	.act_hid = BNXT_ULP_ACT_HID_07cf,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[64] = {
-	.act_hid = BNXT_ULP_ACT_HID_03fb,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[65] = {
-	.act_hid = BNXT_ULP_ACT_HID_05fd,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[66] = {
-	.act_hid = BNXT_ULP_ACT_HID_02e4,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[67] = {
-	.act_hid = BNXT_ULP_ACT_HID_08ea,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[68] = {
-	.act_hid = BNXT_ULP_ACT_HID_07d3,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_SRC |
-		BNXT_ULP_ACTION_BIT_SET_IPV4_DST |
-		BNXT_ULP_ACTION_BIT_SET_TP_SRC |
-		BNXT_ULP_ACTION_BIT_SET_TP_DST |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 5
-	},
-	[69] = {
-	.act_hid = BNXT_ULP_ACT_HID_040d,
-	.act_sig = { .bits =
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[70] = {
-	.act_hid = BNXT_ULP_ACT_HID_040f,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DROP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[71] = {
-	.act_hid = BNXT_ULP_ACT_HID_0413,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DROP |
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[72] = {
-	.act_hid = BNXT_ULP_ACT_HID_0567,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[73] = {
-	.act_hid = BNXT_ULP_ACT_HID_0a49,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[74] = {
-	.act_hid = BNXT_ULP_ACT_HID_050e,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[75] = {
-	.act_hid = BNXT_ULP_ACT_HID_0668,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[76] = {
-	.act_hid = BNXT_ULP_ACT_HID_0b4a,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[77] = {
-	.act_hid = BNXT_ULP_ACT_HID_0411,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[78] = {
-	.act_hid = BNXT_ULP_ACT_HID_056b,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[79] = {
-	.act_hid = BNXT_ULP_ACT_HID_0a4d,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[80] = {
-	.act_hid = BNXT_ULP_ACT_HID_0512,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[81] = {
-	.act_hid = BNXT_ULP_ACT_HID_066c,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_PCP |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
-	},
-	[82] = {
-	.act_hid = BNXT_ULP_ACT_HID_0b4e,
-	.act_sig = { .bits =
-		BNXT_ULP_ACTION_BIT_COUNT |
-		BNXT_ULP_ACTION_BIT_DEC_TTL |
-		BNXT_ULP_ACTION_BIT_SET_VLAN_VID |
-		BNXT_ULP_ACTION_BIT_PUSH_VLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.act_tid = 6
+	.act_tid = 1
 	}
 };
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
index 5c3e714f48..3cee406866 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
@@ -3,10 +3,12 @@ 
  * All rights reserved.
  */
 
+/* date: Mon Nov 23 17:33:02 2020 */
+
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
 #include "ulp_template_struct.h"
-#include "ulp_rte_parser.h"
+#include "ulp_template_db_tbl.h"
 
 /* Define the template structures */
 /*
@@ -14,437 +16,336 @@ 
  * maps hash id to ulp_class_match_list[] index
  */
 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
-	[BNXT_ULP_CLASS_HID_0138] = 1,
-	[BNXT_ULP_CLASS_HID_03f0] = 2,
-	[BNXT_ULP_CLASS_HID_0139] = 3,
-	[BNXT_ULP_CLASS_HID_03f1] = 4,
-	[BNXT_ULP_CLASS_HID_068b] = 5,
-	[BNXT_ULP_CLASS_HID_0143] = 6,
-	[BNXT_ULP_CLASS_HID_0118] = 7,
-	[BNXT_ULP_CLASS_HID_03d0] = 8,
-	[BNXT_ULP_CLASS_HID_0119] = 9,
-	[BNXT_ULP_CLASS_HID_03d1] = 10,
-	[BNXT_ULP_CLASS_HID_06ab] = 11,
-	[BNXT_ULP_CLASS_HID_0163] = 12,
-	[BNXT_ULP_CLASS_HID_0128] = 13,
-	[BNXT_ULP_CLASS_HID_03e0] = 14,
-	[BNXT_ULP_CLASS_HID_0129] = 15,
-	[BNXT_ULP_CLASS_HID_03e1] = 16,
-	[BNXT_ULP_CLASS_HID_069b] = 17,
-	[BNXT_ULP_CLASS_HID_0153] = 18,
-	[BNXT_ULP_CLASS_HID_0134] = 19,
-	[BNXT_ULP_CLASS_HID_03fc] = 20,
-	[BNXT_ULP_CLASS_HID_0135] = 21,
-	[BNXT_ULP_CLASS_HID_03fd] = 22,
-	[BNXT_ULP_CLASS_HID_0687] = 23,
-	[BNXT_ULP_CLASS_HID_014f] = 24,
-	[BNXT_ULP_CLASS_HID_0114] = 25,
-	[BNXT_ULP_CLASS_HID_03dc] = 26,
-	[BNXT_ULP_CLASS_HID_0115] = 27,
-	[BNXT_ULP_CLASS_HID_03dd] = 28,
-	[BNXT_ULP_CLASS_HID_06a7] = 29,
-	[BNXT_ULP_CLASS_HID_016f] = 30,
-	[BNXT_ULP_CLASS_HID_0124] = 31,
-	[BNXT_ULP_CLASS_HID_03ec] = 32,
-	[BNXT_ULP_CLASS_HID_0125] = 33,
-	[BNXT_ULP_CLASS_HID_03ed] = 34,
-	[BNXT_ULP_CLASS_HID_0697] = 35,
-	[BNXT_ULP_CLASS_HID_015f] = 36,
-	[BNXT_ULP_CLASS_HID_0452] = 37,
-	[BNXT_ULP_CLASS_HID_0528] = 38,
-	[BNXT_ULP_CLASS_HID_0790] = 39,
-	[BNXT_ULP_CLASS_HID_046e] = 40,
-	[BNXT_ULP_CLASS_HID_0462] = 41,
-	[BNXT_ULP_CLASS_HID_0518] = 42,
-	[BNXT_ULP_CLASS_HID_07a0] = 43,
-	[BNXT_ULP_CLASS_HID_045e] = 44,
-	[BNXT_ULP_CLASS_HID_0228] = 45,
-	[BNXT_ULP_CLASS_HID_06d0] = 46,
-	[BNXT_ULP_CLASS_HID_02be] = 47,
-	[BNXT_ULP_CLASS_HID_07a6] = 48,
-	[BNXT_ULP_CLASS_HID_0218] = 49,
-	[BNXT_ULP_CLASS_HID_06e0] = 50,
-	[BNXT_ULP_CLASS_HID_028e] = 51,
-	[BNXT_ULP_CLASS_HID_0796] = 52,
-	[BNXT_ULP_CLASS_HID_079c] = 53,
-	[BNXT_ULP_CLASS_HID_0654] = 54,
-	[BNXT_ULP_CLASS_HID_06d2] = 55,
-	[BNXT_ULP_CLASS_HID_058a] = 56,
-	[BNXT_ULP_CLASS_HID_052f] = 57,
-	[BNXT_ULP_CLASS_HID_07e7] = 58,
-	[BNXT_ULP_CLASS_HID_079d] = 59,
-	[BNXT_ULP_CLASS_HID_0655] = 60,
-	[BNXT_ULP_CLASS_HID_046d] = 61,
-	[BNXT_ULP_CLASS_HID_0725] = 62,
-	[BNXT_ULP_CLASS_HID_06d3] = 63,
-	[BNXT_ULP_CLASS_HID_058b] = 64,
-	[BNXT_ULP_CLASS_HID_07ac] = 65,
-	[BNXT_ULP_CLASS_HID_0664] = 66,
-	[BNXT_ULP_CLASS_HID_06e2] = 67,
-	[BNXT_ULP_CLASS_HID_05ba] = 68,
-	[BNXT_ULP_CLASS_HID_051f] = 69,
-	[BNXT_ULP_CLASS_HID_07d7] = 70,
-	[BNXT_ULP_CLASS_HID_07ad] = 71,
-	[BNXT_ULP_CLASS_HID_0665] = 72,
-	[BNXT_ULP_CLASS_HID_045d] = 73,
-	[BNXT_ULP_CLASS_HID_0715] = 74,
-	[BNXT_ULP_CLASS_HID_06e3] = 75,
-	[BNXT_ULP_CLASS_HID_05bb] = 76,
-	[BNXT_ULP_CLASS_HID_016a] = 77,
-	[BNXT_ULP_CLASS_HID_03d2] = 78,
-	[BNXT_ULP_CLASS_HID_0612] = 79,
-	[BNXT_ULP_CLASS_HID_00da] = 80,
-	[BNXT_ULP_CLASS_HID_06bd] = 81,
-	[BNXT_ULP_CLASS_HID_0165] = 82,
-	[BNXT_ULP_CLASS_HID_016b] = 83,
-	[BNXT_ULP_CLASS_HID_03d3] = 84,
-	[BNXT_ULP_CLASS_HID_03a5] = 85,
-	[BNXT_ULP_CLASS_HID_066d] = 86,
-	[BNXT_ULP_CLASS_HID_0613] = 87,
-	[BNXT_ULP_CLASS_HID_00db] = 88,
-	[BNXT_ULP_CLASS_HID_015a] = 89,
-	[BNXT_ULP_CLASS_HID_03e2] = 90,
-	[BNXT_ULP_CLASS_HID_0622] = 91,
-	[BNXT_ULP_CLASS_HID_00ea] = 92,
-	[BNXT_ULP_CLASS_HID_068d] = 93,
-	[BNXT_ULP_CLASS_HID_0155] = 94,
-	[BNXT_ULP_CLASS_HID_015b] = 95,
-	[BNXT_ULP_CLASS_HID_03e3] = 96,
-	[BNXT_ULP_CLASS_HID_0395] = 97,
-	[BNXT_ULP_CLASS_HID_065d] = 98,
-	[BNXT_ULP_CLASS_HID_0623] = 99,
-	[BNXT_ULP_CLASS_HID_00eb] = 100,
-	[BNXT_ULP_CLASS_HID_04bc] = 101,
-	[BNXT_ULP_CLASS_HID_0442] = 102,
-	[BNXT_ULP_CLASS_HID_050a] = 103,
-	[BNXT_ULP_CLASS_HID_06ba] = 104,
-	[BNXT_ULP_CLASS_HID_0472] = 105,
-	[BNXT_ULP_CLASS_HID_0700] = 106,
-	[BNXT_ULP_CLASS_HID_04c8] = 107,
-	[BNXT_ULP_CLASS_HID_0678] = 108,
-	[BNXT_ULP_CLASS_HID_061f] = 109,
-	[BNXT_ULP_CLASS_HID_05ad] = 110,
-	[BNXT_ULP_CLASS_HID_06a5] = 111,
-	[BNXT_ULP_CLASS_HID_0455] = 112,
-	[BNXT_ULP_CLASS_HID_05dd] = 113,
-	[BNXT_ULP_CLASS_HID_0563] = 114,
-	[BNXT_ULP_CLASS_HID_059b] = 115,
-	[BNXT_ULP_CLASS_HID_070b] = 116,
-	[BNXT_ULP_CLASS_HID_04bd] = 117,
-	[BNXT_ULP_CLASS_HID_0443] = 118,
-	[BNXT_ULP_CLASS_HID_050b] = 119,
-	[BNXT_ULP_CLASS_HID_06bb] = 120,
-	[BNXT_ULP_CLASS_HID_0473] = 121,
-	[BNXT_ULP_CLASS_HID_0701] = 122,
-	[BNXT_ULP_CLASS_HID_04c9] = 123,
-	[BNXT_ULP_CLASS_HID_0679] = 124,
-	[BNXT_ULP_CLASS_HID_05e2] = 125,
-	[BNXT_ULP_CLASS_HID_00b0] = 126,
-	[BNXT_ULP_CLASS_HID_0648] = 127,
-	[BNXT_ULP_CLASS_HID_03f8] = 128,
-	[BNXT_ULP_CLASS_HID_02ea] = 129,
-	[BNXT_ULP_CLASS_HID_05b8] = 130,
-	[BNXT_ULP_CLASS_HID_0370] = 131,
-	[BNXT_ULP_CLASS_HID_00e0] = 132,
-	[BNXT_ULP_CLASS_HID_0745] = 133,
-	[BNXT_ULP_CLASS_HID_0213] = 134,
-	[BNXT_ULP_CLASS_HID_031b] = 135,
-	[BNXT_ULP_CLASS_HID_008b] = 136,
-	[BNXT_ULP_CLASS_HID_044d] = 137,
-	[BNXT_ULP_CLASS_HID_071b] = 138,
-	[BNXT_ULP_CLASS_HID_0003] = 139,
-	[BNXT_ULP_CLASS_HID_05b3] = 140,
-	[BNXT_ULP_CLASS_HID_05e3] = 141,
-	[BNXT_ULP_CLASS_HID_00b1] = 142,
-	[BNXT_ULP_CLASS_HID_0649] = 143,
-	[BNXT_ULP_CLASS_HID_03f9] = 144,
-	[BNXT_ULP_CLASS_HID_02eb] = 145,
-	[BNXT_ULP_CLASS_HID_05b9] = 146,
-	[BNXT_ULP_CLASS_HID_0371] = 147,
-	[BNXT_ULP_CLASS_HID_00e1] = 148,
-	[BNXT_ULP_CLASS_HID_0000] = 149,
-	[BNXT_ULP_CLASS_HID_00ce] = 150,
-	[BNXT_ULP_CLASS_HID_01b6] = 151,
-	[BNXT_ULP_CLASS_HID_0074] = 152,
-	[BNXT_ULP_CLASS_HID_00fe] = 153,
-	[BNXT_ULP_CLASS_HID_03bc] = 154,
-	[BNXT_ULP_CLASS_HID_0206] = 155,
-	[BNXT_ULP_CLASS_HID_02c4] = 156,
-	[BNXT_ULP_CLASS_HID_055a] = 157,
-	[BNXT_ULP_CLASS_HID_045a] = 158,
-	[BNXT_ULP_CLASS_HID_061a] = 159,
-	[BNXT_ULP_CLASS_HID_051a] = 160,
-	[BNXT_ULP_CLASS_HID_074a] = 161,
-	[BNXT_ULP_CLASS_HID_004e] = 162,
-	[BNXT_ULP_CLASS_HID_040a] = 163,
-	[BNXT_ULP_CLASS_HID_010e] = 164,
-	[BNXT_ULP_CLASS_HID_048b] = 165,
-	[BNXT_ULP_CLASS_HID_0749] = 166,
-	[BNXT_ULP_CLASS_HID_05f1] = 167,
-	[BNXT_ULP_CLASS_HID_04b7] = 168,
-	[BNXT_ULP_CLASS_HID_049b] = 169,
-	[BNXT_ULP_CLASS_HID_0759] = 170,
-	[BNXT_ULP_CLASS_HID_05e1] = 171,
-	[BNXT_ULP_CLASS_HID_04a7] = 172,
-	[BNXT_ULP_CLASS_HID_0301] = 173,
-	[BNXT_ULP_CLASS_HID_07f9] = 174,
-	[BNXT_ULP_CLASS_HID_0397] = 175,
-	[BNXT_ULP_CLASS_HID_068f] = 176,
-	[BNXT_ULP_CLASS_HID_02f1] = 177,
-	[BNXT_ULP_CLASS_HID_0609] = 178,
-	[BNXT_ULP_CLASS_HID_0267] = 179,
-	[BNXT_ULP_CLASS_HID_077f] = 180,
-	[BNXT_ULP_CLASS_HID_01e1] = 181,
-	[BNXT_ULP_CLASS_HID_0329] = 182,
-	[BNXT_ULP_CLASS_HID_01c1] = 183,
-	[BNXT_ULP_CLASS_HID_0309] = 184,
-	[BNXT_ULP_CLASS_HID_01d1] = 185,
-	[BNXT_ULP_CLASS_HID_0319] = 186,
-	[BNXT_ULP_CLASS_HID_01e2] = 187,
-	[BNXT_ULP_CLASS_HID_032a] = 188,
-	[BNXT_ULP_CLASS_HID_0650] = 189,
-	[BNXT_ULP_CLASS_HID_0198] = 190,
-	[BNXT_ULP_CLASS_HID_01c2] = 191,
-	[BNXT_ULP_CLASS_HID_030a] = 192,
-	[BNXT_ULP_CLASS_HID_0670] = 193,
-	[BNXT_ULP_CLASS_HID_01b8] = 194,
-	[BNXT_ULP_CLASS_HID_01d2] = 195,
-	[BNXT_ULP_CLASS_HID_031a] = 196,
-	[BNXT_ULP_CLASS_HID_0660] = 197,
-	[BNXT_ULP_CLASS_HID_01a8] = 198,
-	[BNXT_ULP_CLASS_HID_01dd] = 199,
-	[BNXT_ULP_CLASS_HID_0315] = 200,
-	[BNXT_ULP_CLASS_HID_003d] = 201,
-	[BNXT_ULP_CLASS_HID_02f5] = 202,
-	[BNXT_ULP_CLASS_HID_01cd] = 203,
-	[BNXT_ULP_CLASS_HID_0305] = 204,
-	[BNXT_ULP_CLASS_HID_01de] = 205,
-	[BNXT_ULP_CLASS_HID_0316] = 206,
-	[BNXT_ULP_CLASS_HID_066c] = 207,
-	[BNXT_ULP_CLASS_HID_01a4] = 208,
-	[BNXT_ULP_CLASS_HID_003e] = 209,
-	[BNXT_ULP_CLASS_HID_02f6] = 210,
-	[BNXT_ULP_CLASS_HID_078c] = 211,
-	[BNXT_ULP_CLASS_HID_0044] = 212,
-	[BNXT_ULP_CLASS_HID_01ce] = 213,
-	[BNXT_ULP_CLASS_HID_0306] = 214,
-	[BNXT_ULP_CLASS_HID_067c] = 215,
-	[BNXT_ULP_CLASS_HID_01b4] = 216
+	[BNXT_ULP_CLASS_HID_00fc] = 1,
+	[BNXT_ULP_CLASS_HID_0046] = 2,
+	[BNXT_ULP_CLASS_HID_0056] = 3,
+	[BNXT_ULP_CLASS_HID_00b8] = 4,
+	[BNXT_ULP_CLASS_HID_0041] = 5,
+	[BNXT_ULP_CLASS_HID_00ab] = 6,
+	[BNXT_ULP_CLASS_HID_0053] = 7,
+	[BNXT_ULP_CLASS_HID_00a5] = 8,
+	[BNXT_ULP_CLASS_HID_0069] = 9,
+	[BNXT_ULP_CLASS_HID_009d] = 10,
+	[BNXT_ULP_CLASS_HID_0005] = 11,
+	[BNXT_ULP_CLASS_HID_006f] = 12,
+	[BNXT_ULP_CLASS_HID_00af] = 13,
+	[BNXT_ULP_CLASS_HID_00d3] = 14,
+	[BNXT_ULP_CLASS_HID_005b] = 15,
+	[BNXT_ULP_CLASS_HID_00ad] = 16,
+	[BNXT_ULP_CLASS_HID_0091] = 17,
+	[BNXT_ULP_CLASS_HID_00fb] = 18,
+	[BNXT_ULP_CLASS_HID_0063] = 19,
+	[BNXT_ULP_CLASS_HID_0097] = 20,
+	[BNXT_ULP_CLASS_HID_00cc] = 21,
+	[BNXT_ULP_CLASS_HID_00f0] = 22,
+	[BNXT_ULP_CLASS_HID_00c0] = 23,
+	[BNXT_ULP_CLASS_HID_002a] = 24,
+	[BNXT_ULP_CLASS_HID_00c7] = 25,
+	[BNXT_ULP_CLASS_HID_0029] = 26,
+	[BNXT_ULP_CLASS_HID_00d1] = 27,
+	[BNXT_ULP_CLASS_HID_003b] = 28,
+	[BNXT_ULP_CLASS_HID_00ef] = 29,
+	[BNXT_ULP_CLASS_HID_0013] = 30,
+	[BNXT_ULP_CLASS_HID_009b] = 31,
+	[BNXT_ULP_CLASS_HID_00ed] = 32,
+	[BNXT_ULP_CLASS_HID_002d] = 33,
+	[BNXT_ULP_CLASS_HID_0051] = 34,
+	[BNXT_ULP_CLASS_HID_00d9] = 35,
+	[BNXT_ULP_CLASS_HID_0023] = 36,
+	[BNXT_ULP_CLASS_HID_0017] = 37,
+	[BNXT_ULP_CLASS_HID_0079] = 38,
+	[BNXT_ULP_CLASS_HID_00e1] = 39,
+	[BNXT_ULP_CLASS_HID_0015] = 40
 };
 
 /* Array for the proto matcher list */
 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 	[1] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0138,
+	.class_hid = BNXT_ULP_CLASS_HID_00fc,
+	.class_tid = 1,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 0
 	},
 	[2] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03f0,
+	.class_hid = BNXT_ULP_CLASS_HID_0046,
+	.class_tid = 1,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 1
 	},
 	[3] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0139,
+	.class_hid = BNXT_ULP_CLASS_HID_0056,
+	.class_tid = 1,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 2
 	},
 	[4] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03f1,
+	.class_hid = BNXT_ULP_CLASS_HID_00b8,
+	.class_tid = 1,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 3
 	},
 	[5] = {
-	.class_hid = BNXT_ULP_CLASS_HID_068b,
+	.class_hid = BNXT_ULP_CLASS_HID_0041,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 4
 	},
 	[6] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0143,
+	.class_hid = BNXT_ULP_CLASS_HID_00ab,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 5
 	},
 	[7] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0118,
+	.class_hid = BNXT_ULP_CLASS_HID_0053,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 6
 	},
 	[8] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03d0,
+	.class_hid = BNXT_ULP_CLASS_HID_00a5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 7
 	},
 	[9] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0119,
+	.class_hid = BNXT_ULP_CLASS_HID_0069,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 8
 	},
 	[10] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03d1,
+	.class_hid = BNXT_ULP_CLASS_HID_009d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 9
 	},
 	[11] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06ab,
+	.class_hid = BNXT_ULP_CLASS_HID_0005,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 10
 	},
 	[12] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0163,
+	.class_hid = BNXT_ULP_CLASS_HID_006f,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 11
 	},
 	[13] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0128,
+	.class_hid = BNXT_ULP_CLASS_HID_00af,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 12
 	},
 	[14] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03e0,
+	.class_hid = BNXT_ULP_CLASS_HID_00d3,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 13
 	},
 	[15] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0129,
+	.class_hid = BNXT_ULP_CLASS_HID_005b,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -452,15 +353,20 @@  struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 14
 	},
 	[16] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03e1,
+	.class_hid = BNXT_ULP_CLASS_HID_00ad,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -468,14 +374,21 @@  struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 15
 	},
 	[17] = {
-	.class_hid = BNXT_ULP_CLASS_HID_069b,
+	.class_hid = BNXT_ULP_CLASS_HID_0091,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -483,16 +396,20 @@  struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 16
 	},
 	[18] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0153,
+	.class_hid = BNXT_ULP_CLASS_HID_00fb,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -500,3486 +417,451 @@  struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 6,
-	.wc_pri = 17
 	},
 	[19] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0134,
+	.class_hid = BNXT_ULP_CLASS_HID_0063,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 0
 	},
 	[20] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03fc,
+	.class_hid = BNXT_ULP_CLASS_HID_0097,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 1
 	},
 	[21] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0135,
+	.class_hid = BNXT_ULP_CLASS_HID_00cc,
+	.class_tid = 2,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 2
 	},
 	[22] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03fd,
+	.class_hid = BNXT_ULP_CLASS_HID_00f0,
+	.class_tid = 2,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 3,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 3
 	},
 	[23] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0687,
+	.class_hid = BNXT_ULP_CLASS_HID_00c0,
+	.class_tid = 2,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 3,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 4
 	},
 	[24] = {
-	.class_hid = BNXT_ULP_CLASS_HID_014f,
+	.class_hid = BNXT_ULP_CLASS_HID_002a,
+	.class_tid = 2,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 3,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 5
 	},
 	[25] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0114,
+	.class_hid = BNXT_ULP_CLASS_HID_00c7,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 3,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 6
 	},
 	[26] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03dc,
+	.class_hid = BNXT_ULP_CLASS_HID_0029,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 3,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 7
 	},
 	[27] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0115,
+	.class_hid = BNXT_ULP_CLASS_HID_00d1,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 3,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 8
 	},
 	[28] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03dd,
+	.class_hid = BNXT_ULP_CLASS_HID_003b,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 9
 	},
 	[29] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06a7,
+	.class_hid = BNXT_ULP_CLASS_HID_00ef,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 10
 	},
 	[30] = {
-	.class_hid = BNXT_ULP_CLASS_HID_016f,
+	.class_hid = BNXT_ULP_CLASS_HID_0013,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 11
 	},
 	[31] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0124,
+	.class_hid = BNXT_ULP_CLASS_HID_009b,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 12
 	},
 	[32] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03ec,
+	.class_hid = BNXT_ULP_CLASS_HID_00ed,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 13
 	},
 	[33] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0125,
+	.class_hid = BNXT_ULP_CLASS_HID_002d,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 14
 	},
 	[34] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03ed,
+	.class_hid = BNXT_ULP_CLASS_HID_0051,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 15
 	},
 	[35] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0697,
+	.class_hid = BNXT_ULP_CLASS_HID_00d9,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 16
 	},
 	[36] = {
-	.class_hid = BNXT_ULP_CLASS_HID_015f,
+	.class_hid = BNXT_ULP_CLASS_HID_0023,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 7,
-	.wc_pri = 17
-	},
-	[37] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0452,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF8_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 8,
-	.wc_pri = 0
-	},
-	[38] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0528,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 8,
-	.wc_pri = 1
-	},
-	[39] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0790,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF8_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 8,
-	.wc_pri = 2
-	},
-	[40] = {
-	.class_hid = BNXT_ULP_CLASS_HID_046e,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 8,
-	.wc_pri = 3
-	},
-	[41] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0462,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF9_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 9,
-	.wc_pri = 0
-	},
-	[42] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0518,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 9,
-	.wc_pri = 1
-	},
-	[43] = {
-	.class_hid = BNXT_ULP_CLASS_HID_07a0,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF9_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 9,
-	.wc_pri = 2
-	},
-	[44] = {
-	.class_hid = BNXT_ULP_CLASS_HID_045e,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 9,
-	.wc_pri = 3
-	},
-	[45] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0228,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF10_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 10,
-	.wc_pri = 0
-	},
-	[46] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06d0,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF10_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 10,
-	.wc_pri = 1
-	},
-	[47] = {
-	.class_hid = BNXT_ULP_CLASS_HID_02be,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 10,
-	.wc_pri = 2
-	},
-	[48] = {
-	.class_hid = BNXT_ULP_CLASS_HID_07a6,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 10,
-	.wc_pri = 3
-	},
-	[49] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0218,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 11,
-	.wc_pri = 0
-	},
-	[50] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06e0,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 11,
-	.wc_pri = 1
-	},
-	[51] = {
-	.class_hid = BNXT_ULP_CLASS_HID_028e,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 11,
-	.wc_pri = 2
-	},
-	[52] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0796,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 11,
-	.wc_pri = 3
-	},
-	[53] = {
-	.class_hid = BNXT_ULP_CLASS_HID_079c,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 0
-	},
-	[54] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0654,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 1
-	},
-	[55] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06d2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 2
-	},
-	[56] = {
-	.class_hid = BNXT_ULP_CLASS_HID_058a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 3
-	},
-	[57] = {
-	.class_hid = BNXT_ULP_CLASS_HID_052f,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 4
-	},
-	[58] = {
-	.class_hid = BNXT_ULP_CLASS_HID_07e7,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 5
-	},
-	[59] = {
-	.class_hid = BNXT_ULP_CLASS_HID_079d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 6
-	},
-	[60] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0655,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 7
-	},
-	[61] = {
-	.class_hid = BNXT_ULP_CLASS_HID_046d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 8
 	},
-	[62] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0725,
+	[37] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0017,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 9
 	},
-	[63] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06d3,
+	[38] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0079,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 10
 	},
-	[64] = {
-	.class_hid = BNXT_ULP_CLASS_HID_058b,
+	[39] = {
+	.class_hid = BNXT_ULP_CLASS_HID_00e1,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 12,
-	.wc_pri = 11
-	},
-	[65] = {
-	.class_hid = BNXT_ULP_CLASS_HID_07ac,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 0
 	},
-	[66] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0664,
+	[40] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0015,
+	.class_tid = 2,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 4,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 1
-	},
-	[67] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06e2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 2
-	},
-	[68] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05ba,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 3
-	},
-	[69] = {
-	.class_hid = BNXT_ULP_CLASS_HID_051f,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 4
-	},
-	[70] = {
-	.class_hid = BNXT_ULP_CLASS_HID_07d7,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 5
-	},
-	[71] = {
-	.class_hid = BNXT_ULP_CLASS_HID_07ad,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 6
-	},
-	[72] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0665,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 7
-	},
-	[73] = {
-	.class_hid = BNXT_ULP_CLASS_HID_045d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 8
-	},
-	[74] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0715,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 9
-	},
-	[75] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06e3,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 10
-	},
-	[76] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05bb,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 13,
-	.wc_pri = 11
-	},
-	[77] = {
-	.class_hid = BNXT_ULP_CLASS_HID_016a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 0
-	},
-	[78] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03d2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 1
-	},
-	[79] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0612,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 2
-	},
-	[80] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00da,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 3
-	},
-	[81] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06bd,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 4
-	},
-	[82] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0165,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 5
-	},
-	[83] = {
-	.class_hid = BNXT_ULP_CLASS_HID_016b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 6
-	},
-	[84] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03d3,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 7
-	},
-	[85] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03a5,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 8
-	},
-	[86] = {
-	.class_hid = BNXT_ULP_CLASS_HID_066d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 9
-	},
-	[87] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0613,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 10
-	},
-	[88] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00db,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 14,
-	.wc_pri = 11
-	},
-	[89] = {
-	.class_hid = BNXT_ULP_CLASS_HID_015a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 0
-	},
-	[90] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03e2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 1
-	},
-	[91] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0622,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 2
-	},
-	[92] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00ea,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 3
-	},
-	[93] = {
-	.class_hid = BNXT_ULP_CLASS_HID_068d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 4
-	},
-	[94] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0155,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 5
-	},
-	[95] = {
-	.class_hid = BNXT_ULP_CLASS_HID_015b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 6
-	},
-	[96] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03e3,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 7
-	},
-	[97] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0395,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 8
-	},
-	[98] = {
-	.class_hid = BNXT_ULP_CLASS_HID_065d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 9
-	},
-	[99] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0623,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 10
-	},
-	[100] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00eb,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 15,
-	.wc_pri = 11
-	},
-	[101] = {
-	.class_hid = BNXT_ULP_CLASS_HID_04bc,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 0
-	},
-	[102] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0442,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 1
-	},
-	[103] = {
-	.class_hid = BNXT_ULP_CLASS_HID_050a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 2
-	},
-	[104] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06ba,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 3
-	},
-	[105] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0472,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 4
-	},
-	[106] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0700,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 5
-	},
-	[107] = {
-	.class_hid = BNXT_ULP_CLASS_HID_04c8,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 6
-	},
-	[108] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0678,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 7
-	},
-	[109] = {
-	.class_hid = BNXT_ULP_CLASS_HID_061f,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 8
-	},
-	[110] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05ad,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 9
-	},
-	[111] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06a5,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 10
-	},
-	[112] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0455,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 11
-	},
-	[113] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05dd,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 12
-	},
-	[114] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0563,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 13
-	},
-	[115] = {
-	.class_hid = BNXT_ULP_CLASS_HID_059b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 14
-	},
-	[116] = {
-	.class_hid = BNXT_ULP_CLASS_HID_070b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 15
-	},
-	[117] = {
-	.class_hid = BNXT_ULP_CLASS_HID_04bd,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 16
-	},
-	[118] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0443,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 17
-	},
-	[119] = {
-	.class_hid = BNXT_ULP_CLASS_HID_050b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 18
-	},
-	[120] = {
-	.class_hid = BNXT_ULP_CLASS_HID_06bb,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 19
-	},
-	[121] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0473,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 20
-	},
-	[122] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0701,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 21
-	},
-	[123] = {
-	.class_hid = BNXT_ULP_CLASS_HID_04c9,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 22
-	},
-	[124] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0679,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 16,
-	.wc_pri = 23
-	},
-	[125] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05e2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 0
-	},
-	[126] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00b0,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 1
-	},
-	[127] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0648,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 2
-	},
-	[128] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03f8,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 3
-	},
-	[129] = {
-	.class_hid = BNXT_ULP_CLASS_HID_02ea,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 4
-	},
-	[130] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05b8,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 5
-	},
-	[131] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0370,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 6
-	},
-	[132] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00e0,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 7
-	},
-	[133] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0745,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 8
-	},
-	[134] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0213,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 9
-	},
-	[135] = {
-	.class_hid = BNXT_ULP_CLASS_HID_031b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 10
-	},
-	[136] = {
-	.class_hid = BNXT_ULP_CLASS_HID_008b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 11
-	},
-	[137] = {
-	.class_hid = BNXT_ULP_CLASS_HID_044d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 12
-	},
-	[138] = {
-	.class_hid = BNXT_ULP_CLASS_HID_071b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 13
-	},
-	[139] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0003,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 14
-	},
-	[140] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05b3,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 15
-	},
-	[141] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05e3,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 16
-	},
-	[142] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00b1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 17
-	},
-	[143] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0649,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 18
-	},
-	[144] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03f9,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 19
-	},
-	[145] = {
-	.class_hid = BNXT_ULP_CLASS_HID_02eb,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 20
-	},
-	[146] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05b9,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 21
-	},
-	[147] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0371,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 22
-	},
-	[148] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00e1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 17,
-	.wc_pri = 23
-	},
-	[149] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0000,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 0
-	},
-	[150] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00ce,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 1
-	},
-	[151] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01b6,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 2
-	},
-	[152] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0074,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 3
-	},
-	[153] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00fe,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 4
-	},
-	[154] = {
-	.class_hid = BNXT_ULP_CLASS_HID_03bc,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 5
-	},
-	[155] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0206,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 6
-	},
-	[156] = {
-	.class_hid = BNXT_ULP_CLASS_HID_02c4,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_F1 |
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 18,
-	.wc_pri = 7
-	},
-	[157] = {
-	.class_hid = BNXT_ULP_CLASS_HID_055a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 0
-	},
-	[158] = {
-	.class_hid = BNXT_ULP_CLASS_HID_045a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 1
-	},
-	[159] = {
-	.class_hid = BNXT_ULP_CLASS_HID_061a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 2
-	},
-	[160] = {
-	.class_hid = BNXT_ULP_CLASS_HID_051a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 3
-	},
-	[161] = {
-	.class_hid = BNXT_ULP_CLASS_HID_074a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 4
-	},
-	[162] = {
-	.class_hid = BNXT_ULP_CLASS_HID_004e,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 5
-	},
-	[163] = {
-	.class_hid = BNXT_ULP_CLASS_HID_040a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 6
-	},
-	[164] = {
-	.class_hid = BNXT_ULP_CLASS_HID_010e,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_HDR_BIT_T_VXLAN |
-		BNXT_ULP_HDR_BIT_I_ETH |
-		BNXT_ULP_HDR_BIT_I_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_ING },
-	.field_sig = { .bits =
-		BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
-		BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
-		BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 19,
-	.wc_pri = 7
-	},
-	[165] = {
-	.class_hid = BNXT_ULP_CLASS_HID_048b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 20,
-	.wc_pri = 0
-	},
-	[166] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0749,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 20,
-	.wc_pri = 1
-	},
-	[167] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05f1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 20,
-	.wc_pri = 2
-	},
-	[168] = {
-	.class_hid = BNXT_ULP_CLASS_HID_04b7,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 20,
-	.wc_pri = 3
-	},
-	[169] = {
-	.class_hid = BNXT_ULP_CLASS_HID_049b,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 21,
-	.wc_pri = 0
-	},
-	[170] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0759,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 21,
-	.wc_pri = 1
-	},
-	[171] = {
-	.class_hid = BNXT_ULP_CLASS_HID_05e1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 21,
-	.wc_pri = 2
-	},
-	[172] = {
-	.class_hid = BNXT_ULP_CLASS_HID_04a7,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 21,
-	.wc_pri = 3
-	},
-	[173] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0301,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 22,
-	.wc_pri = 0
-	},
-	[174] = {
-	.class_hid = BNXT_ULP_CLASS_HID_07f9,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 22,
-	.wc_pri = 1
-	},
-	[175] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0397,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 22,
-	.wc_pri = 2
-	},
-	[176] = {
-	.class_hid = BNXT_ULP_CLASS_HID_068f,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 22,
-	.wc_pri = 3
-	},
-	[177] = {
-	.class_hid = BNXT_ULP_CLASS_HID_02f1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 23,
-	.wc_pri = 0
-	},
-	[178] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0609,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 23,
-	.wc_pri = 1
-	},
-	[179] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0267,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 23,
-	.wc_pri = 2
-	},
-	[180] = {
-	.class_hid = BNXT_ULP_CLASS_HID_077f,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 23,
-	.wc_pri = 3
-	},
-	[181] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01e1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 0
-	},
-	[182] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0329,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 1
-	},
-	[183] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01c1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 2
-	},
-	[184] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0309,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 3
-	},
-	[185] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01d1,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 4
-	},
-	[186] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0319,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 5
-	},
-	[187] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01e2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 6
-	},
-	[188] = {
-	.class_hid = BNXT_ULP_CLASS_HID_032a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 7
-	},
-	[189] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0650,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 8
-	},
-	[190] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0198,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 9
-	},
-	[191] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01c2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 10
-	},
-	[192] = {
-	.class_hid = BNXT_ULP_CLASS_HID_030a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 11
-	},
-	[193] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0670,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 12
-	},
-	[194] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01b8,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 13
-	},
-	[195] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01d2,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 14
-	},
-	[196] = {
-	.class_hid = BNXT_ULP_CLASS_HID_031a,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 15
-	},
-	[197] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0660,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 16
-	},
-	[198] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01a8,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 24,
-	.wc_pri = 17
-	},
-	[199] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01dd,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 0
-	},
-	[200] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0315,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 1
-	},
-	[201] = {
-	.class_hid = BNXT_ULP_CLASS_HID_003d,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 2
-	},
-	[202] = {
-	.class_hid = BNXT_ULP_CLASS_HID_02f5,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 3
-	},
-	[203] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01cd,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 4
-	},
-	[204] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0305,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 5
-	},
-	[205] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01de,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 6
-	},
-	[206] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0316,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 7
-	},
-	[207] = {
-	.class_hid = BNXT_ULP_CLASS_HID_066c,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 8
-	},
-	[208] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01a4,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 9
-	},
-	[209] = {
-	.class_hid = BNXT_ULP_CLASS_HID_003e,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 10
-	},
-	[210] = {
-	.class_hid = BNXT_ULP_CLASS_HID_02f6,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 11
-	},
-	[211] = {
-	.class_hid = BNXT_ULP_CLASS_HID_078c,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 12
-	},
-	[212] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0044,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 13
-	},
-	[213] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01ce,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 14
-	},
-	[214] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0306,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 15
-	},
-	[215] = {
-	.class_hid = BNXT_ULP_CLASS_HID_067c,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 16
-	},
-	[216] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01b4,
-	.hdr_sig = { .bits =
-		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
-		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
-	.field_sig = { .bits =
-		BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
-		BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
-	.class_tid = 25,
-	.wc_pri = 17
 	}
 };
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
index 6bb26f0ad5..4963fc0b95 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
@@ -3,32 +3,58 @@ 
  * All rights reserved.
  */
 
-/* date: Thu Oct 15 17:28:37 2020 */
+/* date: Mon Nov 23 17:33:02 2020 */
 
 #ifndef ULP_TEMPLATE_DB_H_
 #define ULP_TEMPLATE_DB_H_
 
-#define BNXT_ULP_REGFILE_MAX_SZ 19
+#define BNXT_ULP_REGFILE_MAX_SZ 31
 #define BNXT_ULP_MAX_NUM_DEVICES 4
 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2
-#define BNXT_ULP_GEN_TBL_MAX_SZ 4
-#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048
-#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 217
-#define BNXT_ULP_CLASS_HID_LOW_PRIME 7919
-#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907
-#define BNXT_ULP_CLASS_HID_SHFTR 32
-#define BNXT_ULP_CLASS_HID_SHFTL 31
-#define BNXT_ULP_CLASS_HID_MASK 2047
-#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 4096
-#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 83
+#define BNXT_ULP_GEN_TBL_MAX_SZ 6
+#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 256
+#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 41
+#define BNXT_ULP_CLASS_HID_LOW_PRIME 3793
+#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7919
+#define BNXT_ULP_CLASS_HID_SHFTR 24
+#define BNXT_ULP_CLASS_HID_SHFTL 23
+#define BNXT_ULP_CLASS_HID_MASK 255
+#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 2048
+#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 15
 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919
-#define BNXT_ULP_ACT_HID_HIGH_PRIME 4721
-#define BNXT_ULP_ACT_HID_SHFTR 23
+#define BNXT_ULP_ACT_HID_HIGH_PRIME 7919
+#define BNXT_ULP_ACT_HID_SHFTR 24
 #define BNXT_ULP_ACT_HID_SHFTL 23
-#define BNXT_ULP_ACT_HID_MASK 4095
+#define BNXT_ULP_ACT_HID_MASK 2047
 #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 8
 #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1
 #define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7
+#define BNXT_ULP_HDR_SIG_ID_SHIFT 4
+#define BNXT_ULP_GLB_FIELD_TBL_SIZE 4441
+#define ULP_WH_PLUS_CLASS_TMPL_LIST_SIZE 8
+#define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 41
+#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 273
+#define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 14
+#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 385
+#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 10
+#define ULP_STINGRAY_CLASS_TMPL_LIST_SIZE 8
+#define ULP_STINGRAY_CLASS_TBL_LIST_SIZE 41
+#define ULP_STINGRAY_CLASS_KEY_INFO_LIST_SIZE 273
+#define ULP_STINGRAY_CLASS_IDENT_LIST_SIZE 14
+#define ULP_STINGRAY_CLASS_RESULT_FIELD_LIST_SIZE 385
+#define ULP_STINGRAY_CLASS_COND_LIST_SIZE 10
+#define ULP_WH_PLUS_ACT_TMPL_LIST_SIZE 2
+#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 4
+#define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 0
+#define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 0
+#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 65
+#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 2
+#define ULP_STINGRAY_ACT_TMPL_LIST_SIZE 2
+#define ULP_STINGRAY_ACT_TBL_LIST_SIZE 4
+#define ULP_STINGRAY_ACT_KEY_INFO_LIST_SIZE 0
+#define ULP_STINGRAY_ACT_IDENT_LIST_SIZE 0
+#define ULP_STINGRAY_ACT_RESULT_FIELD_LIST_SIZE 65
+#define ULP_STINGRAY_ACT_COND_LIST_SIZE 2
 
 enum bnxt_ulp_action_bit {
 	BNXT_ULP_ACTION_BIT_MARK             = 0x0000000000000001,
@@ -82,6 +108,12 @@  enum bnxt_ulp_hdr_bit {
 	BNXT_ULP_HDR_BIT_LAST                = 0x0000000000020000
 };
 
+enum bnxt_ulp_accept_opc {
+	BNXT_ULP_ACCEPT_OPC_ALWAYS = 0,
+	BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH = 1,
+	BNXT_ULP_ACCEPT_OPC_LAST = 2
+};
+
 enum bnxt_ulp_act_type {
 	BNXT_ULP_ACT_TYPE_NOT_SUPPORTED = 0,
 	BNXT_ULP_ACT_TYPE_SUPPORTED = 1,
@@ -139,10 +171,12 @@  enum bnxt_ulp_cf_idx {
 	BNXT_ULP_CF_IDX_L3_HDR_CNT = 40,
 	BNXT_ULP_CF_IDX_L4_HDR_CNT = 41,
 	BNXT_ULP_CF_IDX_VFR_MODE = 42,
-	BNXT_ULP_CF_IDX_LOOPBACK_PARIF = 43,
-	BNXT_ULP_CF_IDX_L3_TUN = 44,
-	BNXT_ULP_CF_IDX_L3_TUN_DECAP = 45,
-	BNXT_ULP_CF_IDX_LAST = 46
+	BNXT_ULP_CF_IDX_L3_TUN = 43,
+	BNXT_ULP_CF_IDX_L3_TUN_DECAP = 44,
+	BNXT_ULP_CF_IDX_FID = 45,
+	BNXT_ULP_CF_IDX_HDR_SIG_ID = 46,
+	BNXT_ULP_CF_IDX_FLOW_SIG_ID = 47,
+	BNXT_ULP_CF_IDX_LAST = 48
 };
 
 enum bnxt_ulp_cond_list_opc {
@@ -200,6 +234,35 @@  enum bnxt_ulp_fdb_opc {
 	BNXT_ULP_FDB_OPC_LAST = 4
 };
 
+enum bnxt_ulp_fdb_type {
+	BNXT_ULP_FDB_TYPE_REGULAR = 0,
+	BNXT_ULP_FDB_TYPE_DEFAULT = 1,
+	BNXT_ULP_FDB_TYPE_RID = 2,
+	BNXT_ULP_FDB_TYPE_LAST = 3
+};
+
+enum bnxt_ulp_field_opc {
+	BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT = 0,
+	BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD = 1,
+	BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD = 2,
+	BNXT_ULP_FIELD_OPC_SET_TO_REGFILE = 3,
+	BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE = 4,
+	BNXT_ULP_FIELD_OPC_SET_TO_ZERO = 5,
+	BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT = 6,
+	BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP = 7,
+	BNXT_ULP_FIELD_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8,
+	BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9,
+	BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10,
+	BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11,
+	BNXT_ULP_FIELD_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12,
+	BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_ACT_PROP_ELSE_CONST = 13,
+	BNXT_ULP_FIELD_OPC_IF_NOT_COMP_FIELD_THEN_ACT_PROP_ELSE_CONST = 14,
+	BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_CONST_ELSE_CF = 15,
+	BNXT_ULP_FIELD_OPC_IF_NOT_COMP_FIELD_THEN_CONST_ELSE_CF = 16,
+	BNXT_ULP_FIELD_OPC_IF_FIELD_BIT_THEN_ONES_ELSE_ZERO = 17,
+	BNXT_ULP_FIELD_OPC_LAST = 18
+};
+
 enum bnxt_ulp_generic_tbl_opc {
 	BNXT_ULP_GENERIC_TBL_OPC_NOT_USED = 0,
 	BNXT_ULP_GENERIC_TBL_OPC_READ = 1,
@@ -207,14 +270,14 @@  enum bnxt_ulp_generic_tbl_opc {
 	BNXT_ULP_GENERIC_TBL_OPC_LAST = 3
 };
 
-enum bnxt_ulp_glb_regfile_index {
-	BNXT_ULP_GLB_REGFILE_INDEX_NOT_USED = 0,
-	BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 1,
-	BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR = 2,
-	BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID = 3,
-	BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID = 4,
-	BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR = 5,
-	BNXT_ULP_GLB_REGFILE_INDEX_LAST = 6
+enum bnxt_ulp_glb_rf_idx {
+	BNXT_ULP_GLB_RF_IDX_NOT_USED = 0,
+	BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID = 1,
+	BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR = 2,
+	BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID = 3,
+	BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID = 4,
+	BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR = 5,
+	BNXT_ULP_GLB_RF_IDX_LAST = 6
 };
 
 enum bnxt_ulp_hdr_type {
@@ -244,23 +307,6 @@  enum bnxt_ulp_index_tbl_opc {
 	BNXT_ULP_INDEX_TBL_OPC_LAST = 7
 };
 
-enum bnxt_ulp_mapper_opc {
-	BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT = 0,
-	BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD = 1,
-	BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD = 2,
-	BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE = 3,
-	BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE = 4,
-	BNXT_ULP_MAPPER_OPC_SET_TO_ZERO = 5,
-	BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT = 6,
-	BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP = 7,
-	BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8,
-	BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9,
-	BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10,
-	BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11,
-	BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12,
-	BNXT_ULP_MAPPER_OPC_LAST = 13
-};
-
 enum bnxt_ulp_mark_db_opc {
 	BNXT_ULP_MARK_DB_OPC_NOP = 0,
 	BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION = 1,
@@ -288,38 +334,39 @@  enum bnxt_ulp_pri_opc {
 	BNXT_ULP_PRI_OPC_LAST = 3
 };
 
-enum bnxt_ulp_regfile_index {
-	BNXT_ULP_REGFILE_INDEX_NOT_USED = 0,
-	BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1,
-	BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2,
-	BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3,
-	BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4,
-	BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5,
-	BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6,
-	BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7,
-	BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8,
-	BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 9,
-	BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10,
-	BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11,
-	BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12,
-	BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13,
-	BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 14,
-	BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 15,
-	BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 16,
-	BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 17,
-	BNXT_ULP_REGFILE_INDEX_ACTION_REC_SIZE = 18,
-	BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0 = 19,
-	BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_1 = 20,
-	BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0 = 21,
-	BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_1 = 22,
-	BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_0 = 23,
-	BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_1 = 24,
-	BNXT_ULP_REGFILE_INDEX_SRC_PROPERTY_PTR = 25,
-	BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT = 26,
-	BNXT_ULP_REGFILE_INDEX_MIRROR_PTR_0 = 27,
-	BNXT_ULP_REGFILE_INDEX_CLASS_TID = 28,
-	BNXT_ULP_REGFILE_INDEX_FID = 29,
-	BNXT_ULP_REGFILE_INDEX_LAST = 30
+enum bnxt_ulp_rf_idx {
+	BNXT_ULP_RF_IDX_NOT_USED = 0,
+	BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 = 1,
+	BNXT_ULP_RF_IDX_L2_CNTXT_ID_1 = 2,
+	BNXT_ULP_RF_IDX_PROF_FUNC_ID_0 = 3,
+	BNXT_ULP_RF_IDX_PROF_FUNC_ID_1 = 4,
+	BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 = 5,
+	BNXT_ULP_RF_IDX_EM_PROFILE_ID_1 = 6,
+	BNXT_ULP_RF_IDX_WC_PROFILE_ID_0 = 7,
+	BNXT_ULP_RF_IDX_WC_PROFILE_ID_1 = 8,
+	BNXT_ULP_RF_IDX_MAIN_ACTION_PTR = 9,
+	BNXT_ULP_RF_IDX_ACTION_PTR_0 = 10,
+	BNXT_ULP_RF_IDX_ENCAP_PTR_0 = 11,
+	BNXT_ULP_RF_IDX_ENCAP_PTR_1 = 12,
+	BNXT_ULP_RF_IDX_CRITICAL_RESOURCE = 13,
+	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 = 14,
+	BNXT_ULP_RF_IDX_MAIN_SP_PTR = 15,
+	BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 = 16,
+	BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 = 17,
+	BNXT_ULP_RF_IDX_ACTION_REC_SIZE = 18,
+	BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 = 19,
+	BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_1 = 20,
+	BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 = 21,
+	BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_1 = 22,
+	BNXT_ULP_RF_IDX_WC_TCAM_INDEX_0 = 23,
+	BNXT_ULP_RF_IDX_WC_TCAM_INDEX_1 = 24,
+	BNXT_ULP_RF_IDX_SRC_PROPERTY_PTR = 25,
+	BNXT_ULP_RF_IDX_GENERIC_TBL_HIT = 26,
+	BNXT_ULP_RF_IDX_MIRROR_PTR_0 = 27,
+	BNXT_ULP_RF_IDX_HDR_SIG_ID = 28,
+	BNXT_ULP_RF_IDX_FLOW_SIG_ID = 29,
+	BNXT_ULP_RF_IDX_RID = 30,
+	BNXT_ULP_RF_IDX_LAST = 31
 };
 
 enum bnxt_ulp_tcam_tbl_opc {
@@ -340,11 +387,6 @@  enum bnxt_ulp_fdb_resource_flags {
 	BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_EGR = 0x01
 };
 
-enum bnxt_ulp_fdb_type {
-	BNXT_ULP_FDB_TYPE_REGULAR = 0,
-	BNXT_ULP_FDB_TYPE_DEFAULT = 1
-};
-
 enum bnxt_ulp_flow_dir_bitmask {
 	BNXT_ULP_FLOW_DIR_BITMASK_ING = 0x0000000000000000,
 	BNXT_ULP_FLOW_DIR_BITMASK_EGR = 0x8000000000000000
@@ -352,7 +394,7 @@  enum bnxt_ulp_flow_dir_bitmask {
 
 enum bnxt_ulp_match_type_bitmask {
 	BNXT_ULP_MATCH_TYPE_BITMASK_EM = 0x0000000000000000,
-	BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x0000000000000001
+	BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x8000000000000000
 };
 
 enum bnxt_ulp_resource_func {
@@ -366,9 +408,8 @@  enum bnxt_ulp_resource_func {
 	BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83,
 	BNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84,
 	BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85,
-	BNXT_ULP_RESOURCE_FUNC_SHARED_TABLE = 0x86,
-	BNXT_ULP_RESOURCE_FUNC_PARENT_FLOW = 0x87,
-	BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW = 0x88
+	BNXT_ULP_RESOURCE_FUNC_PARENT_FLOW = 0x86,
+	BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW = 0x87
 };
 
 enum bnxt_ulp_resource_sub_type {
@@ -383,232 +424,6 @@  enum bnxt_ulp_resource_sub_type {
 	BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL = 2
 };
 
-enum bnxt_ulp_sym {
-	BNXT_ULP_SYM_PKT_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_PKT_TYPE_L2 = 0,
-	BNXT_ULP_SYM_PKT_TYPE_0_IGNORE = 0,
-	BNXT_ULP_SYM_PKT_TYPE_0_L2 = 0,
-	BNXT_ULP_SYM_PKT_TYPE_1_IGNORE = 0,
-	BNXT_ULP_SYM_PKT_TYPE_1_L2 = 0,
-	BNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0,
-	BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0,
-	BNXT_ULP_SYM_RECYCLE_CNT_ONE = 1,
-	BNXT_ULP_SYM_RECYCLE_CNT_TWO = 2,
-	BNXT_ULP_SYM_RECYCLE_CNT_THREE = 3,
-	BNXT_ULP_SYM_AGG_ERROR_IGNORE = 0,
-	BNXT_ULP_SYM_AGG_ERROR_NO = 0,
-	BNXT_ULP_SYM_AGG_ERROR_YES = 1,
-	BNXT_ULP_SYM_RESERVED_IGNORE = 0,
-	BNXT_ULP_SYM_HREC_NEXT_IGNORE = 0,
-	BNXT_ULP_SYM_HREC_NEXT_NO = 0,
-	BNXT_ULP_SYM_HREC_NEXT_YES = 1,
-	BNXT_ULP_SYM_TL2_HDR_VALID_IGNORE = 0,
-	BNXT_ULP_SYM_TL2_HDR_VALID_NO = 0,
-	BNXT_ULP_SYM_TL2_HDR_VALID_YES = 1,
-	BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,
-	BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE = 0,
-	BNXT_ULP_SYM_TL2_UC_MC_BC_UC = 0,
-	BNXT_ULP_SYM_TL2_UC_MC_BC_MC = 2,
-	BNXT_ULP_SYM_TL2_UC_MC_BC_BC = 3,
-	BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE = 0,
-	BNXT_ULP_SYM_TL2_VTAG_PRESENT_NO = 0,
-	BNXT_ULP_SYM_TL2_VTAG_PRESENT_YES = 1,
-	BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE = 0,
-	BNXT_ULP_SYM_TL2_TWO_VTAGS_NO = 0,
-	BNXT_ULP_SYM_TL2_TWO_VTAGS_YES = 1,
-	BNXT_ULP_SYM_TL3_HDR_VALID_IGNORE = 0,
-	BNXT_ULP_SYM_TL3_HDR_VALID_NO = 0,
-	BNXT_ULP_SYM_TL3_HDR_VALID_YES = 1,
-	BNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE = 0,
-	BNXT_ULP_SYM_TL3_HDR_ERROR_NO = 0,
-	BNXT_ULP_SYM_TL3_HDR_ERROR_YES = 1,
-	BNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0,
-	BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1,
-	BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE = 0,
-	BNXT_ULP_SYM_TL3_HDR_ISIP_NO = 0,
-	BNXT_ULP_SYM_TL3_HDR_ISIP_YES = 1,
-	BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0,
-	BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_NO = 0,
-	BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_YES = 1,
-	BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE = 0,
-	BNXT_ULP_SYM_TL3_IPV6_CMP_DST_NO = 0,
-	BNXT_ULP_SYM_TL3_IPV6_CMP_DST_YES = 1,
-	BNXT_ULP_SYM_TL4_HDR_VALID_IGNORE = 0,
-	BNXT_ULP_SYM_TL4_HDR_VALID_NO = 0,
-	BNXT_ULP_SYM_TL4_HDR_VALID_YES = 1,
-	BNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE = 0,
-	BNXT_ULP_SYM_TL4_HDR_ERROR_NO = 0,
-	BNXT_ULP_SYM_TL4_HDR_ERROR_YES = 1,
-	BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0,
-	BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_NO = 0,
-	BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_YES = 1,
-	BNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0,
-	BNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1,
-	BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0,
-	BNXT_ULP_SYM_TUN_HDR_VALID_NO = 0,
-	BNXT_ULP_SYM_TUN_HDR_VALID_YES = 1,
-	BNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE = 0,
-	BNXT_ULP_SYM_TUN_HDR_ERROR_NO = 0,
-	BNXT_ULP_SYM_TUN_HDR_ERROR_YES = 1,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_NVGRE = 2,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_PPPOE = 6,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9,
-	BNXT_ULP_SYM_TUN_HDR_TYPE_NONE = 15,
-	BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE = 0,
-	BNXT_ULP_SYM_L2_HDR_VALID_IGNORE = 0,
-	BNXT_ULP_SYM_L2_HDR_VALID_NO = 0,
-	BNXT_ULP_SYM_L2_HDR_VALID_YES = 1,
-	BNXT_ULP_SYM_L2_HDR_ERROR_IGNORE = 0,
-	BNXT_ULP_SYM_L2_HDR_ERROR_NO = 0,
-	BNXT_ULP_SYM_L2_HDR_ERROR_YES = 1,
-	BNXT_ULP_SYM_L2_HDR_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0,
-	BNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1,
-	BNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2,
-	BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE = 0,
-	BNXT_ULP_SYM_L2_UC_MC_BC_UC = 0,
-	BNXT_ULP_SYM_L2_UC_MC_BC_MC = 2,
-	BNXT_ULP_SYM_L2_UC_MC_BC_BC = 3,
-	BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE = 0,
-	BNXT_ULP_SYM_L2_VTAG_PRESENT_NO = 0,
-	BNXT_ULP_SYM_L2_VTAG_PRESENT_YES = 1,
-	BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE = 0,
-	BNXT_ULP_SYM_L2_TWO_VTAGS_NO = 0,
-	BNXT_ULP_SYM_L2_TWO_VTAGS_YES = 1,
-	BNXT_ULP_SYM_L3_HDR_VALID_IGNORE = 0,
-	BNXT_ULP_SYM_L3_HDR_VALID_NO = 0,
-	BNXT_ULP_SYM_L3_HDR_VALID_YES = 1,
-	BNXT_ULP_SYM_L3_HDR_ERROR_IGNORE = 0,
-	BNXT_ULP_SYM_L3_HDR_ERROR_NO = 0,
-	BNXT_ULP_SYM_L3_HDR_ERROR_YES = 1,
-	BNXT_ULP_SYM_L3_HDR_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0,
-	BNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1,
-	BNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2,
-	BNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3,
-	BNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4,
-	BNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5,
-	BNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6,
-	BNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7,
-	BNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8,
-	BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE = 0,
-	BNXT_ULP_SYM_L3_HDR_ISIP_NO = 0,
-	BNXT_ULP_SYM_L3_HDR_ISIP_YES = 1,
-	BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE = 0,
-	BNXT_ULP_SYM_L3_IPV6_CMP_SRC_NO = 0,
-	BNXT_ULP_SYM_L3_IPV6_CMP_SRC_YES = 1,
-	BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE = 0,
-	BNXT_ULP_SYM_L3_IPV6_CMP_DST_NO = 0,
-	BNXT_ULP_SYM_L3_IPV6_CMP_DST_YES = 1,
-	BNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0,
-	BNXT_ULP_SYM_L4_HDR_VALID_NO = 0,
-	BNXT_ULP_SYM_L4_HDR_VALID_YES = 1,
-	BNXT_ULP_SYM_L4_HDR_ERROR_IGNORE = 0,
-	BNXT_ULP_SYM_L4_HDR_ERROR_NO = 0,
-	BNXT_ULP_SYM_L4_HDR_ERROR_YES = 1,
-	BNXT_ULP_SYM_L4_HDR_TYPE_IGNORE = 0,
-	BNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0,
-	BNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1,
-	BNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2,
-	BNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3,
-	BNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4,
-	BNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5,
-	BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0,
-	BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_NO = 0,
-	BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_YES = 1,
-	BNXT_ULP_SYM_POP_VLAN_NO = 0,
-	BNXT_ULP_SYM_POP_VLAN_YES = 1,
-	BNXT_ULP_SYM_DECAP_FUNC_NONE = 0,
-	BNXT_ULP_SYM_DECAP_FUNC_THRU_TL2 = 3,
-	BNXT_ULP_SYM_DECAP_FUNC_THRU_TL3 = 8,
-	BNXT_ULP_SYM_DECAP_FUNC_THRU_TL4 = 9,
-	BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN = 10,
-	BNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,
-	BNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12,
-	BNXT_ULP_SYM_DECAP_FUNC_THRU_L4 = 13,
-	BNXT_ULP_SYM_ECV_VALID_NO = 0,
-	BNXT_ULP_SYM_ECV_VALID_YES = 1,
-	BNXT_ULP_SYM_ECV_CUSTOM_EN_NO = 0,
-	BNXT_ULP_SYM_ECV_CUSTOM_EN_YES = 1,
-	BNXT_ULP_SYM_ECV_L2_EN_NO = 0,
-	BNXT_ULP_SYM_ECV_L2_EN_YES = 1,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP = 0,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8,
-	BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8,
-	BNXT_ULP_SYM_ECV_L3_TYPE_NONE = 0,
-	BNXT_ULP_SYM_ECV_L3_TYPE_IPV4 = 4,
-	BNXT_ULP_SYM_ECV_L3_TYPE_IPV6 = 5,
-	BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8847 = 6,
-	BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8848 = 7,
-	BNXT_ULP_SYM_ECV_L4_TYPE_NONE = 0,
-	BNXT_ULP_SYM_ECV_L4_TYPE_UDP = 4,
-	BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM = 5,
-	BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,
-	BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,
-	BNXT_ULP_SYM_ECV_TUN_TYPE_NONE = 0,
-	BNXT_ULP_SYM_ECV_TUN_TYPE_GENERIC = 1,
-	BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2,
-	BNXT_ULP_SYM_ECV_TUN_TYPE_NGE = 3,
-	BNXT_ULP_SYM_ECV_TUN_TYPE_NVGRE = 4,
-	BNXT_ULP_SYM_ECV_TUN_TYPE_GRE = 5,
-	BNXT_ULP_SYM_WH_PLUS_INT_ACT_REC = 1,
-	BNXT_ULP_SYM_WH_PLUS_EXT_ACT_REC = 0,
-	BNXT_ULP_SYM_WH_PLUS_UC_ACT_REC = 0,
-	BNXT_ULP_SYM_WH_PLUS_MC_ACT_REC = 1,
-	BNXT_ULP_SYM_ACT_REC_DROP_YES = 1,
-	BNXT_ULP_SYM_ACT_REC_DROP_NO = 0,
-	BNXT_ULP_SYM_ACT_REC_POP_VLAN_YES = 1,
-	BNXT_ULP_SYM_ACT_REC_POP_VLAN_NO = 0,
-	BNXT_ULP_SYM_ACT_REC_METER_EN_YES = 1,
-	BNXT_ULP_SYM_ACT_REC_METER_EN_NO = 0,
-	BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 4,
-	BNXT_ULP_SYM_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448,
-	BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 16,
-	BNXT_ULP_SYM_STINGRAY_EXT_EM_MAX_KEY_SIZE = 448,
-	BNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3,
-	BNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3,
-	BNXT_ULP_SYM_MATCH_TYPE_EM = 0,
-	BNXT_ULP_SYM_MATCH_TYPE_WM = 1,
-	BNXT_ULP_SYM_IP_PROTO_ICMP = 1,
-	BNXT_ULP_SYM_IP_PROTO_IGMP = 2,
-	BNXT_ULP_SYM_IP_PROTO_IP_IN_IP = 4,
-	BNXT_ULP_SYM_IP_PROTO_TCP = 6,
-	BNXT_ULP_SYM_IP_PROTO_UDP = 17,
-	BNXT_ULP_SYM_VF_FUNC_PARIF = 15,
-	BNXT_ULP_SYM_NO = 0,
-	BNXT_ULP_SYM_YES = 1,
-	BNXT_ULP_SYM_RECYCLE_DST = 0x800
-};
-
-enum bnxt_ulp_wh_plus {
-	BNXT_ULP_WH_PLUS_LOOPBACK_PORT = 4,
-	BNXT_ULP_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448
-};
-
 enum bnxt_ulp_act_prop_sz {
 	BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ = 4,
 	BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ = 4,
@@ -651,6 +466,7 @@  enum bnxt_ulp_act_prop_sz {
 	BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4,
 	BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32,
 	BNXT_ULP_ACT_PROP_SZ_JUMP = 4,
+	BNXT_ULP_ACT_PROP_SZ_SHARED_HANDLE = 8,
 	BNXT_ULP_ACT_PROP_SZ_LAST = 4
 };
 
@@ -696,319 +512,512 @@  enum bnxt_ulp_act_prop_idx {
 	BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 221,
 	BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 225,
 	BNXT_ULP_ACT_PROP_IDX_JUMP = 257,
-	BNXT_ULP_ACT_PROP_IDX_LAST = 261
+	BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE = 261,
+	BNXT_ULP_ACT_PROP_IDX_LAST = 269
+};
+
+enum bnxt_ulp_wh_plus_sym {
+	BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_L2 = 0,
+	BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_0_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_0_L2 = 0,
+	BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_1_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_1_L2 = 0,
+	BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_ZERO = 0,
+	BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_ONE = 1,
+	BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_TWO = 2,
+	BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_THREE = 3,
+	BNXT_ULP_WH_PLUS_SYM_AGG_ERROR_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_AGG_ERROR_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_AGG_ERROR_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_RESERVED_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_HREC_NEXT_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_HREC_NEXT_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_HREC_NEXT_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL2_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_HDR_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_HDR_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL2_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_HDR_TYPE_DIX = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_UC = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_MC = 2,
+	BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_BC = 3,
+	BNXT_ULP_WH_PLUS_SYM_TL2_VTAG_PRESENT_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_VTAG_PRESENT_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_VTAG_PRESENT_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL2_TWO_VTAGS_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_TWO_VTAGS_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL2_TWO_VTAGS_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ERROR_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ERROR_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_TYPE_IPV4 = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_TYPE_IPV6 = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ISIP_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ISIP_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ISIP_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_SRC_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_SRC_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_DST_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_DST_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_DST_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_ERROR_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_ERROR_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_IS_UDP_TCP_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_IS_UDP_TCP_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_TYPE_TCP = 0,
+	BNXT_ULP_WH_PLUS_SYM_TL4_HDR_TYPE_UDP = 1,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_ERROR_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_ERROR_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_VXLAN = 0,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_GENEVE = 1,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_NVGRE = 2,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_GRE = 3,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_IPV4 = 4,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_IPV6 = 5,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_PPPOE = 6,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_MPLS = 7,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_UPAR1 = 8,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_UPAR2 = 9,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_NONE = 15,
+	BNXT_ULP_WH_PLUS_SYM_TUN_HDR_FLAGS_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_ERROR_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_ERROR_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_DIX = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_LLC_SNAP = 1,
+	BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_LLC = 2,
+	BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_UC = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_MC = 2,
+	BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_BC = 3,
+	BNXT_ULP_WH_PLUS_SYM_L2_VTAG_PRESENT_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_VTAG_PRESENT_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_VTAG_PRESENT_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L2_TWO_VTAGS_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_TWO_VTAGS_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L2_TWO_VTAGS_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_ERROR_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_ERROR_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_IPV4 = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_IPV6 = 1,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_ARP = 2,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_PTP = 3,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_EAPOL = 4,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_ROCE = 5,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_FCOE = 6,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_UPAR1 = 7,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_UPAR2 = 8,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_ISIP_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_ISIP_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_HDR_ISIP_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_SRC_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_SRC_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_SRC_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_DST_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_DST_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_DST_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_ERROR_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_ERROR_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_TCP = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_UDP = 1,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_ICMP = 2,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_UPAR1 = 3,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_UPAR2 = 4,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_BTH_V1 = 5,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_IS_UDP_TCP_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_L4_HDR_IS_UDP_TCP_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_POP_VLAN_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_POP_VLAN_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_NONE = 0,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TL2 = 3,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TL3 = 8,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TL4 = 9,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TUN = 10,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_L2 = 11,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_L3 = 12,
+	BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_L4 = 13,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VALID_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VALID_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_ECV_CUSTOM_EN_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_ECV_CUSTOM_EN_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L2_EN_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L2_EN_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_NOP = 0,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_NONE = 0,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_IPV4 = 4,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_IPV6 = 5,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_MPLS_8847 = 6,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_MPLS_8848 = 7,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_NONE = 0,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP = 4,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP_CSUM = 5,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,
+	BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,
+	BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_NONE = 0,
+	BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_GENERIC = 1,
+	BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_VXLAN = 2,
+	BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_NGE = 3,
+	BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_NVGRE = 4,
+	BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_GRE = 5,
+	BNXT_ULP_WH_PLUS_SYM_EEM_ACT_REC_INT = 1,
+	BNXT_ULP_WH_PLUS_SYM_EEM_EXT_FLOW_CNTR = 0,
+	BNXT_ULP_WH_PLUS_SYM_UC_ACT_REC = 0,
+	BNXT_ULP_WH_PLUS_SYM_MC_ACT_REC = 1,
+	BNXT_ULP_WH_PLUS_SYM_ACT_REC_DROP_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_ACT_REC_DROP_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_ACT_REC_POP_VLAN_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_ACT_REC_POP_VLAN_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_ACT_REC_METER_EN_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_ACT_REC_METER_EN_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_LOOPBACK_PORT = 4,
+	BNXT_ULP_WH_PLUS_SYM_LOOPBACK_PARIF = 15,
+	BNXT_ULP_WH_PLUS_SYM_EXT_EM_MAX_KEY_SIZE = 448,
+	BNXT_ULP_WH_PLUS_SYM_MATCH_TYPE_EM = 0,
+	BNXT_ULP_WH_PLUS_SYM_MATCH_TYPE_WM = 1,
+	BNXT_ULP_WH_PLUS_SYM_IP_PROTO_ICMP = 1,
+	BNXT_ULP_WH_PLUS_SYM_IP_PROTO_IGMP = 2,
+	BNXT_ULP_WH_PLUS_SYM_IP_PROTO_IP_IN_IP = 4,
+	BNXT_ULP_WH_PLUS_SYM_IP_PROTO_TCP = 6,
+	BNXT_ULP_WH_PLUS_SYM_IP_PROTO_UDP = 17,
+	BNXT_ULP_WH_PLUS_SYM_VF_FUNC_PARIF = 15,
+	BNXT_ULP_WH_PLUS_SYM_NO = 0,
+	BNXT_ULP_WH_PLUS_SYM_YES = 1,
+	BNXT_ULP_WH_PLUS_SYM_RECYCLE_DST = 0x800
+};
+
+enum bnxt_ulp_stingray_sym {
+	BNXT_ULP_STINGRAY_SYM_PKT_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_PKT_TYPE_L2 = 0,
+	BNXT_ULP_STINGRAY_SYM_PKT_TYPE_0_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_PKT_TYPE_0_L2 = 0,
+	BNXT_ULP_STINGRAY_SYM_PKT_TYPE_1_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_PKT_TYPE_1_L2 = 0,
+	BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_ZERO = 0,
+	BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_ONE = 1,
+	BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_TWO = 2,
+	BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_THREE = 3,
+	BNXT_ULP_STINGRAY_SYM_AGG_ERROR_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_AGG_ERROR_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_AGG_ERROR_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_RESERVED_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_HREC_NEXT_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_HREC_NEXT_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_HREC_NEXT_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL2_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_HDR_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_HDR_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL2_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_HDR_TYPE_DIX = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_UC = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_MC = 2,
+	BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_BC = 3,
+	BNXT_ULP_STINGRAY_SYM_TL2_VTAG_PRESENT_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_VTAG_PRESENT_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_VTAG_PRESENT_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL2_TWO_VTAGS_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_TWO_VTAGS_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL2_TWO_VTAGS_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_ERROR_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_ERROR_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_TYPE_IPV4 = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_TYPE_IPV6 = 1,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_ISIP_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_ISIP_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_HDR_ISIP_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_SRC_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_SRC_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_DST_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_DST_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_DST_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_ERROR_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_ERROR_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_IS_UDP_TCP_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_IS_UDP_TCP_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_TYPE_TCP = 0,
+	BNXT_ULP_STINGRAY_SYM_TL4_HDR_TYPE_UDP = 1,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_ERROR_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_ERROR_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_VXLAN = 0,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_GENEVE = 1,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_NVGRE = 2,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_GRE = 3,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_IPV4 = 4,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_IPV6 = 5,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_PPPOE = 6,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_MPLS = 7,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_UPAR1 = 8,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_UPAR2 = 9,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_NONE = 15,
+	BNXT_ULP_STINGRAY_SYM_TUN_HDR_FLAGS_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_ERROR_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_ERROR_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_DIX = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_LLC_SNAP = 1,
+	BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_LLC = 2,
+	BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_UC = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_MC = 2,
+	BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_BC = 3,
+	BNXT_ULP_STINGRAY_SYM_L2_VTAG_PRESENT_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_VTAG_PRESENT_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_VTAG_PRESENT_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L2_TWO_VTAGS_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_TWO_VTAGS_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L2_TWO_VTAGS_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_ERROR_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_ERROR_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_IPV4 = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_IPV6 = 1,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_ARP = 2,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_PTP = 3,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_EAPOL = 4,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_ROCE = 5,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_FCOE = 6,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_UPAR1 = 7,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_UPAR2 = 8,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_ISIP_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_ISIP_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_HDR_ISIP_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_SRC_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_SRC_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_SRC_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_DST_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_DST_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_DST_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_ERROR_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_ERROR_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_ERROR_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_TCP = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_UDP = 1,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_ICMP = 2,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_UPAR1 = 3,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_UPAR2 = 4,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_BTH_V1 = 5,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_IS_UDP_TCP_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_L4_HDR_IS_UDP_TCP_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_POP_VLAN_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_POP_VLAN_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_NONE = 0,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TL2 = 3,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TL3 = 8,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TL4 = 9,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TUN = 10,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_L2 = 11,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_L3 = 12,
+	BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_L4 = 13,
+	BNXT_ULP_STINGRAY_SYM_ECV_VALID_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_ECV_VALID_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_ECV_CUSTOM_EN_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_ECV_CUSTOM_EN_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_ECV_L2_EN_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_ECV_L2_EN_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_NOP = 0,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8,
+	BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_NONE = 0,
+	BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_IPV4 = 4,
+	BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_IPV6 = 5,
+	BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_MPLS_8847 = 6,
+	BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_MPLS_8848 = 7,
+	BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_NONE = 0,
+	BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP = 4,
+	BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP_CSUM = 5,
+	BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,
+	BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,
+	BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_NONE = 0,
+	BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_GENERIC = 1,
+	BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_VXLAN = 2,
+	BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_NGE = 3,
+	BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_NVGRE = 4,
+	BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_GRE = 5,
+	BNXT_ULP_STINGRAY_SYM_EEM_ACT_REC_INT = 0,
+	BNXT_ULP_STINGRAY_SYM_EEM_EXT_FLOW_CNTR = 1,
+	BNXT_ULP_STINGRAY_SYM_UC_ACT_REC = 0,
+	BNXT_ULP_STINGRAY_SYM_MC_ACT_REC = 1,
+	BNXT_ULP_STINGRAY_SYM_ACT_REC_DROP_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_ACT_REC_DROP_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_ACT_REC_POP_VLAN_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_ACT_REC_POP_VLAN_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_ACT_REC_METER_EN_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_ACT_REC_METER_EN_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_LOOPBACK_PORT = 16,
+	BNXT_ULP_STINGRAY_SYM_LOOPBACK_PARIF = 15,
+	BNXT_ULP_STINGRAY_SYM_EXT_EM_MAX_KEY_SIZE = 448,
+	BNXT_ULP_STINGRAY_SYM_MATCH_TYPE_EM = 0,
+	BNXT_ULP_STINGRAY_SYM_MATCH_TYPE_WM = 1,
+	BNXT_ULP_STINGRAY_SYM_IP_PROTO_ICMP = 1,
+	BNXT_ULP_STINGRAY_SYM_IP_PROTO_IGMP = 2,
+	BNXT_ULP_STINGRAY_SYM_IP_PROTO_IP_IN_IP = 4,
+	BNXT_ULP_STINGRAY_SYM_IP_PROTO_TCP = 6,
+	BNXT_ULP_STINGRAY_SYM_IP_PROTO_UDP = 17,
+	BNXT_ULP_STINGRAY_SYM_VF_FUNC_PARIF = 15,
+	BNXT_ULP_STINGRAY_SYM_NO = 0,
+	BNXT_ULP_STINGRAY_SYM_YES = 1,
+	BNXT_ULP_STINGRAY_SYM_RECYCLE_DST = 0x800
 };
 
 enum bnxt_ulp_class_hid {
-	BNXT_ULP_CLASS_HID_0138 = 0x0138,
-	BNXT_ULP_CLASS_HID_03f0 = 0x03f0,
-	BNXT_ULP_CLASS_HID_0139 = 0x0139,
-	BNXT_ULP_CLASS_HID_03f1 = 0x03f1,
-	BNXT_ULP_CLASS_HID_068b = 0x068b,
-	BNXT_ULP_CLASS_HID_0143 = 0x0143,
-	BNXT_ULP_CLASS_HID_0118 = 0x0118,
-	BNXT_ULP_CLASS_HID_03d0 = 0x03d0,
-	BNXT_ULP_CLASS_HID_0119 = 0x0119,
-	BNXT_ULP_CLASS_HID_03d1 = 0x03d1,
-	BNXT_ULP_CLASS_HID_06ab = 0x06ab,
-	BNXT_ULP_CLASS_HID_0163 = 0x0163,
-	BNXT_ULP_CLASS_HID_0128 = 0x0128,
-	BNXT_ULP_CLASS_HID_03e0 = 0x03e0,
-	BNXT_ULP_CLASS_HID_0129 = 0x0129,
-	BNXT_ULP_CLASS_HID_03e1 = 0x03e1,
-	BNXT_ULP_CLASS_HID_069b = 0x069b,
-	BNXT_ULP_CLASS_HID_0153 = 0x0153,
-	BNXT_ULP_CLASS_HID_0134 = 0x0134,
-	BNXT_ULP_CLASS_HID_03fc = 0x03fc,
-	BNXT_ULP_CLASS_HID_0135 = 0x0135,
-	BNXT_ULP_CLASS_HID_03fd = 0x03fd,
-	BNXT_ULP_CLASS_HID_0687 = 0x0687,
-	BNXT_ULP_CLASS_HID_014f = 0x014f,
-	BNXT_ULP_CLASS_HID_0114 = 0x0114,
-	BNXT_ULP_CLASS_HID_03dc = 0x03dc,
-	BNXT_ULP_CLASS_HID_0115 = 0x0115,
-	BNXT_ULP_CLASS_HID_03dd = 0x03dd,
-	BNXT_ULP_CLASS_HID_06a7 = 0x06a7,
-	BNXT_ULP_CLASS_HID_016f = 0x016f,
-	BNXT_ULP_CLASS_HID_0124 = 0x0124,
-	BNXT_ULP_CLASS_HID_03ec = 0x03ec,
-	BNXT_ULP_CLASS_HID_0125 = 0x0125,
-	BNXT_ULP_CLASS_HID_03ed = 0x03ed,
-	BNXT_ULP_CLASS_HID_0697 = 0x0697,
-	BNXT_ULP_CLASS_HID_015f = 0x015f,
-	BNXT_ULP_CLASS_HID_0452 = 0x0452,
-	BNXT_ULP_CLASS_HID_0528 = 0x0528,
-	BNXT_ULP_CLASS_HID_0790 = 0x0790,
-	BNXT_ULP_CLASS_HID_046e = 0x046e,
-	BNXT_ULP_CLASS_HID_0462 = 0x0462,
-	BNXT_ULP_CLASS_HID_0518 = 0x0518,
-	BNXT_ULP_CLASS_HID_07a0 = 0x07a0,
-	BNXT_ULP_CLASS_HID_045e = 0x045e,
-	BNXT_ULP_CLASS_HID_0228 = 0x0228,
-	BNXT_ULP_CLASS_HID_06d0 = 0x06d0,
-	BNXT_ULP_CLASS_HID_02be = 0x02be,
-	BNXT_ULP_CLASS_HID_07a6 = 0x07a6,
-	BNXT_ULP_CLASS_HID_0218 = 0x0218,
-	BNXT_ULP_CLASS_HID_06e0 = 0x06e0,
-	BNXT_ULP_CLASS_HID_028e = 0x028e,
-	BNXT_ULP_CLASS_HID_0796 = 0x0796,
-	BNXT_ULP_CLASS_HID_079c = 0x079c,
-	BNXT_ULP_CLASS_HID_0654 = 0x0654,
-	BNXT_ULP_CLASS_HID_06d2 = 0x06d2,
-	BNXT_ULP_CLASS_HID_058a = 0x058a,
-	BNXT_ULP_CLASS_HID_052f = 0x052f,
-	BNXT_ULP_CLASS_HID_07e7 = 0x07e7,
-	BNXT_ULP_CLASS_HID_079d = 0x079d,
-	BNXT_ULP_CLASS_HID_0655 = 0x0655,
-	BNXT_ULP_CLASS_HID_046d = 0x046d,
-	BNXT_ULP_CLASS_HID_0725 = 0x0725,
-	BNXT_ULP_CLASS_HID_06d3 = 0x06d3,
-	BNXT_ULP_CLASS_HID_058b = 0x058b,
-	BNXT_ULP_CLASS_HID_07ac = 0x07ac,
-	BNXT_ULP_CLASS_HID_0664 = 0x0664,
-	BNXT_ULP_CLASS_HID_06e2 = 0x06e2,
-	BNXT_ULP_CLASS_HID_05ba = 0x05ba,
-	BNXT_ULP_CLASS_HID_051f = 0x051f,
-	BNXT_ULP_CLASS_HID_07d7 = 0x07d7,
-	BNXT_ULP_CLASS_HID_07ad = 0x07ad,
-	BNXT_ULP_CLASS_HID_0665 = 0x0665,
-	BNXT_ULP_CLASS_HID_045d = 0x045d,
-	BNXT_ULP_CLASS_HID_0715 = 0x0715,
-	BNXT_ULP_CLASS_HID_06e3 = 0x06e3,
-	BNXT_ULP_CLASS_HID_05bb = 0x05bb,
-	BNXT_ULP_CLASS_HID_016a = 0x016a,
-	BNXT_ULP_CLASS_HID_03d2 = 0x03d2,
-	BNXT_ULP_CLASS_HID_0612 = 0x0612,
-	BNXT_ULP_CLASS_HID_00da = 0x00da,
-	BNXT_ULP_CLASS_HID_06bd = 0x06bd,
-	BNXT_ULP_CLASS_HID_0165 = 0x0165,
-	BNXT_ULP_CLASS_HID_016b = 0x016b,
-	BNXT_ULP_CLASS_HID_03d3 = 0x03d3,
-	BNXT_ULP_CLASS_HID_03a5 = 0x03a5,
-	BNXT_ULP_CLASS_HID_066d = 0x066d,
-	BNXT_ULP_CLASS_HID_0613 = 0x0613,
-	BNXT_ULP_CLASS_HID_00db = 0x00db,
-	BNXT_ULP_CLASS_HID_015a = 0x015a,
-	BNXT_ULP_CLASS_HID_03e2 = 0x03e2,
-	BNXT_ULP_CLASS_HID_0622 = 0x0622,
-	BNXT_ULP_CLASS_HID_00ea = 0x00ea,
-	BNXT_ULP_CLASS_HID_068d = 0x068d,
-	BNXT_ULP_CLASS_HID_0155 = 0x0155,
-	BNXT_ULP_CLASS_HID_015b = 0x015b,
-	BNXT_ULP_CLASS_HID_03e3 = 0x03e3,
-	BNXT_ULP_CLASS_HID_0395 = 0x0395,
-	BNXT_ULP_CLASS_HID_065d = 0x065d,
-	BNXT_ULP_CLASS_HID_0623 = 0x0623,
-	BNXT_ULP_CLASS_HID_00eb = 0x00eb,
-	BNXT_ULP_CLASS_HID_04bc = 0x04bc,
-	BNXT_ULP_CLASS_HID_0442 = 0x0442,
-	BNXT_ULP_CLASS_HID_050a = 0x050a,
-	BNXT_ULP_CLASS_HID_06ba = 0x06ba,
-	BNXT_ULP_CLASS_HID_0472 = 0x0472,
-	BNXT_ULP_CLASS_HID_0700 = 0x0700,
-	BNXT_ULP_CLASS_HID_04c8 = 0x04c8,
-	BNXT_ULP_CLASS_HID_0678 = 0x0678,
-	BNXT_ULP_CLASS_HID_061f = 0x061f,
-	BNXT_ULP_CLASS_HID_05ad = 0x05ad,
-	BNXT_ULP_CLASS_HID_06a5 = 0x06a5,
-	BNXT_ULP_CLASS_HID_0455 = 0x0455,
-	BNXT_ULP_CLASS_HID_05dd = 0x05dd,
-	BNXT_ULP_CLASS_HID_0563 = 0x0563,
-	BNXT_ULP_CLASS_HID_059b = 0x059b,
-	BNXT_ULP_CLASS_HID_070b = 0x070b,
-	BNXT_ULP_CLASS_HID_04bd = 0x04bd,
-	BNXT_ULP_CLASS_HID_0443 = 0x0443,
-	BNXT_ULP_CLASS_HID_050b = 0x050b,
-	BNXT_ULP_CLASS_HID_06bb = 0x06bb,
-	BNXT_ULP_CLASS_HID_0473 = 0x0473,
-	BNXT_ULP_CLASS_HID_0701 = 0x0701,
-	BNXT_ULP_CLASS_HID_04c9 = 0x04c9,
-	BNXT_ULP_CLASS_HID_0679 = 0x0679,
-	BNXT_ULP_CLASS_HID_05e2 = 0x05e2,
-	BNXT_ULP_CLASS_HID_00b0 = 0x00b0,
-	BNXT_ULP_CLASS_HID_0648 = 0x0648,
-	BNXT_ULP_CLASS_HID_03f8 = 0x03f8,
-	BNXT_ULP_CLASS_HID_02ea = 0x02ea,
-	BNXT_ULP_CLASS_HID_05b8 = 0x05b8,
-	BNXT_ULP_CLASS_HID_0370 = 0x0370,
-	BNXT_ULP_CLASS_HID_00e0 = 0x00e0,
-	BNXT_ULP_CLASS_HID_0745 = 0x0745,
-	BNXT_ULP_CLASS_HID_0213 = 0x0213,
-	BNXT_ULP_CLASS_HID_031b = 0x031b,
-	BNXT_ULP_CLASS_HID_008b = 0x008b,
-	BNXT_ULP_CLASS_HID_044d = 0x044d,
-	BNXT_ULP_CLASS_HID_071b = 0x071b,
-	BNXT_ULP_CLASS_HID_0003 = 0x0003,
-	BNXT_ULP_CLASS_HID_05b3 = 0x05b3,
-	BNXT_ULP_CLASS_HID_05e3 = 0x05e3,
-	BNXT_ULP_CLASS_HID_00b1 = 0x00b1,
-	BNXT_ULP_CLASS_HID_0649 = 0x0649,
-	BNXT_ULP_CLASS_HID_03f9 = 0x03f9,
-	BNXT_ULP_CLASS_HID_02eb = 0x02eb,
-	BNXT_ULP_CLASS_HID_05b9 = 0x05b9,
-	BNXT_ULP_CLASS_HID_0371 = 0x0371,
+	BNXT_ULP_CLASS_HID_00fc = 0x00fc,
+	BNXT_ULP_CLASS_HID_0046 = 0x0046,
+	BNXT_ULP_CLASS_HID_0056 = 0x0056,
+	BNXT_ULP_CLASS_HID_00b8 = 0x00b8,
+	BNXT_ULP_CLASS_HID_0041 = 0x0041,
+	BNXT_ULP_CLASS_HID_00ab = 0x00ab,
+	BNXT_ULP_CLASS_HID_0053 = 0x0053,
+	BNXT_ULP_CLASS_HID_00a5 = 0x00a5,
+	BNXT_ULP_CLASS_HID_0069 = 0x0069,
+	BNXT_ULP_CLASS_HID_009d = 0x009d,
+	BNXT_ULP_CLASS_HID_0005 = 0x0005,
+	BNXT_ULP_CLASS_HID_006f = 0x006f,
+	BNXT_ULP_CLASS_HID_00af = 0x00af,
+	BNXT_ULP_CLASS_HID_00d3 = 0x00d3,
+	BNXT_ULP_CLASS_HID_005b = 0x005b,
+	BNXT_ULP_CLASS_HID_00ad = 0x00ad,
+	BNXT_ULP_CLASS_HID_0091 = 0x0091,
+	BNXT_ULP_CLASS_HID_00fb = 0x00fb,
+	BNXT_ULP_CLASS_HID_0063 = 0x0063,
+	BNXT_ULP_CLASS_HID_0097 = 0x0097,
+	BNXT_ULP_CLASS_HID_00cc = 0x00cc,
+	BNXT_ULP_CLASS_HID_00f0 = 0x00f0,
+	BNXT_ULP_CLASS_HID_00c0 = 0x00c0,
+	BNXT_ULP_CLASS_HID_002a = 0x002a,
+	BNXT_ULP_CLASS_HID_00c7 = 0x00c7,
+	BNXT_ULP_CLASS_HID_0029 = 0x0029,
+	BNXT_ULP_CLASS_HID_00d1 = 0x00d1,
+	BNXT_ULP_CLASS_HID_003b = 0x003b,
+	BNXT_ULP_CLASS_HID_00ef = 0x00ef,
+	BNXT_ULP_CLASS_HID_0013 = 0x0013,
+	BNXT_ULP_CLASS_HID_009b = 0x009b,
+	BNXT_ULP_CLASS_HID_00ed = 0x00ed,
+	BNXT_ULP_CLASS_HID_002d = 0x002d,
+	BNXT_ULP_CLASS_HID_0051 = 0x0051,
+	BNXT_ULP_CLASS_HID_00d9 = 0x00d9,
+	BNXT_ULP_CLASS_HID_0023 = 0x0023,
+	BNXT_ULP_CLASS_HID_0017 = 0x0017,
+	BNXT_ULP_CLASS_HID_0079 = 0x0079,
 	BNXT_ULP_CLASS_HID_00e1 = 0x00e1,
-	BNXT_ULP_CLASS_HID_0000 = 0x0000,
-	BNXT_ULP_CLASS_HID_00ce = 0x00ce,
-	BNXT_ULP_CLASS_HID_01b6 = 0x01b6,
-	BNXT_ULP_CLASS_HID_0074 = 0x0074,
-	BNXT_ULP_CLASS_HID_00fe = 0x00fe,
-	BNXT_ULP_CLASS_HID_03bc = 0x03bc,
-	BNXT_ULP_CLASS_HID_0206 = 0x0206,
-	BNXT_ULP_CLASS_HID_02c4 = 0x02c4,
-	BNXT_ULP_CLASS_HID_055a = 0x055a,
-	BNXT_ULP_CLASS_HID_045a = 0x045a,
-	BNXT_ULP_CLASS_HID_061a = 0x061a,
-	BNXT_ULP_CLASS_HID_051a = 0x051a,
-	BNXT_ULP_CLASS_HID_074a = 0x074a,
-	BNXT_ULP_CLASS_HID_004e = 0x004e,
-	BNXT_ULP_CLASS_HID_040a = 0x040a,
-	BNXT_ULP_CLASS_HID_010e = 0x010e,
-	BNXT_ULP_CLASS_HID_048b = 0x048b,
-	BNXT_ULP_CLASS_HID_0749 = 0x0749,
-	BNXT_ULP_CLASS_HID_05f1 = 0x05f1,
-	BNXT_ULP_CLASS_HID_04b7 = 0x04b7,
-	BNXT_ULP_CLASS_HID_049b = 0x049b,
-	BNXT_ULP_CLASS_HID_0759 = 0x0759,
-	BNXT_ULP_CLASS_HID_05e1 = 0x05e1,
-	BNXT_ULP_CLASS_HID_04a7 = 0x04a7,
-	BNXT_ULP_CLASS_HID_0301 = 0x0301,
-	BNXT_ULP_CLASS_HID_07f9 = 0x07f9,
-	BNXT_ULP_CLASS_HID_0397 = 0x0397,
-	BNXT_ULP_CLASS_HID_068f = 0x068f,
-	BNXT_ULP_CLASS_HID_02f1 = 0x02f1,
-	BNXT_ULP_CLASS_HID_0609 = 0x0609,
-	BNXT_ULP_CLASS_HID_0267 = 0x0267,
-	BNXT_ULP_CLASS_HID_077f = 0x077f,
-	BNXT_ULP_CLASS_HID_01e1 = 0x01e1,
-	BNXT_ULP_CLASS_HID_0329 = 0x0329,
-	BNXT_ULP_CLASS_HID_01c1 = 0x01c1,
-	BNXT_ULP_CLASS_HID_0309 = 0x0309,
-	BNXT_ULP_CLASS_HID_01d1 = 0x01d1,
-	BNXT_ULP_CLASS_HID_0319 = 0x0319,
-	BNXT_ULP_CLASS_HID_01e2 = 0x01e2,
-	BNXT_ULP_CLASS_HID_032a = 0x032a,
-	BNXT_ULP_CLASS_HID_0650 = 0x0650,
-	BNXT_ULP_CLASS_HID_0198 = 0x0198,
-	BNXT_ULP_CLASS_HID_01c2 = 0x01c2,
-	BNXT_ULP_CLASS_HID_030a = 0x030a,
-	BNXT_ULP_CLASS_HID_0670 = 0x0670,
-	BNXT_ULP_CLASS_HID_01b8 = 0x01b8,
-	BNXT_ULP_CLASS_HID_01d2 = 0x01d2,
-	BNXT_ULP_CLASS_HID_031a = 0x031a,
-	BNXT_ULP_CLASS_HID_0660 = 0x0660,
-	BNXT_ULP_CLASS_HID_01a8 = 0x01a8,
-	BNXT_ULP_CLASS_HID_01dd = 0x01dd,
-	BNXT_ULP_CLASS_HID_0315 = 0x0315,
-	BNXT_ULP_CLASS_HID_003d = 0x003d,
-	BNXT_ULP_CLASS_HID_02f5 = 0x02f5,
-	BNXT_ULP_CLASS_HID_01cd = 0x01cd,
-	BNXT_ULP_CLASS_HID_0305 = 0x0305,
-	BNXT_ULP_CLASS_HID_01de = 0x01de,
-	BNXT_ULP_CLASS_HID_0316 = 0x0316,
-	BNXT_ULP_CLASS_HID_066c = 0x066c,
-	BNXT_ULP_CLASS_HID_01a4 = 0x01a4,
-	BNXT_ULP_CLASS_HID_003e = 0x003e,
-	BNXT_ULP_CLASS_HID_02f6 = 0x02f6,
-	BNXT_ULP_CLASS_HID_078c = 0x078c,
-	BNXT_ULP_CLASS_HID_0044 = 0x0044,
-	BNXT_ULP_CLASS_HID_01ce = 0x01ce,
-	BNXT_ULP_CLASS_HID_0306 = 0x0306,
-	BNXT_ULP_CLASS_HID_067c = 0x067c,
-	BNXT_ULP_CLASS_HID_01b4 = 0x01b4
+	BNXT_ULP_CLASS_HID_0015 = 0x0015
 };
 
 enum bnxt_ulp_act_hid {
-	BNXT_ULP_ACT_HID_015a = 0x015a,
-	BNXT_ULP_ACT_HID_00eb = 0x00eb,
-	BNXT_ULP_ACT_HID_0043 = 0x0043,
-	BNXT_ULP_ACT_HID_03d8 = 0x03d8,
-	BNXT_ULP_ACT_HID_02c1 = 0x02c1,
-	BNXT_ULP_ACT_HID_015e = 0x015e,
-	BNXT_ULP_ACT_HID_00ef = 0x00ef,
-	BNXT_ULP_ACT_HID_0047 = 0x0047,
-	BNXT_ULP_ACT_HID_03dc = 0x03dc,
-	BNXT_ULP_ACT_HID_02c5 = 0x02c5,
-	BNXT_ULP_ACT_HID_025b = 0x025b,
-	BNXT_ULP_ACT_HID_01ec = 0x01ec,
-	BNXT_ULP_ACT_HID_0144 = 0x0144,
-	BNXT_ULP_ACT_HID_04d9 = 0x04d9,
-	BNXT_ULP_ACT_HID_03c2 = 0x03c2,
-	BNXT_ULP_ACT_HID_025f = 0x025f,
-	BNXT_ULP_ACT_HID_01f0 = 0x01f0,
-	BNXT_ULP_ACT_HID_0148 = 0x0148,
-	BNXT_ULP_ACT_HID_04dd = 0x04dd,
-	BNXT_ULP_ACT_HID_03c6 = 0x03c6,
 	BNXT_ULP_ACT_HID_0000 = 0x0000,
-	BNXT_ULP_ACT_HID_0002 = 0x0002,
-	BNXT_ULP_ACT_HID_0800 = 0x0800,
-	BNXT_ULP_ACT_HID_0101 = 0x0101,
-	BNXT_ULP_ACT_HID_0020 = 0x0020,
-	BNXT_ULP_ACT_HID_0901 = 0x0901,
-	BNXT_ULP_ACT_HID_0121 = 0x0121,
-	BNXT_ULP_ACT_HID_0004 = 0x0004,
-	BNXT_ULP_ACT_HID_0006 = 0x0006,
-	BNXT_ULP_ACT_HID_0804 = 0x0804,
-	BNXT_ULP_ACT_HID_0105 = 0x0105,
-	BNXT_ULP_ACT_HID_0024 = 0x0024,
-	BNXT_ULP_ACT_HID_0905 = 0x0905,
-	BNXT_ULP_ACT_HID_0125 = 0x0125,
 	BNXT_ULP_ACT_HID_0001 = 0x0001,
-	BNXT_ULP_ACT_HID_0005 = 0x0005,
-	BNXT_ULP_ACT_HID_0009 = 0x0009,
-	BNXT_ULP_ACT_HID_000d = 0x000d,
-	BNXT_ULP_ACT_HID_0021 = 0x0021,
-	BNXT_ULP_ACT_HID_0029 = 0x0029,
-	BNXT_ULP_ACT_HID_0025 = 0x0025,
-	BNXT_ULP_ACT_HID_002d = 0x002d,
-	BNXT_ULP_ACT_HID_0801 = 0x0801,
-	BNXT_ULP_ACT_HID_0809 = 0x0809,
-	BNXT_ULP_ACT_HID_0805 = 0x0805,
-	BNXT_ULP_ACT_HID_080d = 0x080d,
-	BNXT_ULP_ACT_HID_0c15 = 0x0c15,
-	BNXT_ULP_ACT_HID_0c19 = 0x0c19,
-	BNXT_ULP_ACT_HID_02f6 = 0x02f6,
-	BNXT_ULP_ACT_HID_04f8 = 0x04f8,
-	BNXT_ULP_ACT_HID_01df = 0x01df,
-	BNXT_ULP_ACT_HID_07e5 = 0x07e5,
-	BNXT_ULP_ACT_HID_06ce = 0x06ce,
-	BNXT_ULP_ACT_HID_02fa = 0x02fa,
-	BNXT_ULP_ACT_HID_04fc = 0x04fc,
-	BNXT_ULP_ACT_HID_01e3 = 0x01e3,
-	BNXT_ULP_ACT_HID_07e9 = 0x07e9,
-	BNXT_ULP_ACT_HID_06d2 = 0x06d2,
-	BNXT_ULP_ACT_HID_03f7 = 0x03f7,
-	BNXT_ULP_ACT_HID_05f9 = 0x05f9,
-	BNXT_ULP_ACT_HID_02e0 = 0x02e0,
-	BNXT_ULP_ACT_HID_08e6 = 0x08e6,
-	BNXT_ULP_ACT_HID_07cf = 0x07cf,
-	BNXT_ULP_ACT_HID_03fb = 0x03fb,
-	BNXT_ULP_ACT_HID_05fd = 0x05fd,
-	BNXT_ULP_ACT_HID_02e4 = 0x02e4,
-	BNXT_ULP_ACT_HID_08ea = 0x08ea,
-	BNXT_ULP_ACT_HID_07d3 = 0x07d3,
-	BNXT_ULP_ACT_HID_040d = 0x040d,
-	BNXT_ULP_ACT_HID_040f = 0x040f,
-	BNXT_ULP_ACT_HID_0413 = 0x0413,
-	BNXT_ULP_ACT_HID_0567 = 0x0567,
-	BNXT_ULP_ACT_HID_0a49 = 0x0a49,
-	BNXT_ULP_ACT_HID_050e = 0x050e,
-	BNXT_ULP_ACT_HID_0668 = 0x0668,
-	BNXT_ULP_ACT_HID_0b4a = 0x0b4a,
-	BNXT_ULP_ACT_HID_0411 = 0x0411,
-	BNXT_ULP_ACT_HID_056b = 0x056b,
-	BNXT_ULP_ACT_HID_0a4d = 0x0a4d,
-	BNXT_ULP_ACT_HID_0512 = 0x0512,
-	BNXT_ULP_ACT_HID_066c = 0x066c,
-	BNXT_ULP_ACT_HID_0b4e = 0x0b4e
+	BNXT_ULP_ACT_HID_0400 = 0x0400,
+	BNXT_ULP_ACT_HID_0331 = 0x0331,
+	BNXT_ULP_ACT_HID_0010 = 0x0010,
+	BNXT_ULP_ACT_HID_0731 = 0x0731,
+	BNXT_ULP_ACT_HID_0341 = 0x0341,
+	BNXT_ULP_ACT_HID_0002 = 0x0002,
+	BNXT_ULP_ACT_HID_0003 = 0x0003,
+	BNXT_ULP_ACT_HID_0402 = 0x0402,
+	BNXT_ULP_ACT_HID_0333 = 0x0333,
+	BNXT_ULP_ACT_HID_0012 = 0x0012,
+	BNXT_ULP_ACT_HID_0733 = 0x0733,
+	BNXT_ULP_ACT_HID_0343 = 0x0343
 };
 
 enum bnxt_ulp_df_tpl {
-	BNXT_ULP_DF_TPL_PORT_TO_VS = 1,
-	BNXT_ULP_DF_TPL_VS_TO_PORT = 2,
-	BNXT_ULP_DF_TPL_VFREP_TO_VF = 3,
-	BNXT_ULP_DF_TPL_VF_TO_VFREP = 4,
-	BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC = 5
+	BNXT_ULP_DF_TPL_PORT_TO_VS = 3,
+	BNXT_ULP_DF_TPL_VS_TO_PORT = 4,
+	BNXT_ULP_DF_TPL_VFREP_TO_VF = 5,
+	BNXT_ULP_DF_TPL_VF_TO_VFREP = 6,
+	BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC = 7
 };
 
 #endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h
index 6bfea8abc6..29c9247d8a 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h
@@ -3,1189 +3,221 @@ 
  * All rights reserved.
  */
 
+/* date: Wed Nov 18 12:19:40 2020 */
+
 #ifndef ULP_HDR_FIELD_ENUMS_H_
 #define ULP_HDR_FIELD_ENUMS_H_
 
-enum bnxt_ulp_hf1 {
-	BNXT_ULP_HF1_IDX_SVIF_INDEX              = 0
-};
-
-enum bnxt_ulp_hf2 {
-	BNXT_ULP_HF2_IDX_SVIF_INDEX              = 0
-};
-
-enum bnxt_ulp_hf3 {
-	BNXT_ULP_HF3_IDX_SVIF_INDEX              = 0
-};
-
-enum bnxt_ulp_hf4 {
-	BNXT_ULP_HF4_IDX_SVIF_INDEX              = 0
-};
-
-enum bnxt_ulp_hf5 {
-	BNXT_ULP_HF5_IDX_SVIF_INDEX              = 0
-};
-
-enum bnxt_ulp_hf6 {
-	BNXT_ULP_HF6_IDX_SVIF_INDEX              = 0,
-	BNXT_ULP_HF6_IDX_O_ETH_DMAC              = 1,
-	BNXT_ULP_HF6_IDX_O_ETH_SMAC              = 2,
-	BNXT_ULP_HF6_IDX_O_ETH_TYPE              = 3,
-	BNXT_ULP_HF6_IDX_OO_VLAN_CFI_PRI         = 4,
-	BNXT_ULP_HF6_IDX_OO_VLAN_VID             = 5,
-	BNXT_ULP_HF6_IDX_OO_VLAN_TYPE            = 6,
-	BNXT_ULP_HF6_IDX_OI_VLAN_CFI_PRI         = 7,
-	BNXT_ULP_HF6_IDX_OI_VLAN_VID             = 8,
-	BNXT_ULP_HF6_IDX_OI_VLAN_TYPE            = 9,
-	BNXT_ULP_HF6_IDX_O_IPV4_VER              = 10,
-	BNXT_ULP_HF6_IDX_O_IPV4_TOS              = 11,
-	BNXT_ULP_HF6_IDX_O_IPV4_LEN              = 12,
-	BNXT_ULP_HF6_IDX_O_IPV4_FRAG_ID          = 13,
-	BNXT_ULP_HF6_IDX_O_IPV4_FRAG_OFF         = 14,
-	BNXT_ULP_HF6_IDX_O_IPV4_TTL              = 15,
-	BNXT_ULP_HF6_IDX_O_IPV4_PROTO_ID         = 16,
-	BNXT_ULP_HF6_IDX_O_IPV4_CSUM             = 17,
-	BNXT_ULP_HF6_IDX_O_IPV4_SRC_ADDR         = 18,
-	BNXT_ULP_HF6_IDX_O_IPV4_DST_ADDR         = 19
-};
-
-enum bnxt_ulp_hf7 {
-	BNXT_ULP_HF7_IDX_SVIF_INDEX              = 0,
-	BNXT_ULP_HF7_IDX_O_ETH_DMAC              = 1,
-	BNXT_ULP_HF7_IDX_O_ETH_SMAC              = 2,
-	BNXT_ULP_HF7_IDX_O_ETH_TYPE              = 3,
-	BNXT_ULP_HF7_IDX_OO_VLAN_CFI_PRI         = 4,
-	BNXT_ULP_HF7_IDX_OO_VLAN_VID             = 5,
-	BNXT_ULP_HF7_IDX_OO_VLAN_TYPE            = 6,
-	BNXT_ULP_HF7_IDX_OI_VLAN_CFI_PRI         = 7,
-	BNXT_ULP_HF7_IDX_OI_VLAN_VID             = 8,
-	BNXT_ULP_HF7_IDX_OI_VLAN_TYPE            = 9,
-	BNXT_ULP_HF7_IDX_O_IPV6_VER              = 10,
-	BNXT_ULP_HF7_IDX_O_IPV6_TC               = 11,
-	BNXT_ULP_HF7_IDX_O_IPV6_FLOW_LABEL       = 12,
-	BNXT_ULP_HF7_IDX_O_IPV6_PAYLOAD_LEN      = 13,
-	BNXT_ULP_HF7_IDX_O_IPV6_PROTO_ID         = 14,
-	BNXT_ULP_HF7_IDX_O_IPV6_TTL              = 15,
-	BNXT_ULP_HF7_IDX_O_IPV6_SRC_ADDR         = 16,
-	BNXT_ULP_HF7_IDX_O_IPV6_DST_ADDR         = 17
-};
-
-enum bnxt_ulp_hf8 {
-	BNXT_ULP_HF8_IDX_SVIF_INDEX              = 0,
-	BNXT_ULP_HF8_IDX_O_ETH_DMAC              = 1,
-	BNXT_ULP_HF8_IDX_O_ETH_SMAC              = 2,
-	BNXT_ULP_HF8_IDX_O_ETH_TYPE              = 3,
-	BNXT_ULP_HF8_IDX_OO_VLAN_CFI_PRI         = 4,
-	BNXT_ULP_HF8_IDX_OO_VLAN_VID             = 5,
-	BNXT_ULP_HF8_IDX_OO_VLAN_TYPE            = 6,
-	BNXT_ULP_HF8_IDX_OI_VLAN_CFI_PRI         = 7,
-	BNXT_ULP_HF8_IDX_OI_VLAN_VID             = 8,
-	BNXT_ULP_HF8_IDX_OI_VLAN_TYPE            = 9,
-	BNXT_ULP_HF8_IDX_O_IPV4_VER              = 10,
-	BNXT_ULP_HF8_IDX_O_IPV4_TOS              = 11,
-	BNXT_ULP_HF8_IDX_O_IPV4_LEN              = 12,
-	BNXT_ULP_HF8_IDX_O_IPV4_FRAG_ID          = 13,
-	BNXT_ULP_HF8_IDX_O_IPV4_FRAG_OFF         = 14,
-	BNXT_ULP_HF8_IDX_O_IPV4_TTL              = 15,
-	BNXT_ULP_HF8_IDX_O_IPV4_PROTO_ID         = 16,
-	BNXT_ULP_HF8_IDX_O_IPV4_CSUM             = 17,
-	BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR         = 18,
-	BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR         = 19,
-	BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT          = 20,
-	BNXT_ULP_HF8_IDX_O_UDP_DST_PORT          = 21,
-	BNXT_ULP_HF8_IDX_O_UDP_LENGTH            = 22,
-	BNXT_ULP_HF8_IDX_O_UDP_CSUM              = 23
-};
-
-enum bnxt_ulp_hf9 {
-	BNXT_ULP_HF9_IDX_SVIF_INDEX              = 0,
-	BNXT_ULP_HF9_IDX_O_ETH_DMAC              = 1,
-	BNXT_ULP_HF9_IDX_O_ETH_SMAC              = 2,
-	BNXT_ULP_HF9_IDX_O_ETH_TYPE              = 3,
-	BNXT_ULP_HF9_IDX_OO_VLAN_CFI_PRI         = 4,
-	BNXT_ULP_HF9_IDX_OO_VLAN_VID             = 5,
-	BNXT_ULP_HF9_IDX_OO_VLAN_TYPE            = 6,
-	BNXT_ULP_HF9_IDX_OI_VLAN_CFI_PRI         = 7,
-	BNXT_ULP_HF9_IDX_OI_VLAN_VID             = 8,
-	BNXT_ULP_HF9_IDX_OI_VLAN_TYPE            = 9,
-	BNXT_ULP_HF9_IDX_O_IPV4_VER              = 10,
-	BNXT_ULP_HF9_IDX_O_IPV4_TOS              = 11,
-	BNXT_ULP_HF9_IDX_O_IPV4_LEN              = 12,
-	BNXT_ULP_HF9_IDX_O_IPV4_FRAG_ID          = 13,
-	BNXT_ULP_HF9_IDX_O_IPV4_FRAG_OFF         = 14,
-	BNXT_ULP_HF9_IDX_O_IPV4_TTL              = 15,
-	BNXT_ULP_HF9_IDX_O_IPV4_PROTO_ID         = 16,
-	BNXT_ULP_HF9_IDX_O_IPV4_CSUM             = 17,
-	BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR         = 18,
-	BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR         = 19,
-	BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT          = 20,
-	BNXT_ULP_HF9_IDX_O_TCP_DST_PORT          = 21,
-	BNXT_ULP_HF9_IDX_O_TCP_SENT_SEQ          = 22,
-	BNXT_ULP_HF9_IDX_O_TCP_RECV_ACK          = 23,
-	BNXT_ULP_HF9_IDX_O_TCP_DATA_OFF          = 24,
-	BNXT_ULP_HF9_IDX_O_TCP_TCP_FLAGS         = 25,
-	BNXT_ULP_HF9_IDX_O_TCP_RX_WIN            = 26,
-	BNXT_ULP_HF9_IDX_O_TCP_CSUM              = 27,
-	BNXT_ULP_HF9_IDX_O_TCP_URP               = 28
-};
-
-enum bnxt_ulp_hf10 {
-	BNXT_ULP_HF10_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF10_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF10_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF10_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF10_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF10_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF10_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF10_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF10_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF10_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF10_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF10_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF10_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF10_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF10_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF10_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR        = 17,
-	BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT         = 18,
-	BNXT_ULP_HF10_IDX_O_UDP_DST_PORT         = 19,
-	BNXT_ULP_HF10_IDX_O_UDP_LENGTH           = 20,
-	BNXT_ULP_HF10_IDX_O_UDP_CSUM             = 21
-};
-
-enum bnxt_ulp_hf11 {
-	BNXT_ULP_HF11_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF11_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF11_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF11_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF11_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF11_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF11_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF11_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF11_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF11_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF11_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF11_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF11_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF11_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF11_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF11_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR        = 17,
-	BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT         = 18,
-	BNXT_ULP_HF11_IDX_O_TCP_DST_PORT         = 19,
-	BNXT_ULP_HF11_IDX_O_TCP_SENT_SEQ         = 20,
-	BNXT_ULP_HF11_IDX_O_TCP_RECV_ACK         = 21,
-	BNXT_ULP_HF11_IDX_O_TCP_DATA_OFF         = 22,
-	BNXT_ULP_HF11_IDX_O_TCP_TCP_FLAGS        = 23,
-	BNXT_ULP_HF11_IDX_O_TCP_RX_WIN           = 24,
-	BNXT_ULP_HF11_IDX_O_TCP_CSUM             = 25,
-	BNXT_ULP_HF11_IDX_O_TCP_URP              = 26
-};
-
-enum bnxt_ulp_hf12 {
-	BNXT_ULP_HF12_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF12_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF12_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF12_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF12_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF12_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF12_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF12_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF12_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF12_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF12_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF12_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF12_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF12_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF12_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF12_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF12_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF12_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR        = 19,
-	BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT         = 20,
-	BNXT_ULP_HF12_IDX_O_UDP_DST_PORT         = 21,
-	BNXT_ULP_HF12_IDX_O_UDP_LENGTH           = 22,
-	BNXT_ULP_HF12_IDX_O_UDP_CSUM             = 23
-};
-
-enum bnxt_ulp_hf13 {
-	BNXT_ULP_HF13_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF13_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF13_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF13_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF13_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF13_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF13_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF13_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF13_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF13_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF13_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF13_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF13_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF13_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF13_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF13_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF13_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF13_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR        = 19,
-	BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT         = 20,
-	BNXT_ULP_HF13_IDX_O_TCP_DST_PORT         = 21,
-	BNXT_ULP_HF13_IDX_O_TCP_SENT_SEQ         = 22,
-	BNXT_ULP_HF13_IDX_O_TCP_RECV_ACK         = 23,
-	BNXT_ULP_HF13_IDX_O_TCP_DATA_OFF         = 24,
-	BNXT_ULP_HF13_IDX_O_TCP_TCP_FLAGS        = 25,
-	BNXT_ULP_HF13_IDX_O_TCP_RX_WIN           = 26,
-	BNXT_ULP_HF13_IDX_O_TCP_CSUM             = 27,
-	BNXT_ULP_HF13_IDX_O_TCP_URP              = 28
-};
-
-enum bnxt_ulp_hf14 {
-	BNXT_ULP_HF14_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF14_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF14_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF14_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF14_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF14_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF14_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF14_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF14_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF14_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF14_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF14_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF14_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF14_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF14_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF14_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR        = 17,
-	BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT         = 18,
-	BNXT_ULP_HF14_IDX_O_UDP_DST_PORT         = 19,
-	BNXT_ULP_HF14_IDX_O_UDP_LENGTH           = 20,
-	BNXT_ULP_HF14_IDX_O_UDP_CSUM             = 21
-};
-
-enum bnxt_ulp_hf15 {
-	BNXT_ULP_HF15_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF15_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF15_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF15_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF15_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF15_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF15_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF15_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF15_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF15_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF15_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF15_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF15_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF15_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF15_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF15_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR        = 17,
-	BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT         = 18,
-	BNXT_ULP_HF15_IDX_O_TCP_DST_PORT         = 19,
-	BNXT_ULP_HF15_IDX_O_TCP_SENT_SEQ         = 20,
-	BNXT_ULP_HF15_IDX_O_TCP_RECV_ACK         = 21,
-	BNXT_ULP_HF15_IDX_O_TCP_DATA_OFF         = 22,
-	BNXT_ULP_HF15_IDX_O_TCP_TCP_FLAGS        = 23,
-	BNXT_ULP_HF15_IDX_O_TCP_RX_WIN           = 24,
-	BNXT_ULP_HF15_IDX_O_TCP_CSUM             = 25,
-	BNXT_ULP_HF15_IDX_O_TCP_URP              = 26
-};
-
-enum bnxt_ulp_hf16 {
-	BNXT_ULP_HF16_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF16_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF16_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF16_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF16_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF16_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF16_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF16_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF16_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF16_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF16_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF16_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF16_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF16_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF16_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF16_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF16_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF16_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF16_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR        = 19,
-	BNXT_ULP_HF16_IDX_O_UDP_SRC_PORT         = 20,
-	BNXT_ULP_HF16_IDX_O_UDP_DST_PORT         = 21,
-	BNXT_ULP_HF16_IDX_O_UDP_LENGTH           = 22,
-	BNXT_ULP_HF16_IDX_O_UDP_CSUM             = 23,
-	BNXT_ULP_HF16_IDX_T_VXLAN_FLAGS          = 24,
-	BNXT_ULP_HF16_IDX_T_VXLAN_RSVD0          = 25,
-	BNXT_ULP_HF16_IDX_T_VXLAN_VNI            = 26,
-	BNXT_ULP_HF16_IDX_T_VXLAN_RSVD1          = 27
-};
-
-enum bnxt_ulp_hf17 {
-	BNXT_ULP_HF17_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF17_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF17_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF17_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF17_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF17_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF17_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF17_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF17_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF17_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF17_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF17_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF17_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF17_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF17_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF17_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF17_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR        = 17,
-	BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT         = 18,
-	BNXT_ULP_HF17_IDX_O_UDP_DST_PORT         = 19,
-	BNXT_ULP_HF17_IDX_O_UDP_LENGTH           = 20,
-	BNXT_ULP_HF17_IDX_O_UDP_CSUM             = 21,
-	BNXT_ULP_HF17_IDX_T_VXLAN_FLAGS          = 22,
-	BNXT_ULP_HF17_IDX_T_VXLAN_RSVD0          = 23,
-	BNXT_ULP_HF17_IDX_T_VXLAN_VNI            = 24,
-	BNXT_ULP_HF17_IDX_T_VXLAN_RSVD1          = 25
-};
-
-enum bnxt_ulp_hf18 {
-	BNXT_ULP_HF18_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF18_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF18_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF18_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF18_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF18_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF18_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF18_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF18_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF18_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF18_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF18_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF18_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF18_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF18_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF18_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF18_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF18_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR        = 19,
-	BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT         = 20,
-	BNXT_ULP_HF18_IDX_O_UDP_DST_PORT         = 21,
-	BNXT_ULP_HF18_IDX_O_UDP_LENGTH           = 22,
-	BNXT_ULP_HF18_IDX_O_UDP_CSUM             = 23,
-	BNXT_ULP_HF18_IDX_T_VXLAN_FLAGS          = 24,
-	BNXT_ULP_HF18_IDX_T_VXLAN_RSVD0          = 25,
-	BNXT_ULP_HF18_IDX_T_VXLAN_VNI            = 26,
-	BNXT_ULP_HF18_IDX_T_VXLAN_RSVD1          = 27
-};
-
-enum bnxt_ulp_hf19 {
-	BNXT_ULP_HF19_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF19_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF19_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF19_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF19_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF19_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF19_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF19_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF19_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF19_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF19_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF19_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF19_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF19_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF19_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF19_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF19_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF19_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR        = 19,
-	BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT         = 20,
-	BNXT_ULP_HF19_IDX_O_UDP_DST_PORT         = 21,
-	BNXT_ULP_HF19_IDX_O_UDP_LENGTH           = 22,
-	BNXT_ULP_HF19_IDX_O_UDP_CSUM             = 23,
-	BNXT_ULP_HF19_IDX_T_VXLAN_FLAGS          = 24,
-	BNXT_ULP_HF19_IDX_T_VXLAN_RSVD0          = 25,
-	BNXT_ULP_HF19_IDX_T_VXLAN_VNI            = 26,
-	BNXT_ULP_HF19_IDX_T_VXLAN_RSVD1          = 27,
-	BNXT_ULP_HF19_IDX_I_ETH_DMAC             = 28,
-	BNXT_ULP_HF19_IDX_I_ETH_SMAC             = 29,
-	BNXT_ULP_HF19_IDX_I_ETH_TYPE             = 30,
-	BNXT_ULP_HF19_IDX_IO_VLAN_CFI_PRI        = 31,
-	BNXT_ULP_HF19_IDX_IO_VLAN_VID            = 32,
-	BNXT_ULP_HF19_IDX_IO_VLAN_TYPE           = 33,
-	BNXT_ULP_HF19_IDX_II_VLAN_CFI_PRI        = 34,
-	BNXT_ULP_HF19_IDX_II_VLAN_VID            = 35,
-	BNXT_ULP_HF19_IDX_II_VLAN_TYPE           = 36,
-	BNXT_ULP_HF19_IDX_I_IPV4_VER             = 37,
-	BNXT_ULP_HF19_IDX_I_IPV4_TOS             = 38,
-	BNXT_ULP_HF19_IDX_I_IPV4_LEN             = 39,
-	BNXT_ULP_HF19_IDX_I_IPV4_FRAG_ID         = 40,
-	BNXT_ULP_HF19_IDX_I_IPV4_FRAG_OFF        = 41,
-	BNXT_ULP_HF19_IDX_I_IPV4_TTL             = 42,
-	BNXT_ULP_HF19_IDX_I_IPV4_PROTO_ID        = 43,
-	BNXT_ULP_HF19_IDX_I_IPV4_CSUM            = 44,
-	BNXT_ULP_HF19_IDX_I_IPV4_SRC_ADDR        = 45,
-	BNXT_ULP_HF19_IDX_I_IPV4_DST_ADDR        = 46
-};
-
-enum bnxt_ulp_hf20 {
-	BNXT_ULP_HF20_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF20_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF20_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF20_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF20_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF20_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF20_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF20_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF20_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF20_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF20_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF20_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF20_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF20_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF20_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF20_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF20_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF20_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR        = 19,
-	BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT         = 20,
-	BNXT_ULP_HF20_IDX_O_UDP_DST_PORT         = 21,
-	BNXT_ULP_HF20_IDX_O_UDP_LENGTH           = 22,
-	BNXT_ULP_HF20_IDX_O_UDP_CSUM             = 23
-};
-
-enum bnxt_ulp_hf21 {
-	BNXT_ULP_HF21_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF21_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF21_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF21_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF21_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF21_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF21_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF21_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF21_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF21_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF21_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF21_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF21_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF21_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF21_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF21_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF21_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF21_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR        = 19,
-	BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT         = 20,
-	BNXT_ULP_HF21_IDX_O_TCP_DST_PORT         = 21,
-	BNXT_ULP_HF21_IDX_O_TCP_SENT_SEQ         = 22,
-	BNXT_ULP_HF21_IDX_O_TCP_RECV_ACK         = 23,
-	BNXT_ULP_HF21_IDX_O_TCP_DATA_OFF         = 24,
-	BNXT_ULP_HF21_IDX_O_TCP_TCP_FLAGS        = 25,
-	BNXT_ULP_HF21_IDX_O_TCP_RX_WIN           = 26,
-	BNXT_ULP_HF21_IDX_O_TCP_CSUM             = 27,
-	BNXT_ULP_HF21_IDX_O_TCP_URP              = 28
-};
-
-enum bnxt_ulp_hf22 {
-	BNXT_ULP_HF22_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF22_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF22_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF22_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF22_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF22_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF22_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF22_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF22_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF22_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF22_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF22_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF22_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF22_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF22_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF22_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR        = 17,
-	BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT         = 18,
-	BNXT_ULP_HF22_IDX_O_UDP_DST_PORT         = 19,
-	BNXT_ULP_HF22_IDX_O_UDP_LENGTH           = 20,
-	BNXT_ULP_HF22_IDX_O_UDP_CSUM             = 21
-};
-
-enum bnxt_ulp_hf23 {
-	BNXT_ULP_HF23_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF23_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF23_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF23_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF23_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF23_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF23_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF23_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF23_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF23_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF23_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF23_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF23_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF23_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF23_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF23_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR        = 17,
-	BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT         = 18,
-	BNXT_ULP_HF23_IDX_O_TCP_DST_PORT         = 19,
-	BNXT_ULP_HF23_IDX_O_TCP_SENT_SEQ         = 20,
-	BNXT_ULP_HF23_IDX_O_TCP_RECV_ACK         = 21,
-	BNXT_ULP_HF23_IDX_O_TCP_DATA_OFF         = 22,
-	BNXT_ULP_HF23_IDX_O_TCP_TCP_FLAGS        = 23,
-	BNXT_ULP_HF23_IDX_O_TCP_RX_WIN           = 24,
-	BNXT_ULP_HF23_IDX_O_TCP_CSUM             = 25,
-	BNXT_ULP_HF23_IDX_O_TCP_URP              = 26
-};
-
-enum bnxt_ulp_hf24 {
-	BNXT_ULP_HF24_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF24_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF24_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF24_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF24_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF24_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF24_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF24_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF24_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF24_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF24_IDX_O_IPV4_VER             = 10,
-	BNXT_ULP_HF24_IDX_O_IPV4_TOS             = 11,
-	BNXT_ULP_HF24_IDX_O_IPV4_LEN             = 12,
-	BNXT_ULP_HF24_IDX_O_IPV4_FRAG_ID         = 13,
-	BNXT_ULP_HF24_IDX_O_IPV4_FRAG_OFF        = 14,
-	BNXT_ULP_HF24_IDX_O_IPV4_TTL             = 15,
-	BNXT_ULP_HF24_IDX_O_IPV4_PROTO_ID        = 16,
-	BNXT_ULP_HF24_IDX_O_IPV4_CSUM            = 17,
-	BNXT_ULP_HF24_IDX_O_IPV4_SRC_ADDR        = 18,
-	BNXT_ULP_HF24_IDX_O_IPV4_DST_ADDR        = 19
-};
-
-enum bnxt_ulp_hf25 {
-	BNXT_ULP_HF25_IDX_SVIF_INDEX             = 0,
-	BNXT_ULP_HF25_IDX_O_ETH_DMAC             = 1,
-	BNXT_ULP_HF25_IDX_O_ETH_SMAC             = 2,
-	BNXT_ULP_HF25_IDX_O_ETH_TYPE             = 3,
-	BNXT_ULP_HF25_IDX_OO_VLAN_CFI_PRI        = 4,
-	BNXT_ULP_HF25_IDX_OO_VLAN_VID            = 5,
-	BNXT_ULP_HF25_IDX_OO_VLAN_TYPE           = 6,
-	BNXT_ULP_HF25_IDX_OI_VLAN_CFI_PRI        = 7,
-	BNXT_ULP_HF25_IDX_OI_VLAN_VID            = 8,
-	BNXT_ULP_HF25_IDX_OI_VLAN_TYPE           = 9,
-	BNXT_ULP_HF25_IDX_O_IPV6_VER             = 10,
-	BNXT_ULP_HF25_IDX_O_IPV6_TC              = 11,
-	BNXT_ULP_HF25_IDX_O_IPV6_FLOW_LABEL      = 12,
-	BNXT_ULP_HF25_IDX_O_IPV6_PAYLOAD_LEN     = 13,
-	BNXT_ULP_HF25_IDX_O_IPV6_PROTO_ID        = 14,
-	BNXT_ULP_HF25_IDX_O_IPV6_TTL             = 15,
-	BNXT_ULP_HF25_IDX_O_IPV6_SRC_ADDR        = 16,
-	BNXT_ULP_HF25_IDX_O_IPV6_DST_ADDR        = 17
-};
-
-enum bnxt_ulp_hf_bitmask1 {
-	BNXT_ULP_HF1_BITMASK_SVIF_INDEX          = 0x8000000000000000
-};
-
-enum bnxt_ulp_hf_bitmask2 {
-	BNXT_ULP_HF2_BITMASK_SVIF_INDEX          = 0x8000000000000000
-};
-
-enum bnxt_ulp_hf_bitmask3 {
-	BNXT_ULP_HF3_BITMASK_SVIF_INDEX          = 0x8000000000000000
-};
-
-enum bnxt_ulp_hf_bitmask4 {
-	BNXT_ULP_HF4_BITMASK_SVIF_INDEX          = 0x8000000000000000
-};
-
-enum bnxt_ulp_hf_bitmask5 {
-	BNXT_ULP_HF5_BITMASK_SVIF_INDEX          = 0x8000000000000000
-};
-
-enum bnxt_ulp_hf_bitmask6 {
-	BNXT_ULP_HF6_BITMASK_SVIF_INDEX          = 0x8000000000000000,
-	BNXT_ULP_HF6_BITMASK_O_ETH_DMAC          = 0x4000000000000000,
-	BNXT_ULP_HF6_BITMASK_O_ETH_SMAC          = 0x2000000000000000,
-	BNXT_ULP_HF6_BITMASK_O_ETH_TYPE          = 0x1000000000000000,
-	BNXT_ULP_HF6_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,
-	BNXT_ULP_HF6_BITMASK_OO_VLAN_VID         = 0x0400000000000000,
-	BNXT_ULP_HF6_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,
-	BNXT_ULP_HF6_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,
-	BNXT_ULP_HF6_BITMASK_OI_VLAN_VID         = 0x0080000000000000,
-	BNXT_ULP_HF6_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_VER          = 0x0020000000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_TOS          = 0x0010000000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_LEN          = 0x0008000000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_TTL          = 0x0001000000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_PROTO_ID     = 0x0000800000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,
-	BNXT_ULP_HF6_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000
-};
-
-enum bnxt_ulp_hf_bitmask7 {
-	BNXT_ULP_HF7_BITMASK_SVIF_INDEX          = 0x8000000000000000,
-	BNXT_ULP_HF7_BITMASK_O_ETH_DMAC          = 0x4000000000000000,
-	BNXT_ULP_HF7_BITMASK_O_ETH_SMAC          = 0x2000000000000000,
-	BNXT_ULP_HF7_BITMASK_O_ETH_TYPE          = 0x1000000000000000,
-	BNXT_ULP_HF7_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,
-	BNXT_ULP_HF7_BITMASK_OO_VLAN_VID         = 0x0400000000000000,
-	BNXT_ULP_HF7_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,
-	BNXT_ULP_HF7_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,
-	BNXT_ULP_HF7_BITMASK_OI_VLAN_VID         = 0x0080000000000000,
-	BNXT_ULP_HF7_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_VER          = 0x0020000000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_TC           = 0x0010000000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_FLOW_LABEL   = 0x0008000000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_PAYLOAD_LEN  = 0x0004000000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_PROTO_ID     = 0x0002000000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_TTL          = 0x0001000000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_SRC_ADDR     = 0x0000800000000000,
-	BNXT_ULP_HF7_BITMASK_O_IPV6_DST_ADDR     = 0x0000400000000000
-};
-
-enum bnxt_ulp_hf_bitmask8 {
-	BNXT_ULP_HF8_BITMASK_SVIF_INDEX          = 0x8000000000000000,
-	BNXT_ULP_HF8_BITMASK_O_ETH_DMAC          = 0x4000000000000000,
-	BNXT_ULP_HF8_BITMASK_O_ETH_SMAC          = 0x2000000000000000,
-	BNXT_ULP_HF8_BITMASK_O_ETH_TYPE          = 0x1000000000000000,
-	BNXT_ULP_HF8_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,
-	BNXT_ULP_HF8_BITMASK_OO_VLAN_VID         = 0x0400000000000000,
-	BNXT_ULP_HF8_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,
-	BNXT_ULP_HF8_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,
-	BNXT_ULP_HF8_BITMASK_OI_VLAN_VID         = 0x0080000000000000,
-	BNXT_ULP_HF8_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_VER          = 0x0020000000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_TOS          = 0x0010000000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_LEN          = 0x0008000000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_TTL          = 0x0001000000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID     = 0x0000800000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,
-	BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,
-	BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,
-	BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,
-	BNXT_ULP_HF8_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,
-	BNXT_ULP_HF8_BITMASK_O_UDP_CSUM          = 0x0000010000000000
-};
-
-enum bnxt_ulp_hf_bitmask9 {
-	BNXT_ULP_HF9_BITMASK_SVIF_INDEX          = 0x8000000000000000,
-	BNXT_ULP_HF9_BITMASK_O_ETH_DMAC          = 0x4000000000000000,
-	BNXT_ULP_HF9_BITMASK_O_ETH_SMAC          = 0x2000000000000000,
-	BNXT_ULP_HF9_BITMASK_O_ETH_TYPE          = 0x1000000000000000,
-	BNXT_ULP_HF9_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,
-	BNXT_ULP_HF9_BITMASK_OO_VLAN_VID         = 0x0400000000000000,
-	BNXT_ULP_HF9_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,
-	BNXT_ULP_HF9_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,
-	BNXT_ULP_HF9_BITMASK_OI_VLAN_VID         = 0x0080000000000000,
-	BNXT_ULP_HF9_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_VER          = 0x0020000000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_TOS          = 0x0010000000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_LEN          = 0x0008000000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_TTL          = 0x0001000000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID     = 0x0000800000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,
-	BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT      = 0x0000080000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT      = 0x0000040000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_SENT_SEQ      = 0x0000020000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_RECV_ACK      = 0x0000010000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_DATA_OFF      = 0x0000008000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_TCP_FLAGS     = 0x0000004000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_RX_WIN        = 0x0000002000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_CSUM          = 0x0000001000000000,
-	BNXT_ULP_HF9_BITMASK_O_TCP_URP           = 0x0000000800000000
-};
-
-enum bnxt_ulp_hf_bitmask10 {
-	BNXT_ULP_HF10_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF10_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF10_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF10_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF10_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF10_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF10_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF10_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF10_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF10_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,
-	BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,
-	BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,
-	BNXT_ULP_HF10_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,
-	BNXT_ULP_HF10_BITMASK_O_UDP_CSUM         = 0x0000040000000000
-};
-
-enum bnxt_ulp_hf_bitmask11 {
-	BNXT_ULP_HF11_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF11_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF11_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF11_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF11_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF11_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF11_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF11_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF11_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF11_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_CSUM         = 0x0000004000000000,
-	BNXT_ULP_HF11_BITMASK_O_TCP_URP          = 0x0000002000000000
-};
-
-enum bnxt_ulp_hf_bitmask12 {
-	BNXT_ULP_HF12_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF12_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF12_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF12_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF12_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF12_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF12_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF12_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF12_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF12_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,
-	BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,
-	BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,
-	BNXT_ULP_HF12_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,
-	BNXT_ULP_HF12_BITMASK_O_UDP_CSUM         = 0x0000010000000000
-};
-
-enum bnxt_ulp_hf_bitmask13 {
-	BNXT_ULP_HF13_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF13_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF13_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF13_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF13_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF13_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF13_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF13_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF13_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF13_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT     = 0x0000080000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT     = 0x0000040000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_SENT_SEQ     = 0x0000020000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_RECV_ACK     = 0x0000010000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_DATA_OFF     = 0x0000008000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_TCP_FLAGS    = 0x0000004000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_RX_WIN       = 0x0000002000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_CSUM         = 0x0000001000000000,
-	BNXT_ULP_HF13_BITMASK_O_TCP_URP          = 0x0000000800000000
+enum bnxt_ulp_glb_hf {
+	BNXT_ULP_GLB_HF_WM,
+	BNXT_ULP_GLB_HF_SVIF_INDEX,
+	BNXT_ULP_GLB_HF_O_ETH_DMAC,
+	BNXT_ULP_GLB_HF_I_ETH_DMAC,
+	BNXT_ULP_GLB_HF_O_ETH_SMAC,
+	BNXT_ULP_GLB_HF_I_ETH_SMAC,
+	BNXT_ULP_GLB_HF_O_ETH_TYPE,
+	BNXT_ULP_GLB_HF_I_ETH_TYPE,
+	BNXT_ULP_GLB_HF_O_IPV4_VER,
+	BNXT_ULP_GLB_HF_I_IPV4_VER,
+	BNXT_ULP_GLB_HF_O_IPV4_TOS,
+	BNXT_ULP_GLB_HF_I_IPV4_TOS,
+	BNXT_ULP_GLB_HF_O_IPV4_LEN,
+	BNXT_ULP_GLB_HF_I_IPV4_LEN,
+	BNXT_ULP_GLB_HF_O_IPV4_FRAG_ID,
+	BNXT_ULP_GLB_HF_I_IPV4_FRAG_ID,
+	BNXT_ULP_GLB_HF_O_IPV4_FRAG_OFF,
+	BNXT_ULP_GLB_HF_I_IPV4_FRAG_OFF,
+	BNXT_ULP_GLB_HF_O_IPV4_TTL,
+	BNXT_ULP_GLB_HF_I_IPV4_TTL,
+	BNXT_ULP_GLB_HF_O_IPV4_PROTO_ID,
+	BNXT_ULP_GLB_HF_I_IPV4_PROTO_ID,
+	BNXT_ULP_GLB_HF_O_IPV4_CSUM,
+	BNXT_ULP_GLB_HF_I_IPV4_CSUM,
+	BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR,
+	BNXT_ULP_GLB_HF_I_IPV4_SRC_ADDR,
+	BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR,
+	BNXT_ULP_GLB_HF_I_IPV4_DST_ADDR,
+	BNXT_ULP_GLB_HF_O_IPV6_VER,
+	BNXT_ULP_GLB_HF_I_IPV6_VER,
+	BNXT_ULP_GLB_HF_O_IPV6_TC,
+	BNXT_ULP_GLB_HF_I_IPV6_TC,
+	BNXT_ULP_GLB_HF_O_IPV6_FLOW_LABEL,
+	BNXT_ULP_GLB_HF_I_IPV6_FLOW_LABEL,
+	BNXT_ULP_GLB_HF_O_IPV6_PAYLOAD_LEN,
+	BNXT_ULP_GLB_HF_I_IPV6_PAYLOAD_LEN,
+	BNXT_ULP_GLB_HF_O_IPV6_PROTO_ID,
+	BNXT_ULP_GLB_HF_I_IPV6_PROTO_ID,
+	BNXT_ULP_GLB_HF_O_IPV6_TTL,
+	BNXT_ULP_GLB_HF_I_IPV6_TTL,
+	BNXT_ULP_GLB_HF_O_IPV6_SRC_ADDR,
+	BNXT_ULP_GLB_HF_I_IPV6_SRC_ADDR,
+	BNXT_ULP_GLB_HF_O_IPV6_DST_ADDR,
+	BNXT_ULP_GLB_HF_I_IPV6_DST_ADDR,
+	BNXT_ULP_GLB_HF_O_L3_PROTO_ID,
+	BNXT_ULP_GLB_HF_I_L3_PROTO_ID,
+	BNXT_ULP_GLB_HF_O_L3_SRC_ADDR,
+	BNXT_ULP_GLB_HF_I_L3_SRC_ADDR,
+	BNXT_ULP_GLB_HF_O_L3_DST_ADDR,
+	BNXT_ULP_GLB_HF_I_L3_DST_ADDR,
+	BNXT_ULP_GLB_HF_O_L4_SRC_PORT,
+	BNXT_ULP_GLB_HF_I_L4_SRC_PORT,
+	BNXT_ULP_GLB_HF_O_L4_DST_PORT,
+	BNXT_ULP_GLB_HF_I_L4_DST_PORT,
+	BNXT_ULP_GLB_HF_O_TCP_SRC_PORT,
+	BNXT_ULP_GLB_HF_I_TCP_SRC_PORT,
+	BNXT_ULP_GLB_HF_O_TCP_DST_PORT,
+	BNXT_ULP_GLB_HF_I_TCP_DST_PORT,
+	BNXT_ULP_GLB_HF_O_TCP_SENT_SEQ,
+	BNXT_ULP_GLB_HF_I_TCP_SENT_SEQ,
+	BNXT_ULP_GLB_HF_O_TCP_RECV_ACK,
+	BNXT_ULP_GLB_HF_I_TCP_RECV_ACK,
+	BNXT_ULP_GLB_HF_O_TCP_DATA_OFF,
+	BNXT_ULP_GLB_HF_I_TCP_DATA_OFF,
+	BNXT_ULP_GLB_HF_O_TCP_TCP_FLAGS,
+	BNXT_ULP_GLB_HF_I_TCP_TCP_FLAGS,
+	BNXT_ULP_GLB_HF_O_TCP_RX_WIN,
+	BNXT_ULP_GLB_HF_I_TCP_RX_WIN,
+	BNXT_ULP_GLB_HF_O_TCP_CSUM,
+	BNXT_ULP_GLB_HF_I_TCP_CSUM,
+	BNXT_ULP_GLB_HF_O_TCP_URP,
+	BNXT_ULP_GLB_HF_I_TCP_URP,
+	BNXT_ULP_GLB_HF_O_UDP_SRC_PORT,
+	BNXT_ULP_GLB_HF_I_UDP_SRC_PORT,
+	BNXT_ULP_GLB_HF_O_UDP_DST_PORT,
+	BNXT_ULP_GLB_HF_I_UDP_DST_PORT,
+	BNXT_ULP_GLB_HF_O_UDP_LENGTH,
+	BNXT_ULP_GLB_HF_I_UDP_LENGTH,
+	BNXT_ULP_GLB_HF_O_UDP_CSUM,
+	BNXT_ULP_GLB_HF_I_UDP_CSUM,
+	BNXT_ULP_GLB_HF_OO_VLAN_CFI_PRI,
+	BNXT_ULP_GLB_HF_OI_VLAN_CFI_PRI,
+	BNXT_ULP_GLB_HF_IO_VLAN_CFI_PRI,
+	BNXT_ULP_GLB_HF_II_VLAN_CFI_PRI,
+	BNXT_ULP_GLB_HF_OO_VLAN_VID,
+	BNXT_ULP_GLB_HF_OI_VLAN_VID,
+	BNXT_ULP_GLB_HF_IO_VLAN_VID,
+	BNXT_ULP_GLB_HF_II_VLAN_VID,
+	BNXT_ULP_GLB_HF_OO_VLAN_TYPE,
+	BNXT_ULP_GLB_HF_OI_VLAN_TYPE,
+	BNXT_ULP_GLB_HF_IO_VLAN_TYPE,
+	BNXT_ULP_GLB_HF_II_VLAN_TYPE,
+	BNXT_ULP_GLB_HF_T_VXLAN_FLAGS,
+	BNXT_ULP_GLB_HF_T_VXLAN_RSVD0,
+	BNXT_ULP_GLB_HF_T_VXLAN_VNI,
+	BNXT_ULP_GLB_HF_T_VXLAN_RSVD1
+};
+
+enum bnxt_ulp_hf1_0_bitmask {
+	BNXT_ULP_HF1_0_BITMASK_WM                 = 0x8000000000000000,
+	BNXT_ULP_HF1_0_BITMASK_SVIF_INDEX         = 0x4000000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC         = 0x2000000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC         = 0x1000000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE         = 0x0800000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_VER         = 0x0400000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_TOS         = 0x0200000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_LEN         = 0x0100000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_FRAG_ID     = 0x0080000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_FRAG_OFF    = 0x0040000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_TTL         = 0x0020000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID    = 0x0010000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_CSUM        = 0x0008000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR    = 0x0004000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR    = 0x0002000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT     = 0x0001000000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT     = 0x0000800000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_SENT_SEQ     = 0x0000400000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_RECV_ACK     = 0x0000200000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_DATA_OFF     = 0x0000100000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_TCP_FLAGS    = 0x0000080000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_RX_WIN       = 0x0000040000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_CSUM         = 0x0000020000000000,
+	BNXT_ULP_HF1_0_BITMASK_O_TCP_URP          = 0x0000010000000000
+};
+
+enum bnxt_ulp_hf1_1_bitmask {
+	BNXT_ULP_HF1_1_BITMASK_WM                 = 0x8000000000000000,
+	BNXT_ULP_HF1_1_BITMASK_SVIF_INDEX         = 0x4000000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC         = 0x2000000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC         = 0x1000000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE         = 0x0800000000000000,
+	BNXT_ULP_HF1_1_BITMASK_OO_VLAN_CFI_PRI    = 0x0400000000000000,
+	BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID        = 0x0200000000000000,
+	BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE       = 0x0100000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_VER         = 0x0080000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_TOS         = 0x0040000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_LEN         = 0x0020000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_FRAG_ID     = 0x0010000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_FRAG_OFF    = 0x0008000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_TTL         = 0x0004000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID    = 0x0002000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_CSUM        = 0x0001000000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR    = 0x0000800000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR    = 0x0000400000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_CSUM         = 0x0000004000000000,
+	BNXT_ULP_HF1_1_BITMASK_O_TCP_URP          = 0x0000002000000000
+};
+
+enum bnxt_ulp_hf2_0_bitmask {
+	BNXT_ULP_HF2_0_BITMASK_WM                 = 0x8000000000000000,
+	BNXT_ULP_HF2_0_BITMASK_SVIF_INDEX         = 0x4000000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC         = 0x2000000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_ETH_SMAC         = 0x1000000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_ETH_TYPE         = 0x0800000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_VER         = 0x0400000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_TOS         = 0x0200000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_LEN         = 0x0100000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_FRAG_ID     = 0x0080000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_FRAG_OFF    = 0x0040000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_TTL         = 0x0020000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_PROTO_ID    = 0x0010000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_CSUM        = 0x0008000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_SRC_ADDR    = 0x0004000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR    = 0x0002000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT     = 0x0001000000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT     = 0x0000800000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_SENT_SEQ     = 0x0000400000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_RECV_ACK     = 0x0000200000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_DATA_OFF     = 0x0000100000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_TCP_FLAGS    = 0x0000080000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_RX_WIN       = 0x0000040000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_CSUM         = 0x0000020000000000,
+	BNXT_ULP_HF2_0_BITMASK_O_TCP_URP          = 0x0000010000000000
+};
+
+enum bnxt_ulp_hf2_1_bitmask {
+	BNXT_ULP_HF2_1_BITMASK_WM                 = 0x8000000000000000,
+	BNXT_ULP_HF2_1_BITMASK_SVIF_INDEX         = 0x4000000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC         = 0x2000000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_ETH_SMAC         = 0x1000000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE         = 0x0800000000000000,
+	BNXT_ULP_HF2_1_BITMASK_OO_VLAN_CFI_PRI    = 0x0400000000000000,
+	BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID        = 0x0200000000000000,
+	BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE       = 0x0100000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_VER         = 0x0080000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_TOS         = 0x0040000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_LEN         = 0x0020000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_FRAG_ID     = 0x0010000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_FRAG_OFF    = 0x0008000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_TTL         = 0x0004000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID    = 0x0002000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_CSUM        = 0x0001000000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_SRC_ADDR    = 0x0000800000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR    = 0x0000400000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_CSUM         = 0x0000004000000000,
+	BNXT_ULP_HF2_1_BITMASK_O_TCP_URP          = 0x0000002000000000
 };
-
-enum bnxt_ulp_hf_bitmask14 {
-	BNXT_ULP_HF14_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF14_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF14_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF14_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF14_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF14_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF14_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF14_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF14_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF14_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,
-	BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,
-	BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,
-	BNXT_ULP_HF14_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,
-	BNXT_ULP_HF14_BITMASK_O_UDP_CSUM         = 0x0000040000000000
-};
-
-enum bnxt_ulp_hf_bitmask15 {
-	BNXT_ULP_HF15_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF15_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF15_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF15_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF15_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF15_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF15_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF15_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF15_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF15_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_CSUM         = 0x0000004000000000,
-	BNXT_ULP_HF15_BITMASK_O_TCP_URP          = 0x0000002000000000
-};
-
-enum bnxt_ulp_hf_bitmask16 {
-	BNXT_ULP_HF16_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF16_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF16_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF16_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF16_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF16_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF16_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF16_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF16_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,
-	BNXT_ULP_HF16_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,
-	BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,
-	BNXT_ULP_HF16_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,
-	BNXT_ULP_HF16_BITMASK_O_UDP_CSUM         = 0x0000010000000000,
-	BNXT_ULP_HF16_BITMASK_T_VXLAN_FLAGS      = 0x0000008000000000,
-	BNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD0      = 0x0000004000000000,
-	BNXT_ULP_HF16_BITMASK_T_VXLAN_VNI        = 0x0000002000000000,
-	BNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD1      = 0x0000001000000000
-};
-
-enum bnxt_ulp_hf_bitmask17 {
-	BNXT_ULP_HF17_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF17_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF17_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF17_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF17_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF17_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF17_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF17_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF17_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,
-	BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,
-	BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,
-	BNXT_ULP_HF17_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,
-	BNXT_ULP_HF17_BITMASK_O_UDP_CSUM         = 0x0000040000000000,
-	BNXT_ULP_HF17_BITMASK_T_VXLAN_FLAGS      = 0x0000020000000000,
-	BNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD0      = 0x0000010000000000,
-	BNXT_ULP_HF17_BITMASK_T_VXLAN_VNI        = 0x0000008000000000,
-	BNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD1      = 0x0000004000000000
-};
-
-enum bnxt_ulp_hf_bitmask18 {
-	BNXT_ULP_HF18_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF18_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF18_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF18_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF18_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF18_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF18_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF18_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF18_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF18_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,
-	BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,
-	BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,
-	BNXT_ULP_HF18_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,
-	BNXT_ULP_HF18_BITMASK_O_UDP_CSUM         = 0x0000010000000000,
-	BNXT_ULP_HF18_BITMASK_T_VXLAN_FLAGS      = 0x0000008000000000,
-	BNXT_ULP_HF18_BITMASK_T_VXLAN_RSVD0      = 0x0000004000000000,
-	BNXT_ULP_HF18_BITMASK_T_VXLAN_VNI        = 0x0000002000000000,
-	BNXT_ULP_HF18_BITMASK_T_VXLAN_RSVD1      = 0x0000001000000000
-};
-
-enum bnxt_ulp_hf_bitmask19 {
-	BNXT_ULP_HF19_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF19_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF19_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF19_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF19_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF19_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF19_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF19_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF19_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF19_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,
-	BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,
-	BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,
-	BNXT_ULP_HF19_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,
-	BNXT_ULP_HF19_BITMASK_O_UDP_CSUM         = 0x0000010000000000,
-	BNXT_ULP_HF19_BITMASK_T_VXLAN_FLAGS      = 0x0000008000000000,
-	BNXT_ULP_HF19_BITMASK_T_VXLAN_RSVD0      = 0x0000004000000000,
-	BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI        = 0x0000002000000000,
-	BNXT_ULP_HF19_BITMASK_T_VXLAN_RSVD1      = 0x0000001000000000,
-	BNXT_ULP_HF19_BITMASK_I_ETH_DMAC         = 0x0000000800000000,
-	BNXT_ULP_HF19_BITMASK_I_ETH_SMAC         = 0x0000000400000000,
-	BNXT_ULP_HF19_BITMASK_I_ETH_TYPE         = 0x0000000200000000,
-	BNXT_ULP_HF19_BITMASK_IO_VLAN_CFI_PRI    = 0x0000000100000000,
-	BNXT_ULP_HF19_BITMASK_IO_VLAN_VID        = 0x0000000080000000,
-	BNXT_ULP_HF19_BITMASK_IO_VLAN_TYPE       = 0x0000000040000000,
-	BNXT_ULP_HF19_BITMASK_II_VLAN_CFI_PRI    = 0x0000000020000000,
-	BNXT_ULP_HF19_BITMASK_II_VLAN_VID        = 0x0000000010000000,
-	BNXT_ULP_HF19_BITMASK_II_VLAN_TYPE       = 0x0000000008000000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_VER         = 0x0000000004000000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_TOS         = 0x0000000002000000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_LEN         = 0x0000000001000000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_FRAG_ID     = 0x0000000000800000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_FRAG_OFF    = 0x0000000000400000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_TTL         = 0x0000000000200000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_PROTO_ID    = 0x0000000000100000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_CSUM        = 0x0000000000080000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_SRC_ADDR    = 0x0000000000040000,
-	BNXT_ULP_HF19_BITMASK_I_IPV4_DST_ADDR    = 0x0000000000020000
-};
-
-enum bnxt_ulp_hf_bitmask20 {
-	BNXT_ULP_HF20_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF20_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF20_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF20_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF20_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF20_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF20_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF20_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF20_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF20_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,
-	BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,
-	BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,
-	BNXT_ULP_HF20_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,
-	BNXT_ULP_HF20_BITMASK_O_UDP_CSUM         = 0x0000010000000000
-};
-
-enum bnxt_ulp_hf_bitmask21 {
-	BNXT_ULP_HF21_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF21_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF21_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF21_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF21_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF21_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF21_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF21_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF21_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF21_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT     = 0x0000080000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT     = 0x0000040000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_SENT_SEQ     = 0x0000020000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_RECV_ACK     = 0x0000010000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_DATA_OFF     = 0x0000008000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_TCP_FLAGS    = 0x0000004000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_RX_WIN       = 0x0000002000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_CSUM         = 0x0000001000000000,
-	BNXT_ULP_HF21_BITMASK_O_TCP_URP          = 0x0000000800000000
-};
-
-enum bnxt_ulp_hf_bitmask22 {
-	BNXT_ULP_HF22_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF22_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF22_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF22_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF22_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF22_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF22_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF22_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF22_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF22_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,
-	BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,
-	BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,
-	BNXT_ULP_HF22_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,
-	BNXT_ULP_HF22_BITMASK_O_UDP_CSUM         = 0x0000040000000000
-};
-
-enum bnxt_ulp_hf_bitmask23 {
-	BNXT_ULP_HF23_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF23_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF23_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF23_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF23_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF23_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF23_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF23_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF23_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF23_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_CSUM         = 0x0000004000000000,
-	BNXT_ULP_HF23_BITMASK_O_TCP_URP          = 0x0000002000000000
-};
-
-enum bnxt_ulp_hf_bitmask24 {
-	BNXT_ULP_HF24_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF24_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF24_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF24_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF24_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF24_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF24_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF24_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF24_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF24_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_VER         = 0x0020000000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_TOS         = 0x0010000000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_LEN         = 0x0008000000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,
-	BNXT_ULP_HF24_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000
-};
-
-enum bnxt_ulp_hf_bitmask25 {
-	BNXT_ULP_HF25_BITMASK_SVIF_INDEX         = 0x8000000000000000,
-	BNXT_ULP_HF25_BITMASK_O_ETH_DMAC         = 0x4000000000000000,
-	BNXT_ULP_HF25_BITMASK_O_ETH_SMAC         = 0x2000000000000000,
-	BNXT_ULP_HF25_BITMASK_O_ETH_TYPE         = 0x1000000000000000,
-	BNXT_ULP_HF25_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,
-	BNXT_ULP_HF25_BITMASK_OO_VLAN_VID        = 0x0400000000000000,
-	BNXT_ULP_HF25_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,
-	BNXT_ULP_HF25_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,
-	BNXT_ULP_HF25_BITMASK_OI_VLAN_VID        = 0x0080000000000000,
-	BNXT_ULP_HF25_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_VER         = 0x0020000000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_TC          = 0x0010000000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_TTL         = 0x0001000000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,
-	BNXT_ULP_HF25_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000
-};
-
 #endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c
index eb71b5053c..9f90af2f6e 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c
@@ -3,3359 +3,244 @@ 
  * All rights reserved.
  */
 
-/* date: Thu Oct 15 17:28:37 2020 */
+/* date: Mon Nov 23 17:33:02 2020 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
 #include "ulp_template_struct.h"
-#include "ulp_rte_parser.h"
+#include "ulp_template_db_tbl.h"
 
 /* Mapper templates for header act list */
 struct bnxt_ulp_mapper_tmpl_info ulp_stingray_act_tmpl_list[] = {
-	/* act-ing-[dec_ttl, count, nat]:1 */
 	/* act_tid: 1, stingray, ingress */
 	[1] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 0
-	},
-	/* act-ing-[drop, pop_vlan, push_vlan, dec_ttl, count, vxlan_decap]:2 */
-	/* act_tid: 2, stingray, ingress */
-	[2] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 3,
-	.start_tbl_idx = 6
-	},
-	/* act-ing-[mark, rss, count, pop_vlan, vxlan_decap]:3 */
-	/* act_tid: 3, stingray, ingress */
-	[3] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 3,
-	.start_tbl_idx = 9
-	},
-	/* act_egr-[vxlan_encap, count]:4 */
-	/* act_tid: 4, stingray, egress */
-	[4] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 12
-	},
-	/* act-egr-[dec_ttl, count, nat]:5 */
-	/* act_tid: 5, stingray, egress */
-	[5] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 18
-	},
-	/* act-egr-[drop, push_vlan, dec_ttl, count]:6 */
-	/* act_tid: 6, stingray, egress */
-	[6] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 24
+	.num_tbls = 4,
+	.start_tbl_idx = 0,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 0,
+		.cond_nums = 0 }
 	}
 };
 
 struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
-	{ /* act_tid: 1, stingray, table: int_flow_counter_tbl_0 */
+	{ /* act_tid: 1, stingray, table: int_flow_counter_tbl.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
 	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 0,
+		.cond_nums = 1 },
+	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
 	.result_start_idx = 0,
 	.result_bit_size = 64,
 	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
+	.encap_num_fields = 0
 	},
-	{ /* act_tid: 1, stingray, table: int_act_modify_ipv4_src_0 */
+	{ /* act_tid: 1, stingray, table: int_vtag_encap_record.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
+	.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC,
 	.direction = TF_DIR_RX,
-	.result_start_idx = 1,
-	.result_bit_size = 32,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 1,
+		.cond_nums = 1 },
 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0
-	},
-	{ /* act_tid: 1, stingray, table: int_act_modify_ipv4_dst_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 2,
-	.result_bit_size = 32,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
+	.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0
-	},
-	{ /* act_tid: 1, stingray, table: int_encap_mac_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 3,
+	.result_start_idx = 1,
 	.result_bit_size = 0,
 	.result_num_fields = 0,
-	.encap_num_fields = 12,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
-	.tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR
-	},
-	{ /* act_tid: 1, stingray, table: ext_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_EXT,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 15,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
+	.encap_num_fields = 12
 	},
-	{ /* act_tid: 1, stingray, table: int_full_act_record_0 */
+	{ /* act_tid: 1, stingray, table: int_full_act_record.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 41,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 2, stingray, table: int_flow_counter_tbl_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 67,
-	.result_bit_size = 64,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
-	},
-	{ /* act_tid: 2, stingray, table: ext_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_EXT,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
 	.direction = TF_DIR_RX,
-	.result_start_idx = 68,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 2, stingray, table: int_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
 	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 94,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 3, stingray, table: int_flow_counter_tbl_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 120,
-	.result_bit_size = 64,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 2,
+		.cond_nums = 0 },
 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
-	},
-	{ /* act_tid: 3, stingray, table: ext_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_EXT,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 121,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
+	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 3, stingray, table: int_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 147,
+	.result_start_idx = 13,
 	.result_bit_size = 128,
 	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 4, stingray, table: int_flow_counter_tbl_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 173,
-	.result_bit_size = 64,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
-	},
-	{ /* act_tid: 4, stingray, table: int_sp_smac_ipv4_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET,
-	.cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 174,
-	.result_bit_size = 0,
-	.result_num_fields = 0,
-	.encap_num_fields = 3,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR
-	},
-	{ /* act_tid: 4, stingray, table: int_sp_smac_ipv6_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET,
-	.cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 177,
-	.result_bit_size = 0,
-	.result_num_fields = 0,
-	.encap_num_fields = 3,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR
-	},
-	{ /* act_tid: 4, stingray, table: int_tun_encap_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_ENCAP_64B,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 180,
-	.result_bit_size = 0,
-	.result_num_fields = 0,
-	.encap_num_fields = 12,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0
+	.encap_num_fields = 0
 	},
-	{ /* act_tid: 4, stingray, table: ext_full_act_record_0 */
+	{ /* act_tid: 1, stingray, table: ext_full_act_record.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_EXT,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
+	.direction = TF_DIR_RX,
 	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 192,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 12,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 4, stingray, table: int_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 230,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 5, stingray, table: int_flow_counter_tbl_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 256,
-	.result_bit_size = 64,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
-	},
-	{ /* act_tid: 5, stingray, table: int_act_modify_ipv4_src_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 257,
-	.result_bit_size = 32,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0
-	},
-	{ /* act_tid: 5, stingray, table: int_act_modify_ipv4_dst_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 258,
-	.result_bit_size = 32,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 2,
+		.cond_nums = 0 },
 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0
-	},
-	{ /* act_tid: 5, stingray, table: int_encap_mac_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 259,
-	.result_bit_size = 0,
-	.result_num_fields = 0,
-	.encap_num_fields = 12,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
-	.tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR
-	},
-	{ /* act_tid: 5, stingray, table: int_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 271,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
+	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 5, stingray, table: ext_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_EXT,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 297,
+	.result_start_idx = 39,
 	.result_bit_size = 128,
 	.result_num_fields = 26,
-	.encap_num_fields = 11,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 6, stingray, table: int_flow_counter_tbl_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
+	.encap_num_fields = 0
+	}
+};
+
+struct bnxt_ulp_mapper_cond_info ulp_stingray_act_cond_list[] = {
+	{
 	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 334,
-	.result_bit_size = 64,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
+	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT
 	},
-	{ /* act_tid: 6, stingray, table: int_vtag_encap_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
+	{
 	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 335,
-	.result_bit_size = 0,
-	.result_num_fields = 0,
-	.encap_num_fields = 12,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0
-	},
-	{ /* act_tid: 6, stingray, table: int_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 347,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 6, stingray, table: ext_full_act_record_no_tag_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_EXT,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 373,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* act_tid: 6, stingray, table: ext_full_act_record_one_tag_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_EXT,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 399,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 11,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
+	.cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN
 	}
 };
 
-struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = {
-	/* act_tid: 1, stingray, table: int_flow_counter_tbl_0 */
-	{
-	.description = "count",
-	.field_bit_size = 64,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 1, stingray, table: int_act_modify_ipv4_src_0 */
-	{
-	.description = "ipv4_addr",
-	.field_bit_size = 32,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	/* act_tid: 1, stingray, table: int_act_modify_ipv4_dst_0 */
-	{
-	.description = "ipv4_addr",
-	.field_bit_size = 32,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	/* act_tid: 1, stingray, table: int_encap_mac_record_0 */
-	{
-	.description = "ecv_tun_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l4_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l3_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l2_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_L2_EN_YES,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_vtag_type",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_custom_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_valid",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_tpid",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_vid",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_de",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_pcp",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "spare",
-	.field_bit_size = 80,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 1, stingray, table: ext_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "flow_cntr_ext",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff,
-		BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_rec_int",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 1, stingray, table: int_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff,
-		BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "hit",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "type",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 2, stingray, table: int_flow_counter_tbl_0 */
-	{
-	.description = "count",
-	.field_bit_size = 64,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 2, stingray, table: ext_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "flow_cntr_ext",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_rec_int",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	/* act_tid: 2, stingray, table: int_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "hit",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "type",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 3, stingray, table: int_flow_counter_tbl_0 */
-	{
-	.description = "count",
-	.field_bit_size = 64,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 3, stingray, table: ext_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "flow_cntr_ext",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_rec_int",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 3, stingray, table: int_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "hit",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "type",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 4, stingray, table: int_flow_counter_tbl_0 */
-	{
-	.description = "count",
-	.field_bit_size = 64,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 4, stingray, table: int_sp_smac_ipv4_0 */
-	{
-	.description = "smac",
-	.field_bit_size = 48,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ipv4_src_addr",
-	.field_bit_size = 32,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "reserved",
-	.field_bit_size = 48,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 4, stingray, table: int_sp_smac_ipv6_0 */
-	{
-	.description = "smac",
-	.field_bit_size = 48,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ipv6_src_addr",
-	.field_bit_size = 128,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "reserved",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 4, stingray, table: int_tun_encap_record_0 */
-	{
-	.description = "ecv_tun_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_l4_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_l3_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_l2_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_vtag_type",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_custom_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_valid",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_l2_dmac",
-	.field_bit_size = 48,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_vtag",
-	.field_bit_size = 0,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_ip",
-	.field_bit_size = 0,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_udp",
-	.field_bit_size = 32,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_tun",
-	.field_bit_size = 0,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff,
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	/* act_tid: 4, stingray, table: ext_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "flow_cntr_ext",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_rec_int",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_tun_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_l4_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_l3_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_l2_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_vtag_type",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_custom_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_valid",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_l2_dmac",
-	.field_bit_size = 48,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_vtag",
-	.field_bit_size = 0,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_ip",
-	.field_bit_size = 0,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_udp",
-	.field_bit_size = 32,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "encap_tun",
-	.field_bit_size = 0,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff,
-		(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	/* act_tid: 4, stingray, table: int_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "hit",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "type",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 5, stingray, table: int_flow_counter_tbl_0 */
-	{
-	.description = "count",
-	.field_bit_size = 64,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 5, stingray, table: int_act_modify_ipv4_src_0 */
-	{
-	.description = "ipv4_addr",
-	.field_bit_size = 32,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	/* act_tid: 5, stingray, table: int_act_modify_ipv4_dst_0 */
-	{
-	.description = "ipv4_addr",
-	.field_bit_size = 32,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	/* act_tid: 5, stingray, table: int_encap_mac_record_0 */
-	{
-	.description = "ecv_tun_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l4_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l3_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l2_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_L2_EN_YES,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_vtag_type",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_custom_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_valid",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_tpid",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_vid",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_de",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_pcp",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "spare",
-	.field_bit_size = 80,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 5, stingray, table: int_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff,
-		BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "hit",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "type",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 5, stingray, table: ext_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "flow_cntr_ext",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_rec_int",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tl3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "l3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vnic_or_vport",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_tun_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l4_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l3_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l2_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_L2_EN_YES,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_vtag_type",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_custom_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_valid",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_tpid",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_vid",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_de",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_pcp",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 6, stingray, table: int_flow_counter_tbl_0 */
-	{
-	.description = "count",
-	.field_bit_size = 64,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 6, stingray, table: int_vtag_encap_record_0 */
-	{
-	.description = "ecv_tun_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l4_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l3_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l2_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_vtag_type",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_custom_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_valid",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_tpid",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_vid",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_de",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_pcp",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "spare",
-	.field_bit_size = 80,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	/* act_tid: 6, stingray, table: int_full_act_record_0 */
-	{
-	.description = "flow_cntr_ptr",
-	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "age_enable",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "agg_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "rate_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "flow_cntr_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "tcpflags_key",
-	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_mir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "tcpflags_match",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_ptr",
-	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
+struct bnxt_ulp_mapper_field_info ulp_stingray_act_result_field_list[] = {
+	/* act_tid: 1, stingray, table: int_flow_counter_tbl.0 */
 	{
-	.description = "dst_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "count",
+	.field_bit_size = 64,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
+	/* act_tid: 1, stingray, table: int_vtag_encap_record.0 */
 	{
-	.description = "tcp_dst_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "ecv_tun_type",
+	.field_bit_size = 3,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
-	.description = "src_ip_ptr",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "ecv_l4_type",
+	.field_bit_size = 3,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
-	.description = "tcp_src_port",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "ecv_l3_type",
+	.field_bit_size = 3,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
-	.description = "meter_id",
-	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "ecv_l2_en",
+	.field_bit_size = 1,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
-	.description = "l3_rdir",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "ecv_vtag_type",
+	.field_bit_size = 4,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT,
+	.field_operand = {
+		BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
-	.description = "tl3_rdir",
+	.description = "ecv_custom_en",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
-	.description = "l3_ttl_dec",
+	.description = "ecv_valid",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT,
+	.field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
-	.description = "tl3_ttl_dec",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
-		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
-		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
+	.description = "vtag_tpid",
+	.field_bit_size = 16,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP,
+	.field_operand = {
+		(BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
-	.description = "decap_func",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vnic_or_vport",
+	.description = "vtag_vid",
 	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP,
+	.field_operand = {
+		(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
-	.description = "pop_vlan",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "meter",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "mirror",
-	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "drop",
+	.description = "vtag_de",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff,
-		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff,
-		(uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
-	.description = "hit",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "vtag_pcp",
+	.field_bit_size = 3,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP,
+	.field_operand = {
+		(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
-	.description = "type",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.description = "spare",
+	.field_bit_size = 80,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
-	/* act_tid: 6, stingray, table: ext_full_act_record_no_tag_0 */
+	/* act_tid: 1, stingray, table: int_full_act_record.0 */
 	{
 	.description = "flow_cntr_ptr",
 	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE,
+	.field_operand = {
+		(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
+		BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "age_enable",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "agg_cntr_en",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "rate_cntr_en",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "flow_cntr_en",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT,
+	.field_operand = {
 		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
@@ -3367,75 +252,110 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
-	.description = "flow_cntr_ext",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
 	.description = "tcpflags_key",
 	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "tcpflags_mir",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "tcpflags_match",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "encap_ptr",
 	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "encap_rec_int",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE,
+	.field_operand = {
+		(BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff,
+		BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "dst_ip_ptr",
 	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE,
+	.field_operand = {
+		(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
+		BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "tcp_dst_port",
 	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
+	.field_operand = {
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
+		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.field_operand_true = {
+		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "src_ip_ptr",
 	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE,
+	.field_operand = {
+		(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
+		BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "tcp_src_port",
 	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
+	.field_operand = {
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
+		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.field_operand_true = {
+		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "meter_id",
 	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "l3_rdir",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "tl3_rdir",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "l3_ttl_dec",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD,
+	.field_operand = {
 		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
 		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -3444,8 +364,8 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 	{
 	.description = "tl3_ttl_dec",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD,
+	.field_operand = {
 		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
 		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -3454,38 +374,60 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 	{
 	.description = "decap_func",
 	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST,
+	.field_operand = {
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff,
+		(uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.field_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "vnic_or_vport",
 	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP,
+	.field_operand = {
+		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "pop_vlan",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT,
+	.field_operand = {
+		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,
+		(uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "meter",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "mirror",
 	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "drop",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT,
+	.field_operand = {
 		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff,
@@ -3496,37 +438,47 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 		(uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
-	/* act_tid: 6, stingray, table: ext_full_act_record_one_tag_0 */
+	{
+	.description = "hit",
+	.field_bit_size = 1,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
+	},
+	{
+	.description = "type",
+	.field_bit_size = 1,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
+	},
+	/* act_tid: 1, stingray, table: ext_full_act_record.0 */
 	{
 	.description = "flow_cntr_ptr",
 	.field_bit_size = 14,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
-	.result_operand = {
-		(BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
-		BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE,
+	.field_operand = {
+		(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
+		BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "age_enable",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "agg_cntr_en",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "rate_cntr_en",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "flow_cntr_en",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT,
+	.field_operand = {
 		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff,
@@ -3540,73 +492,113 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 	{
 	.description = "flow_cntr_ext",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "tcpflags_key",
 	.field_bit_size = 8,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "tcpflags_mir",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "tcpflags_match",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "encap_ptr",
 	.field_bit_size = 11,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "encap_rec_int",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "dst_ip_ptr",
 	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE,
+	.field_operand = {
+		(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
+		BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "tcp_dst_port",
 	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
+	.field_operand = {
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff,
+		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.field_operand_true = {
+		(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "src_ip_ptr",
 	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE,
+	.field_operand = {
+		(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
+		BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "tcp_src_port",
 	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST,
+	.field_operand = {
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff,
+		(uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.field_operand_true = {
+		(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "meter_id",
 	.field_bit_size = 10,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "l3_rdir",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "tl3_rdir",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "l3_ttl_dec",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD,
+	.field_operand = {
 		(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
 		BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -3615,8 +607,8 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 	{
 	.description = "tl3_ttl_dec",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD,
+	.field_operand = {
 		(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
 		BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -3625,23 +617,35 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 	{
 	.description = "decap_func",
 	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST,
+	.field_operand = {
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff,
+		((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff,
+		(uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.field_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "vnic_or_vport",
 	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP,
+	.field_operand = {
+		(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
+		BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.description = "pop_vlan",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT,
+	.field_operand = {
 		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,
@@ -3655,18 +659,18 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 	{
 	.description = "meter",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "mirror",
 	.field_bit_size = 2,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO
 	},
 	{
 	.description = "drop",
 	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,
-	.result_operand = {
+	.field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT,
+	.field_operand = {
 		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff,
 		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff,
@@ -3676,81 +680,5 @@  struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] =
 		((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff,
 		(uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_tun_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l4_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l3_type",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_l2_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_vtag_type",
-	.field_bit_size = 4,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {
-		BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "ecv_custom_en",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "ecv_valid",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
-	.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_tpid",
-	.field_bit_size = 16,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_vid",
-	.field_bit_size = 12,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-	},
-	{
-	.description = "vtag_de",
-	.field_bit_size = 1,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
-	},
-	{
-	.description = "vtag_pcp",
-	.field_bit_size = 3,
-	.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP,
-	.result_operand = {
-		(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
-		BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	}
 };
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c
index 53ba637d4e..c836e2f8ed 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c
@@ -3,21096 +3,5059 @@ 
  * All rights reserved.
  */
 
-/* date: Thu Oct 15 17:28:37 2020 */
+/* date: Mon Nov 23 17:33:02 2020 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
 #include "ulp_template_struct.h"
-#include "ulp_rte_parser.h"
+#include "ulp_template_db_tbl.h"
 
 /* Mapper templates for header class list */
 struct bnxt_ulp_mapper_tmpl_info ulp_stingray_class_tmpl_list[] = {
-	/* default-vfr-[port_to_vs]:1 */
 	/* class_tid: 1, stingray, ingress */
 	[1] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
 	.num_tbls = 6,
-	.start_tbl_idx = 0
+	.start_tbl_idx = 0,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 0,
+		.cond_nums = 0 }
 	},
-	/* default-vfr-[vs_to_port]:2 */
-	/* class_tid: 2, stingray, egress */
+	/* class_tid: 2, stingray, ingress */
 	[2] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 7,
-	.start_tbl_idx = 6
+	.num_tbls = 6,
+	.start_tbl_idx = 6,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 2,
+		.cond_nums = 0 }
 	},
-	/* default-vfr-[vfrep_to_vf]:3 */
-	/* class_tid: 3, stingray, egress */
+	/* class_tid: 3, stingray, ingress */
 	[3] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 7,
-	.start_tbl_idx = 13
+	.num_tbls = 6,
+	.start_tbl_idx = 12,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 }
 	},
-	/* default-vfr-[vf_to_vfrep]:4 */
 	/* class_tid: 4, stingray, egress */
 	[4] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 7,
-	.start_tbl_idx = 20
+	.num_tbls = 8,
+	.start_tbl_idx = 18,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 }
 	},
-	/* default-egr-[loopback_action_rec]:5 */
 	/* class_tid: 5, stingray, egress */
 	[5] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 1,
-	.start_tbl_idx = 27
+	.num_tbls = 7,
+	.start_tbl_idx = 26,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 }
 	},
-	/* class-ing-em-[eth, (vlan), ipv4]-[smac, dmac, (vid)]:6 */
-	/* class_tid: 6, stingray, ingress */
+	/* class_tid: 6, stingray, egress */
 	[6] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 28
+	.num_tbls = 7,
+	.start_tbl_idx = 33,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 }
 	},
-	/* class-ing-em-[eth, (vlan), ipv6]-[smac, dmac, (vid)]:7 */
-	/* class_tid: 7, stingray, ingress */
+	/* class_tid: 7, stingray, egress */
 	[7] = {
 	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 33
-	},
-	/* class-ing-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:8 */
-	/* class_tid: 8, stingray, ingress */
-	[8] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 38
-	},
-	/* class-ing-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:9 */
-	/* class_tid: 9, stingray, ingress */
-	[9] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 44
-	},
-	/* class-ing-em-[eth,ipv6, udp]-[sip, dip, sp, dp]:10 */
-	/* class_tid: 10, stingray, ingress */
-	[10] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 50
-	},
-	/* class-ing-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:11 */
-	/* class_tid: 11, stingray, ingress */
-	[11] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 56
-	},
-	/* class-ing-em-[eth, (vlan), ipv4, udp]-[dmac, (vid), sip, dip, sp, dp]:12 */
-	/* class_tid: 12, stingray, ingress */
-	[12] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 62
-	},
-	/* class-ing-em-[eth, (vlan), ipv4, tcp]-[dmac, (vid), sip, dip, sp, dp]:13 */
-	/* class_tid: 13, stingray, ingress */
-	[13] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 67
+	.num_tbls = 1,
+	.start_tbl_idx = 40,
+	.reject_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 }
+	}
+};
+
+struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
+	{ /* class_tid: 1, stingray, table: l2_cntxt_tcam.0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 0,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
+	.pri_operand = 0,
+	.key_start_idx = 0,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
+	.key_num_fields = 13,
+	.result_start_idx = 0,
+	.result_bit_size = 64,
+	.result_num_fields = 13,
+	.encap_num_fields = 0,
+	.ident_start_idx = 0,
+	.ident_nums = 1
 	},
-	/* class-ing-em-[eth, (vlan), ipv6, udp]-[dmac, (vid), sip, dip, sp, dp]:14 */
-	/* class_tid: 14, stingray, ingress */
-	[14] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 72
+	{ /* class_tid: 1, stingray, table: profile_tcam_cache.rd */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+	.resource_sub_type =
+		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 0,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 13,
+	.blob_key_bit_size = 14,
+	.key_bit_size = 14,
+	.key_num_fields = 3,
+	.ident_start_idx = 1,
+	.ident_nums = 3
 	},
-	/* class-ing-em-[eth, (vlan), ipv6, tcp]-[dmac, (vid), sip, dip, sp, dp]:15 */
-	/* class_tid: 15, stingray, ingress */
-	[15] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 77
+	{ /* class_tid: 1, stingray, table: profile_tcam.0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 0,
+		.cond_nums = 1 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+	.fdb_operand = BNXT_ULP_RF_IDX_RID,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+	.key_start_idx = 16,
+	.blob_key_bit_size = 81,
+	.key_bit_size = 81,
+	.key_num_fields = 43,
+	.result_start_idx = 13,
+	.result_bit_size = 38,
+	.result_num_fields = 8,
+	.encap_num_fields = 0,
+	.ident_start_idx = 4,
+	.ident_nums = 1
 	},
-	/* class-ing-em-[eth, (vlan), ipv4, udp, vxlan]-[dmac, (vid), dip, dp]:16 */
-	/* class_tid: 16, stingray, ingress */
-	[16] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 82
+	{ /* class_tid: 1, stingray, table: profile_tcam_cache.wr */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+	.resource_sub_type =
+		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 1,
+		.cond_nums = 1 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 59,
+	.blob_key_bit_size = 14,
+	.key_bit_size = 14,
+	.key_num_fields = 3,
+	.result_start_idx = 21,
+	.result_bit_size = 66,
+	.result_num_fields = 5,
+	.encap_num_fields = 0
 	},
-	/* class-ing-em-[eth, (vlan), ipv6, udp, vxlan]-[t_dmac, (vid), t_dip, t_dp]:17 */
-	/* class_tid: 17, stingray, ingress */
-	[17] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 87
+	{ /* class_tid: 1, stingray, table: eem.ext_0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
+	.resource_type = TF_MEM_EXTERNAL,
+	.direction = TF_DIR_RX,
+	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 2,
+		.cond_nums = 0 },
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
+	.key_start_idx = 62,
+	.blob_key_bit_size = 448,
+	.key_bit_size = 448,
+	.key_num_fields = 10,
+	.result_start_idx = 26,
+	.result_bit_size = 64,
+	.result_num_fields = 9,
+	.encap_num_fields = 0
 	},
-	/* class-ing-em-f1-[eth, ipv4, udp, vxlan]-[t_dmac]:18 */
-	/* class_tid: 18, stingray, ingress */
-	[18] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 92
+	{ /* class_tid: 1, stingray, table: em.int_0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
+	.resource_type = TF_MEM_INTERNAL,
+	.direction = TF_DIR_RX,
+	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 2,
+		.cond_nums = 0 },
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
+	.key_start_idx = 72,
+	.blob_key_bit_size = 176,
+	.key_bit_size = 176,
+	.key_num_fields = 10,
+	.result_start_idx = 35,
+	.result_bit_size = 64,
+	.result_num_fields = 9,
+	.encap_num_fields = 0
 	},
-	/* class-ing-em-f2-[ipv4, udp, vxlan]-[vni, i_dmac]:19 */
-	/* class_tid: 19, stingray, ingress */
-	[19] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 97
+	{ /* class_tid: 2, stingray, table: l2_cntxt_tcam.0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 2,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
+	.pri_operand = 0,
+	.key_start_idx = 82,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
+	.key_num_fields = 13,
+	.result_start_idx = 44,
+	.result_bit_size = 64,
+	.result_num_fields = 13,
+	.encap_num_fields = 0,
+	.ident_start_idx = 5,
+	.ident_nums = 1
 	},
-	/* class-egr-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:20 */
-	/* class_tid: 20, stingray, egress */
-	[20] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 102
+	{ /* class_tid: 2, stingray, table: profile_tcam_cache.rd */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+	.resource_sub_type =
+		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 2,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 95,
+	.blob_key_bit_size = 14,
+	.key_bit_size = 14,
+	.key_num_fields = 3,
+	.ident_start_idx = 6,
+	.ident_nums = 3
 	},
-	/* class-egr-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:21 */
-	/* class_tid: 21, stingray, egress */
-	[21] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 108
+	{ /* class_tid: 2, stingray, table: profile_tcam.0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 2,
+		.cond_nums = 1 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+	.fdb_operand = BNXT_ULP_RF_IDX_RID,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+	.key_start_idx = 98,
+	.blob_key_bit_size = 81,
+	.key_bit_size = 81,
+	.key_num_fields = 43,
+	.result_start_idx = 57,
+	.result_bit_size = 38,
+	.result_num_fields = 8,
+	.encap_num_fields = 0,
+	.ident_start_idx = 9,
+	.ident_nums = 1
 	},
-	/* class-egr-em-[eth-ipv6-udp]-[sip-dip-sp-dp]:22 */
-	/* class_tid: 22, stingray, egress */
-	[22] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 114
+	{ /* class_tid: 2, stingray, table: profile_tcam_cache.wr */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+	.resource_sub_type =
+		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 3,
+		.cond_nums = 1 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 141,
+	.blob_key_bit_size = 14,
+	.key_bit_size = 14,
+	.key_num_fields = 3,
+	.result_start_idx = 65,
+	.result_bit_size = 66,
+	.result_num_fields = 5,
+	.encap_num_fields = 0
 	},
-	/* class-egr-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:23 */
-	/* class_tid: 23, stingray, egress */
-	[23] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 6,
-	.start_tbl_idx = 120
+	{ /* class_tid: 2, stingray, table: eem.ext_0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
+	.resource_type = TF_MEM_EXTERNAL,
+	.direction = TF_DIR_RX,
+	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
+	.key_start_idx = 144,
+	.blob_key_bit_size = 448,
+	.key_bit_size = 448,
+	.key_num_fields = 10,
+	.result_start_idx = 70,
+	.result_bit_size = 64,
+	.result_num_fields = 9,
+	.encap_num_fields = 0
 	},
-	/* class-egr-em-[eth, (vlan), ipv4]-[smac, dmac, type]:24 */
-	/* class_tid: 24, stingray, egress */
-	[24] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 126
+	{ /* class_tid: 2, stingray, table: em.int_0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
+	.resource_type = TF_MEM_INTERNAL,
+	.direction = TF_DIR_RX,
+	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
+	.key_start_idx = 154,
+	.blob_key_bit_size = 176,
+	.key_bit_size = 176,
+	.key_num_fields = 10,
+	.result_start_idx = 79,
+	.result_bit_size = 64,
+	.result_num_fields = 9,
+	.encap_num_fields = 0
 	},
-	/* class-egr-em-[eth, (vlan), ipv6]-[smac, dmac, type]:25 */
-	/* class_tid: 25, stingray, egress */
-	[25] = {
-	.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
-	.num_tbls = 5,
-	.start_tbl_idx = 131
-	}
-};
-
-struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
-	{ /* class_tid: 1, stingray, table: int_full_act_record_0 */
+	{ /* class_tid: 3, stingray, table: int_full_act_record.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
 	.direction = TF_DIR_RX,
-	.result_start_idx = 0,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.result_start_idx = 88,
 	.result_bit_size = 128,
 	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 0,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 26,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 0,
-	.ident_nums = 1
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 1, stingray, table: l2_cntxt_tcam_0 */
+	{ /* class_tid: 3, stingray, table: l2_cntxt_tcam.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
 	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+	.fdb_operand = BNXT_ULP_RF_IDX_RID,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
 	.pri_operand = 0,
-	.key_start_idx = 1,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+	.key_start_idx = 164,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
 	.key_num_fields = 13,
-	.result_start_idx = 27,
+	.result_start_idx = 114,
 	.result_bit_size = 64,
 	.result_num_fields = 13,
 	.encap_num_fields = 0,
-	.ident_start_idx = 1,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+	.ident_start_idx = 10,
+	.ident_nums = 1
+	},
+	{ /* class_tid: 3, stingray, table: l2_cntxt_tcam_cache.wr */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+	.resource_sub_type =
+		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
+	.direction = TF_DIR_RX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 177,
+	.blob_key_bit_size = 8,
+	.key_bit_size = 8,
+	.key_num_fields = 1,
+	.result_start_idx = 127,
+	.result_bit_size = 62,
+	.result_num_fields = 4,
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 1, stingray, table: parif_def_lkup_arec_ptr_0 */
+	{ /* class_tid: 3, stingray, table: parif_def_lkup_arec_ptr.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
 	.resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR,
 	.direction = TF_DIR_RX,
-	.result_start_idx = 40,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
+	.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.result_start_idx = 131,
 	.result_bit_size = 32,
 	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
-	.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 1, stingray, table: parif_def_arec_ptr_0 */
+	{ /* class_tid: 3, stingray, table: parif_def_arec_ptr.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
 	.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
 	.direction = TF_DIR_RX,
-	.result_start_idx = 41,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
+	.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.result_start_idx = 132,
 	.result_bit_size = 32,
 	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
-	.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 1, stingray, table: parif_def_err_arec_ptr_0 */
+	{ /* class_tid: 3, stingray, table: parif_def_err_arec_ptr.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
 	.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
 	.direction = TF_DIR_RX,
-	.result_start_idx = 42,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
+	.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.result_start_idx = 133,
 	.result_bit_size = 32,
 	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
-	.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 2, stingray, table: int_full_act_record_0 */
+	{ /* class_tid: 4, stingray, table: int_full_act_record.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION,
 	.direction = TF_DIR_TX,
-	.result_start_idx = 43,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 4,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.result_start_idx = 134,
 	.result_bit_size = 128,
 	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */
+	{ /* class_tid: 4, stingray, table: l2_cntxt_tcam_bypass.vfr_0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET,
-	.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE,
 	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 4,
+		.cond_nums = 1 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
 	.pri_operand = 0,
-	.key_start_idx = 14,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+	.key_start_idx = 178,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
 	.key_num_fields = 13,
-	.result_start_idx = 69,
+	.result_start_idx = 160,
 	.result_bit_size = 64,
 	.result_num_fields = 13,
 	.encap_num_fields = 0,
-	.ident_start_idx = 1,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+	.ident_start_idx = 11,
+	.ident_nums = 0
 	},
-	{ /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
+	{ /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.rd */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET,
-	.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE,
 	.direction = TF_DIR_TX,
-	.key_start_idx = 27,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+		.cond_start_idx = 5,
+		.cond_nums = 1 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 191,
+	.blob_key_bit_size = 8,
+	.key_bit_size = 8,
 	.key_num_fields = 1,
-	.result_start_idx = 82,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 1,
+	.ident_start_idx = 11,
 	.ident_nums = 1
 	},
-	{ /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */
+	{ /* class_tid: 4, stingray, table: l2_cntxt_tcam.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET,
-	.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE,
 	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 28,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+		.cond_start_idx = 6,
+		.cond_nums = 2 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+	.fdb_operand = BNXT_ULP_RF_IDX_RID,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+	.key_start_idx = 192,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
 	.key_num_fields = 13,
-	.result_start_idx = 83,
+	.result_start_idx = 173,
 	.result_bit_size = 64,
 	.result_num_fields = 13,
 	.encap_num_fields = 0,
-	.ident_start_idx = 2,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+	.ident_start_idx = 12,
+	.ident_nums = 1
+	},
+	{ /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.wr */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+	.resource_sub_type =
+		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
+	.direction = TF_DIR_TX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+		.cond_start_idx = 8,
+		.cond_nums = 2 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 205,
+	.blob_key_bit_size = 8,
+	.key_bit_size = 8,
+	.key_num_fields = 1,
+	.result_start_idx = 186,
+	.result_bit_size = 62,
+	.result_num_fields = 4,
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 2, stingray, table: parif_def_lkup_arec_ptr_0 */
+	{ /* class_tid: 4, stingray, table: parif_def_lkup_arec_ptr.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
 	.resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR,
 	.direction = TF_DIR_TX,
-	.result_start_idx = 96,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
+	.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.result_start_idx = 190,
 	.result_bit_size = 32,
 	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
-	.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 2, stingray, table: parif_def_arec_ptr_0 */
+	{ /* class_tid: 4, stingray, table: parif_def_arec_ptr.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
 	.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
 	.direction = TF_DIR_TX,
-	.result_start_idx = 97,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
+	.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.result_start_idx = 191,
 	.result_bit_size = 32,
 	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
-	.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 2, stingray, table: parif_def_err_arec_ptr_0 */
+	{ /* class_tid: 4, stingray, table: parif_def_err_arec_ptr.0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
 	.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
 	.direction = TF_DIR_TX,
-	.result_start_idx = 98,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
+	.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.result_start_idx = 192,
 	.result_bit_size = 32,
 	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
-	.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 3, stingray, table: egr_int_vtag_encap_record_0 */
+	{ /* class_tid: 5, stingray, table: int_vtag_encap_record.egr0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_ACT_ENCAP_8B,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
 	.direction = TF_DIR_TX,
-	.result_start_idx = 99,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.result_start_idx = 193,
 	.result_bit_size = 0,
 	.result_num_fields = 0,
-	.encap_num_fields = 12,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0
+	.encap_num_fields = 12
 	},
-	{ /* class_tid: 3, stingray, table: egr_int_full_act_record_0 */
+	{ /* class_tid: 5, stingray, table: int_full_act_record.egr0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION,
 	.direction = TF_DIR_TX,
-	.result_start_idx = 111,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.result_start_idx = 205,
 	.result_bit_size = 128,
 	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 41,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 137,
-	.result_bit_size = 0,
-	.result_num_fields = 0,
-	.encap_num_fields = 0,
-	.ident_start_idx = 2,
-	.ident_nums = 0
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 3, stingray, table: egr_l2_cntxt_tcam_0 */
+	{ /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.egr0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
 	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+	.fdb_operand = BNXT_ULP_RF_IDX_RID,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
 	.pri_operand = 0,
-	.key_start_idx = 42,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
+	.key_start_idx = 206,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
 	.key_num_fields = 13,
-	.result_start_idx = 137,
+	.result_start_idx = 231,
 	.result_bit_size = 64,
 	.result_num_fields = 13,
 	.encap_num_fields = 0,
-	.ident_start_idx = 2,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+	.ident_start_idx = 13,
+	.ident_nums = 0
 	},
-	{ /* class_tid: 3, stingray, table: ing_int_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 150,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 55,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 176,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 2,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 68,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 189,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 2,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+	{ /* class_tid: 5, stingray, table: l2_cntxt_tcam_cache.wr_egr0 */
+	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
 	.direction = TF_DIR_TX,
-	.key_start_idx = 81,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.key_start_idx = 219,
+	.blob_key_bit_size = 8,
+	.key_bit_size = 8,
 	.key_num_fields = 1,
-	.result_start_idx = 202,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 2,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 4, stingray, table: egr_l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 82,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 203,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 3,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 4, stingray, table: egr_parif_def_lkup_arec_ptr_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
-	.resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 216,
-	.result_bit_size = 32,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
-	.tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF
-	},
-	{ /* class_tid: 4, stingray, table: egr_parif_def_arec_ptr_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
-	.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 217,
-	.result_bit_size = 32,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
-	.tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF
-	},
-	{ /* class_tid: 4, stingray, table: egr_parif_def_err_arec_ptr_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
-	.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 218,
-	.result_bit_size = 32,
-	.result_num_fields = 1,
+	.result_start_idx = 244,
+	.result_bit_size = 62,
+	.result_num_fields = 4,
 	.encap_num_fields = 0,
-	.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
-	.tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF
+	.ident_start_idx = 13,
+	.ident_nums = 0
 	},
-	{ /* class_tid: 4, stingray, table: ing_int_full_act_record_0 */
+	{ /* class_tid: 5, stingray, table: int_full_act_record.ing0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
 	.resource_sub_type =
 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
 	.direction = TF_DIR_RX,
-	.result_start_idx = 219,
-	.result_bit_size = 128,
-	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
-	},
-	{ /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 95,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 245,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 3,
-	.ident_nums = 0,
+	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 5, stingray, table: int_full_act_record_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION,
-	.direction = TF_DIR_TX,
-	.result_start_idx = 258,
+	.result_start_idx = 248,
 	.result_bit_size = 128,
 	.result_num_fields = 26,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
-	.tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR
+	.encap_num_fields = 0
 	},
-	{ /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */
+	{ /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.dtagged_ing0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
 	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
 	.pri_operand = 0,
-	.key_start_idx = 108,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+	.key_start_idx = 220,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
 	.key_num_fields = 13,
-	.result_start_idx = 284,
+	.result_start_idx = 274,
 	.result_bit_size = 64,
 	.result_num_fields = 13,
 	.encap_num_fields = 0,
-	.ident_start_idx = 3,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 6, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 121,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 297,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 4,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 6, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 1,
-	.key_start_idx = 124,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 298,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 5,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 6, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 167,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 306,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 5,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 6, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 178,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 315,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 5,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+	.ident_start_idx = 13,
+	.ident_nums = 0
 	},
-	{ /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */
+	{ /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.stagged_ing0 */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
 	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
 	.pri_operand = 0,
-	.key_start_idx = 189,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
+	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+	.key_start_idx = 233,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
 	.key_num_fields = 13,
-	.result_start_idx = 324,
+	.result_start_idx = 287,
 	.result_bit_size = 64,
 	.result_num_fields = 13,
 	.encap_num_fields = 0,
-	.ident_start_idx = 5,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 7, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 202,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 337,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 6,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 7, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 1,
-	.key_start_idx = 205,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 338,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 7,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 7, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 248,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 346,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 7,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 7, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 259,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 355,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 7,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 270,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 364,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 7,
-	.ident_nums = 1
+	.ident_start_idx = 13,
+	.ident_nums = 0
 	},
-	{ /* class_tid: 8, stingray, table: l2_cntxt_tcam_0 */
+	{ /* class_tid: 6, stingray, table: l2_cntxt_tcam.egr */
 	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
+	.direction = TF_DIR_TX,
+	.execute_info = {
+		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+		.cond_start_idx = 10,
+		.cond_nums = 0 },
+	.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+	.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+	.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+	.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+	.fdb_operand = BNXT_ULP_RF_IDX_RID,
+	.pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
 	.pri_operand = 0,
-	.key_start_idx = 271,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
+	.key_start_idx = 246,
+	.blob_key_bit_size = 167,
+	.key_bit_size = 167,
 	.key_num_fields = 13,
-	.result_start_idx = 365,
+	.result_start_idx = 300,
 	.result_bit_size = 64,
 	.result_num_fields = 13,
 	.encap_num_fields = 0,
-	.ident_start_idx = 8,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 8, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 284,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 378,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 8,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 8, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 287,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 379,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 9,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 8, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 330,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 387,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 9,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 8, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 341,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 396,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 9,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 352,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 405,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 9,
+	.ident_start_idx = 13,
 	.ident_nums = 1
 	},
-	{ /* class_tid: 9, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 353,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 406,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 10,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 9, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 366,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 419,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 10,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 9, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 369,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 420,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 11,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 9, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 412,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 428,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 11,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 9, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 423,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 437,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 11,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 434,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 446,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 11,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 10, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 435,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 447,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 12,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 10, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 448,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 460,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 12,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 10, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 451,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 461,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 13,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 10, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 494,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 469,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 13,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 10, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 505,
-	.blob_key_bit_size = 392,
-	.key_bit_size = 392,
-	.key_num_fields = 11,
-	.result_start_idx = 478,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 13,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 516,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 487,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 13,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 11, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 517,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 488,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 14,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 11, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 530,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 501,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 14,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 11, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 533,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 502,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 15,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 11, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 576,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 510,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 15,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 11, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 587,
-	.blob_key_bit_size = 392,
-	.key_bit_size = 392,
-	.key_num_fields = 11,
-	.result_start_idx = 519,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 15,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 598,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 528,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 15,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 12, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 611,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 541,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 16,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 12, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 614,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 542,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 17,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 12, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 657,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 550,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 17,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 12, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 668,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 559,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 17,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 679,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 568,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 17,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 13, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 692,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 581,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 18,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 13, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 695,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 582,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 19,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 13, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 738,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 590,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 19,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 13, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 749,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 599,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 19,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 760,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 608,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 19,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 14, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 773,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 621,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 20,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 14, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 776,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 622,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 21,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 14, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 819,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 630,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 21,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 14, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 830,
-	.blob_key_bit_size = 392,
-	.key_bit_size = 392,
-	.key_num_fields = 11,
-	.result_start_idx = 639,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 21,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 841,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 648,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 21,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 15, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 854,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 661,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 22,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 15, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 857,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 662,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 23,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 15, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 900,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 670,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 23,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 15, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 911,
-	.blob_key_bit_size = 392,
-	.key_bit_size = 392,
-	.key_num_fields = 11,
-	.result_start_idx = 679,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 23,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 922,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 688,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 23,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 16, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 935,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 701,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 24,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 16, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 938,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 702,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 25,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 16, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 981,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 710,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 25,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 16, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 992,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 719,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 25,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1003,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 728,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 25,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 17, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 1016,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 741,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 26,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 17, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1019,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 742,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 27,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 17, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 1062,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 750,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 27,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 17, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 1073,
-	.blob_key_bit_size = 392,
-	.key_bit_size = 392,
-	.key_num_fields = 11,
-	.result_start_idx = 759,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 27,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 18, stingray, table: int_flow_counter_tbl_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC,
-	.cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET,
-	.cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
-	.direction = TF_DIR_RX,
-	.result_start_idx = 768,
-	.result_bit_size = 64,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
-	.tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
-	},
-	{ /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1084,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 769,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 27,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 18, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 1097,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 782,
-	.result_bit_size = 20,
-	.result_num_fields = 2,
-	.encap_num_fields = 0,
-	.ident_start_idx = 28,
-	.ident_nums = 2
-	},
-	{ /* class_tid: 18, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1100,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 784,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 30,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 18, stingray, table: wm_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_WC_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1143,
-	.blob_key_bit_size = 192,
-	.key_bit_size = 160,
-	.key_num_fields = 5,
-	.result_start_idx = 792,
-	.result_bit_size = 19,
-	.result_num_fields = 3,
-	.encap_num_fields = 0,
-	.ident_start_idx = 30,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1148,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 795,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 30,
-	.ident_nums = 1,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 19, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 1161,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 808,
-	.result_bit_size = 20,
-	.result_num_fields = 2,
-	.encap_num_fields = 0,
-	.ident_start_idx = 31,
-	.ident_nums = 2
-	},
-	{ /* class_tid: 19, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_RX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1164,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 810,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 33,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 19, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 1207,
-	.blob_key_bit_size = 112,
-	.key_bit_size = 112,
-	.key_num_fields = 8,
-	.result_start_idx = 818,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 33,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 19, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_RX,
-	.key_start_idx = 1215,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 8,
-	.result_start_idx = 827,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 33,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 1223,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 836,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 33,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 20, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1224,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 837,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 34,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 20, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 1237,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 850,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 34,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 20, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1240,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 851,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 35,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 20, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 1283,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 859,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 35,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 20, stingray, table: int_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
-	.resource_type = TF_MEM_INTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 1294,
-	.blob_key_bit_size = 200,
-	.key_bit_size = 200,
-	.key_num_fields = 11,
-	.result_start_idx = 868,
-	.result_bit_size = 64,
-	.result_num_fields = 9,
-	.encap_num_fields = 0,
-	.ident_start_idx = 35,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
-	},
-	{ /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 1305,
-	.blob_key_bit_size = 12,
-	.key_bit_size = 12,
-	.key_num_fields = 1,
-	.result_start_idx = 877,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 35,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 21, stingray, table: l2_cntxt_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1306,
-	.blob_key_bit_size = 171,
-	.key_bit_size = 171,
-	.key_num_fields = 13,
-	.result_start_idx = 878,
-	.result_bit_size = 64,
-	.result_num_fields = 13,
-	.encap_num_fields = 0,
-	.ident_start_idx = 36,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 21, stingray, table: profile_tcam_cache_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.resource_sub_type =
-		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 1319,
-	.blob_key_bit_size = 16,
-	.key_bit_size = 16,
-	.key_num_fields = 3,
-	.result_start_idx = 891,
-	.result_bit_size = 10,
-	.result_num_fields = 1,
-	.encap_num_fields = 0,
-	.ident_start_idx = 36,
-	.ident_nums = 1
-	},
-	{ /* class_tid: 21, stingray, table: profile_tcam_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-	.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
-	.direction = TF_DIR_TX,
-	.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
-	.pri_operand = 0,
-	.key_start_idx = 1322,
-	.blob_key_bit_size = 81,
-	.key_bit_size = 81,
-	.key_num_fields = 43,
-	.result_start_idx = 892,
-	.result_bit_size = 38,
-	.result_num_fields = 8,
-	.encap_num_fields = 0,
-	.ident_start_idx = 37,
-	.ident_nums = 0,
-	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-	.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
-	},
-	{ /* class_tid: 21, stingray, table: ext_em_0 */
-	.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
-	.resource_type = TF_MEM_EXTERNAL,
-	.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
-	.direction = TF_DIR_TX,
-	.key_start_idx = 1365,
-	.blob_key_bit_size = 448,
-	.key_bit_size = 448,
-	.key_num_fields = 11,
-	.result_start_idx = 900,
-	.result_bit_size = 64,
-	.result_num_