From patchwork Mon May 31 21:41:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 93643 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6D3E9A0524; Mon, 31 May 2021 23:42:22 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DB453410F2; Mon, 31 May 2021 23:42:08 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 29EF9410F2 for ; Mon, 31 May 2021 23:42:07 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 14VLeEPu025923; Mon, 31 May 2021 14:42:04 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=/dsNVBeplkUkGGLvkxiQKCw6ZuhSqThxOF4wZcVgDhs=; b=WQEWtmiq8qZxPYRFL44kfbM86Sr96AFFsaLQdiPnw2B/eWHEq5QTXg+XkqIS35ADaN49 HSvcuuXKntCBUqoLmrZ4P2oZb3hE8Rc1VmS/jH/n1Td78YPR5NCH7lLUR93Kg1BYAs43 4+JOn79Ip4+tfgyIYl0Frn/pc9JSXrAlwUYgS6clxQ9M3W1y/FYavef5I115iOY42xoa PhMUskcPAjvs0tLD+e4/MSHBtjYWEci1dlK/MwU24DYviBEwxOeUov9kvbqozk38N4eH 77SvGukle4W2skgmy62UDIe7fecNVp7XajAQxSAFWzhtYvwQvd109vsyfxMGLblyBVJi EQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 38vjqj3381-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 31 May 2021 14:42:03 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 May 2021 14:42:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 31 May 2021 14:42:02 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id 09EA03F703F; Mon, 31 May 2021 14:41:59 -0700 (PDT) From: Tomasz Duszynski To: CC: , , Tomasz Duszynski , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao , Ray Kinsella , Neil Horman Date: Mon, 31 May 2021 23:41:18 +0200 Message-ID: <20210531214142.30167-5-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210531214142.30167-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: WRhLPkf_buRx4vY-3H9FW3oBbBllBYFr X-Proofpoint-ORIG-GUID: WRhLPkf_buRx4vY-3H9FW3oBbBllBYFr X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-31_15:2021-05-31, 2021-05-31 signatures=0 Subject: [dpdk-dev] [PATCH 04/28] common/cnxk: add support for changing internal loopback X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for enabling or disabling internal loopback. Signed-off-by: Tomasz Duszynski Signed-off-by: Jakub Palider --- drivers/common/cnxk/roc_bphy_cgx.c | 30 +++++++++++++++++++++++++ drivers/common/cnxk/roc_bphy_cgx.h | 4 ++++ drivers/common/cnxk/roc_bphy_cgx_priv.h | 4 ++++ drivers/common/cnxk/version.map | 2 ++ 4 files changed, 40 insertions(+) diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c index c7ba53ede..45088d5d4 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.c +++ b/drivers/common/cnxk/roc_bphy_cgx.c @@ -213,6 +213,24 @@ roc_bphy_cgx_lmac_exists(struct roc_bphy_cgx *roc_cgx, unsigned int lmac) (roc_cgx->lmac_bmap & BIT_ULL(lmac)); } +static int +roc_bphy_cgx_intlbk_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, + bool enable) +{ + uint64_t scr1, scr0; + + if (!roc_cgx) + return -EINVAL; + + if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac)) + return -EINVAL; + + scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_INTERNAL_LBK) | + FIELD_PREP(SCR1_ETH_CTL_ARGS_ENABLE, enable); + + return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0); +} + int roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, struct roc_bphy_cgx_link_info *info) @@ -243,3 +261,15 @@ roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, return 0; } + +int +roc_bphy_cgx_intlbk_enable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac) +{ + return roc_bphy_cgx_intlbk_ena_dis(roc_cgx, lmac, true); +} + +int +roc_bphy_cgx_intlbk_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac) +{ + return roc_bphy_cgx_intlbk_ena_dis(roc_cgx, lmac, false); +} diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h index bb1d903eb..3bb9d49ed 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.h +++ b/drivers/common/cnxk/roc_bphy_cgx.h @@ -90,5 +90,9 @@ __roc_api int roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx); __roc_api int roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, struct roc_bphy_cgx_link_info *info); +__roc_api int roc_bphy_cgx_intlbk_enable(struct roc_bphy_cgx *roc_cgx, + unsigned int lmac); +__roc_api int roc_bphy_cgx_intlbk_disable(struct roc_bphy_cgx *roc_cgx, + unsigned int lmac); #endif /* _ROC_BPHY_CGX_H_ */ diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h index c0550ae87..cb59cac09 100644 --- a/drivers/common/cnxk/roc_bphy_cgx_priv.h +++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h @@ -8,6 +8,7 @@ /* REQUEST ID types. Input to firmware */ enum eth_cmd_id { ETH_CMD_GET_LINK_STS = 4, + ETH_CMD_INTERNAL_LBK = 7, ETH_CMD_INTF_SHUTDOWN = 12, }; @@ -58,6 +59,9 @@ enum eth_cmd_own { /* struct eth_cmd */ #define SCR1_ETH_CMD_ID GENMASK_ULL(7, 2) +/* struct eth_ctl_args */ +#define SCR1_ETH_CTL_ARGS_ENABLE BIT_ULL(8) + #define SCR1_OWN_STATUS GENMASK_ULL(1, 0) #endif /* _ROC_BPHY_CGX_PRIV_H_ */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 466207f9d..71437a6c5 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -12,6 +12,8 @@ INTERNAL { roc_bphy_cgx_dev_fini; roc_bphy_cgx_dev_init; roc_bphy_cgx_get_linkinfo; + roc_bphy_cgx_intlbk_disable; + roc_bphy_cgx_intlbk_enable; roc_clk_freq_get; roc_error_msg_get; roc_idev_lmt_base_addr_get;