From patchwork Mon May 31 14:10:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Kusztal X-Patchwork-Id: 93632 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7CF77A0524; Mon, 31 May 2021 16:12:00 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F365E41121; Mon, 31 May 2021 16:11:03 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 7F1E241103 for ; Mon, 31 May 2021 16:11:01 +0200 (CEST) IronPort-SDR: hvkvWac8ExrFIRdruBKKkD2qq3a2kVepkHFkjsTRmR8fE3Bb2TCt7lNUkYeNLSGXf9rQ4fXqQ5 KcHEsxPmmqHg== X-IronPort-AV: E=McAfee;i="6200,9189,10001"; a="201492237" X-IronPort-AV: E=Sophos;i="5.83,237,1616482800"; d="scan'208";a="201492237" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 May 2021 07:11:01 -0700 IronPort-SDR: aZKIb9nPwCyn5jHQehqKequwYUc7E2uco8pu94RRiS7bFgktg/A6L+fMEPnoaB5b2HwTZIBMNc W2k0AUjqAxug== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,237,1616482800"; d="scan'208";a="548760165" Received: from silpixa00400308.ir.intel.com ([10.237.214.61]) by orsmga004.jf.intel.com with ESMTP; 31 May 2021 07:10:59 -0700 From: Arek Kusztal To: dev@dpdk.org Cc: gakhil@marvell.com, fiona.trahe@intel.com, roy.fan.zhang@intel.com, Arek Kusztal Date: Mon, 31 May 2021 15:10:21 +0100 Message-Id: <20210531141027.13289-10-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210531141027.13289-1-arkadiuszx.kusztal@intel.com> References: <20210531141027.13289-1-arkadiuszx.kusztal@intel.com> Subject: [dpdk-dev] [PATCH 09/15] crypto/qat: add chacha-poly in ucs spc mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This commit adds Chacha20-Poly1305 aglorithm that works in UCS (Unified crypto slice) SPC(Single-Pass) mode. Signed-off-by: Arek Kusztal --- drivers/crypto/qat/qat_sym_capabilities.h | 32 ++++++++++++++++++++++- drivers/crypto/qat/qat_sym_session.c | 2 ++ 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/qat/qat_sym_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h index fc8e667687..5c6e723466 100644 --- a/drivers/crypto/qat/qat_sym_capabilities.h +++ b/drivers/crypto/qat/qat_sym_capabilities.h @@ -1144,7 +1144,37 @@ }, \ }, } \ }, } \ - } \ + }, \ + { /* Chacha20-Poly1305 */ \ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, \ + {.sym = { \ + .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD, \ + {.aead = { \ + .algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305, \ + .block_size = 64, \ + .key_size = { \ + .min = 32, \ + .max = 32, \ + .increment = 0 \ + }, \ + .digest_size = { \ + .min = 16, \ + .max = 16, \ + .increment = 0 \ + }, \ + .aad_size = { \ + .min = 0, \ + .max = 240, \ + .increment = 1 \ + }, \ + .iv_size = { \ + .min = 12, \ + .max = 12, \ + .increment = 0 \ + }, \ + }, } \ + }, } \ + } diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c index 7d66ca5172..221b950aeb 100644 --- a/drivers/crypto/qat/qat_sym_session.c +++ b/drivers/crypto/qat/qat_sym_session.c @@ -921,6 +921,8 @@ qat_sym_session_configure_aead(struct rte_cryptodev *dev, case RTE_CRYPTO_AEAD_CHACHA20_POLY1305: if (aead_xform->key.length != ICP_QAT_HW_CHACHAPOLY_KEY_SZ) return -EINVAL; + if (qat_dev_gen == QAT_GEN4) + session->is_ucs = 1; session->qat_cipher_alg = ICP_QAT_HW_CIPHER_ALGO_CHACHA20_POLY1305; qat_sym_session_handle_single_pass(session,