diff mbox series

[39/58] net/bnxt: refactor TF ULP

Message ID 20210530085929.29695-40-venkatkumar.duvvuru@broadcom.com (mailing list archive)
State Superseded, archived
Delegated to: Ajit Khaparde
Headers
Series enhancements to host based flow table management |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Venkat Duvvuru May 30, 2021, 8:59 a.m. UTC 
  From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>

1. The flow database opcode is updated to split the alloc push resource
item so it can be controlled using the control table.

2. The class and action match signatures are populated with pattern ids
that are matched against template pattern id to reject any unsupported
class and action combinations.

3. The flow DB opcode should be no op when accessing the
global registry identifiers.

4. The resource function for branch is changed to control so that it
is extended to perform flow database operations and not just branch
operations.

5. The conditional goto processing now supports negative numbers to
support looping of the mapper tables to support flow ranges and
also enable conditional fail goto to support failure path mapper
tables.

6. The field mapper opcode is updated to add all ones to fields
that support exact match.

7. Added key info and identifier list to whitney action templates
The whitney plus templates are updated to use the mapper infrastructure
changes.

8. The partition interface table configuration of the default
egress rule for the representor interface needs to use the
reserved parif interface that is specific to each
platform. The pipeline for the representor interface is broken
since incorrect parif configuration cause the miss path packets to
be dropped.

9. In the mapper table processing, if a failure condition is hit
due to invalid memory type then use the conditional goto failure
configuration instead of jumping to next table. This causes ipv6
exact match entry to be skipped. This patch fixes that issue.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <shahaji.bhosle@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Michael Baucom <michael.baucom@broadcom.com>
---
 drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c       |    32 +-
 drivers/net/bnxt/tf_ulp/ulp_def_rules.c       |     3 +
 drivers/net/bnxt/tf_ulp/ulp_flow_db.c         |    55 +-
 drivers/net/bnxt/tf_ulp/ulp_mapper.c          |   101 +-
 drivers/net/bnxt/tf_ulp/ulp_mapper.h          |     7 +
 drivers/net/bnxt/tf_ulp/ulp_matcher.c         |     2 +
 drivers/net/bnxt/tf_ulp/ulp_template_db_act.c |   644 +-
 .../net/bnxt/tf_ulp/ulp_template_db_class.c   | 80798 +++++++++++++++-
 .../net/bnxt/tf_ulp/ulp_template_db_enum.h    |  4140 +-
 .../net/bnxt/tf_ulp/ulp_template_db_field.h   |   558 +-
 .../tf_ulp/ulp_template_db_stingray_act.c     |    16 +-
 .../tf_ulp/ulp_template_db_stingray_class.c   |   154 +-
 drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c |   512 +-
 drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h |     4 +
 .../bnxt/tf_ulp/ulp_template_db_wh_plus_act.c |  4470 +-
 .../tf_ulp/ulp_template_db_wh_plus_class.c    | 13072 ++-
 drivers/net/bnxt/tf_ulp/ulp_template_struct.h |     7 +-
 17 files changed, 98371 insertions(+), 6204 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
index 1655b0f29a..0af2f6aaa6 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
@@ -79,21 +79,23 @@  bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,
 			    struct ulp_rte_parser_params *params,
 			    enum bnxt_ulp_fdb_type flow_type)
 {
-	mapper_cparms->flow_type	= flow_type;
-	mapper_cparms->app_priority	= params->priority;
-	mapper_cparms->dir_attr		= params->dir_attr;
-	mapper_cparms->class_tid	= params->class_id;
-	mapper_cparms->act_tid		= params->act_tmpl;
-	mapper_cparms->func_id		= params->func_id;
-	mapper_cparms->hdr_bitmap	= &params->hdr_bitmap;
-	mapper_cparms->hdr_field	= params->hdr_field;
-	mapper_cparms->comp_fld		= params->comp_fld;
-	mapper_cparms->act		= &params->act_bitmap;
-	mapper_cparms->act_prop		= &params->act_prop;
-	mapper_cparms->flow_id		= params->fid;
-	mapper_cparms->parent_flow	= params->parent_flow;
-	mapper_cparms->parent_fid	= params->parent_fid;
-	mapper_cparms->fld_bitmap	= &params->fld_bitmap;
+	mapper_cparms->flow_type = flow_type;
+	mapper_cparms->app_priority = params->priority;
+	mapper_cparms->dir_attr = params->dir_attr;
+	mapper_cparms->class_tid = params->class_id;
+	mapper_cparms->act_tid = params->act_tmpl;
+	mapper_cparms->func_id = params->func_id;
+	mapper_cparms->hdr_bitmap = &params->hdr_bitmap;
+	mapper_cparms->hdr_field = params->hdr_field;
+	mapper_cparms->comp_fld = params->comp_fld;
+	mapper_cparms->act = &params->act_bitmap;
+	mapper_cparms->act_prop = &params->act_prop;
+	mapper_cparms->flow_id = params->fid;
+	mapper_cparms->parent_flow = params->parent_flow;
+	mapper_cparms->parent_fid = params->parent_fid;
+	mapper_cparms->fld_bitmap = &params->fld_bitmap;
+	mapper_cparms->flow_pattern_id = params->flow_pattern_id;
+	mapper_cparms->act_pattern_id = params->act_pattern_id;
 
 	/* update the signature fields into the computed field list */
 	ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_HDR_SIG_ID,
diff --git a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c
index 6d6c22b157..ce8bfdc61f 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c
@@ -360,6 +360,9 @@  ulp_default_flow_create(struct rte_eth_dev *eth_dev,
 		goto err1;
 	}
 
+	BNXT_TF_DBG(DEBUG, "Creating default flow with template id: %u\n",
+		    ulp_class_tid);
+
 	/* Protect flow creation */
 	if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
 		BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
diff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c
index 96398d8a01..1326f79ff5 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c
@@ -1,5 +1,5 @@ 
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2020 Broadcom
+ * Copyright(c) 2014-2021 Broadcom
  * All rights reserved.
  */
 
@@ -48,21 +48,17 @@  ulp_flow_db_active_flows_bit_set(struct bnxt_ulp_flow_db *flow_db,
 	uint32_t a_idx = idx / ULP_INDEX_BITMAP_SIZE;
 
 	if (flag) {
-		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR || flow_type ==
-		    BNXT_ULP_FDB_TYPE_RID)
+		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
 			ULP_INDEX_BITMAP_SET(f_tbl->active_reg_flows[a_idx],
 					     idx);
-		if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT || flow_type ==
-		    BNXT_ULP_FDB_TYPE_RID)
+		else
 			ULP_INDEX_BITMAP_SET(f_tbl->active_dflt_flows[a_idx],
 					     idx);
 	} else {
-		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR || flow_type ==
-		    BNXT_ULP_FDB_TYPE_RID)
+		if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
 			ULP_INDEX_BITMAP_RESET(f_tbl->active_reg_flows[a_idx],
 					       idx);
-		if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT || flow_type ==
-		    BNXT_ULP_FDB_TYPE_RID)
+		else
 			ULP_INDEX_BITMAP_RESET(f_tbl->active_dflt_flows[a_idx],
 					       idx);
 	}
@@ -89,15 +85,9 @@  ulp_flow_db_active_flows_bit_is_set(struct bnxt_ulp_flow_db *flow_db,
 	if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
 		return ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx],
 					    idx);
-	else if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT)
+	else
 		return ULP_INDEX_BITMAP_GET(f_tbl->active_dflt_flows[a_idx],
 					    idx);
-	else if (flow_type == BNXT_ULP_FDB_TYPE_RID)
-		return (ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx],
-					     idx) &&
-			ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx],
-					     idx));
-	return 0;
 }
 
 static inline enum tf_dir
@@ -223,7 +213,7 @@  ulp_flow_db_alloc_resource(struct bnxt_ulp_flow_db *flow_db)
 		return -ENOMEM;
 	}
 	size = (flow_tbl->num_flows / sizeof(uint64_t)) + 1;
-	size = ULP_BYTE_ROUND_OFF_8(size);
+	size =  ULP_BYTE_ROUND_OFF_8(size);
 	flow_tbl->active_reg_flows = rte_zmalloc("active reg flows", size,
 						 ULP_BUFFER_ALIGN_64_BYTE);
 	if (!flow_tbl->active_reg_flows) {
@@ -627,7 +617,7 @@  ulp_flow_db_fid_alloc(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
+	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -684,7 +674,7 @@  ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
+	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -698,7 +688,7 @@  ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,
 
 	/* check if the flow is active or not */
 	if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) {
-		BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid);
+		BNXT_TF_DBG(ERR, "flow does not exist\n");
 		return -EINVAL;
 	}
 
@@ -779,7 +769,7 @@  ulp_flow_db_resource_del(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
+	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -793,7 +783,7 @@  ulp_flow_db_resource_del(struct bnxt_ulp_context *ulp_ctxt,
 
 	/* check if the flow is active or not */
 	if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) {
-		BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid);
+		BNXT_TF_DBG(ERR, "flow does not exist\n");
 		return -EINVAL;
 	}
 
@@ -887,7 +877,7 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
+	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -902,7 +892,7 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 
 	/* check if the flow is active or not */
 	if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) {
-		BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid);
+		BNXT_TF_DBG(ERR, "flow does not exist\n");
 		return -EINVAL;
 	}
 	flow_tbl->head_index--;
@@ -910,7 +900,6 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 		BNXT_TF_DBG(ERR, "FlowDB: Head Ptr is zero\n");
 		return -ENOENT;
 	}
-
 	flow_tbl->flow_tbl_stack[flow_tbl->head_index] = fid;
 
 	/* Clear the flows bitmap */
@@ -924,7 +913,7 @@  ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt,
 }
 
 /*
- *Get the flow database entry details
+ * Get the flow database entry details
  *
  * ulp_ctxt [in] Ptr to ulp_context
  * flow_type [in] - specify default or regular
@@ -951,7 +940,7 @@  ulp_flow_db_resource_get(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
+	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -1007,14 +996,10 @@  ulp_flow_db_next_entry_get(struct bnxt_ulp_flow_db *flow_db,
 	uint64_t *active_flows;
 	struct bnxt_ulp_flow_tbl *flowtbl = &flow_db->flow_tbl;
 
-	if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) {
+	if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR)
 		active_flows = flowtbl->active_reg_flows;
-	} else if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT) {
+	else
 		active_flows = flowtbl->active_dflt_flows;
-	} else {
-		BNXT_TF_DBG(ERR, "Invalid flow type %x\n", flow_type);
-			return -EINVAL;
-	}
 
 	do {
 		/* increment the flow id to find the next valid flow id */
@@ -1207,7 +1192,7 @@  ulp_flow_db_resource_params_get(struct bnxt_ulp_context *ulp_ctx,
 		return -EINVAL;
 	}
 
-	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
+	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
@@ -1609,7 +1594,7 @@  ulp_flow_db_child_flow_reset(struct bnxt_ulp_context *ulp_ctxt,
 		return -EINVAL;
 	}
 
-	if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) {
+	if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) {
 		BNXT_TF_DBG(ERR, "Invalid flow type\n");
 		return -EINVAL;
 	}
diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
index 377a78c7e2..c2e36823bf 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
@@ -19,6 +19,11 @@ 
 #include "tf_util.h"
 #include "ulp_template_db_tbl.h"
 
+static uint8_t mapper_fld_ones[16] = {
+	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
+};
+
 static const char *
 ulp_mapper_tmpl_name_str(enum bnxt_ulp_template_type tmpl_type)
 {
@@ -591,12 +596,11 @@  ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms,
 	int32_t rc = 0;
 
 	switch (tbl->fdb_opcode) {
-	case BNXT_ULP_FDB_OPC_PUSH:
+	case BNXT_ULP_FDB_OPC_PUSH_FID:
 		push_fid = parms->fid;
 		flow_type = parms->flow_type;
 		break;
-	case BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE:
-	case BNXT_ULP_FDB_OPC_PUSH_REGFILE:
+	case BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE:
 		/* get the fid from the regfile */
 		rc = ulp_regfile_read(parms->regfile, tbl->fdb_operand,
 				      &val64);
@@ -1049,6 +1053,13 @@  ulp_mapper_field_process(struct bnxt_ulp_mapper_parms *parms,
 			return -EINVAL;
 		}
 		break;
+	case BNXT_ULP_FIELD_SRC_ONES:
+		val = mapper_fld_ones;
+		if (!ulp_blob_push(blob, val, bitlen)) {
+			BNXT_TF_DBG(ERR, "%s too large for blob\n", name);
+			return -EINVAL;
+		}
+		break;
 	case BNXT_ULP_FIELD_SRC_CF:
 		if (!ulp_operand_read(fld_src_oper,
 				      (uint8_t *)&idx, sizeof(uint16_t))) {
@@ -2076,6 +2087,10 @@  ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 		write = true;
 		break;
 	case BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE:
+		if (tbl->fdb_opcode != BNXT_ULP_FDB_OPC_NOP) {
+			BNXT_TF_DBG(ERR, "Template error, wrong fdb opcode\n");
+			return -EINVAL;
+		}
 		/*
 		 * get the index to write to from the global regfile and then
 		 * write the table.
@@ -2470,8 +2485,10 @@  ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 					    "Failed to scan ident list\n");
 				return -EINVAL;
 			}
-			/* increment the reference count */
-			ULP_GEN_TBL_REF_CNT_INC(&gen_tbl_ent);
+			if (tbl->fdb_opcode != BNXT_ULP_FDB_OPC_NOP) {
+				/* increment the reference count */
+				ULP_GEN_TBL_REF_CNT_INC(&gen_tbl_ent);
+			}
 
 			/* it is a hit */
 			gen_tbl_hit = 1;
@@ -2545,6 +2562,23 @@  ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 	return rc;
 }
 
+static int32_t
+ulp_mapper_ctrl_tbl_process(struct bnxt_ulp_mapper_parms *parms,
+			    struct bnxt_ulp_mapper_tbl_info *tbl)
+{
+	int32_t rc = 0;
+
+	/* process the fdb opcode for alloc push */
+	if (tbl->fdb_opcode == BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE) {
+		rc = ulp_mapper_fdb_opc_alloc_rid(parms, tbl);
+		if (rc) {
+			BNXT_TF_DBG(ERR, "Failed to do fdb alloc\n");
+			return rc;
+		}
+	}
+	return rc;
+}
+
 static int32_t
 ulp_mapper_glb_resource_info_init(struct bnxt_ulp_context *ulp_ctx,
 				  struct bnxt_ulp_mapper_data *mapper_data)
@@ -2598,7 +2632,10 @@  ulp_mapper_tbl_memtype_opcode_process(struct bnxt_ulp_mapper_parms *parms,
 	enum bnxt_ulp_flow_mem_type mtype = BNXT_ULP_FLOW_MEM_TYPE_INT;
 	int32_t rc = 1;
 
-	bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype);
+	if (bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype)) {
+		BNXT_TF_DBG(ERR, "Failed to get the mem type\n");
+		return rc;
+	}
 
 	switch (tbl->mem_type_opcode) {
 	case BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT:
@@ -2725,6 +2762,20 @@  ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms,
 		}
 		*res = regval == 0;
 		break;
+	case BNXT_ULP_COND_OPC_FLOW_PAT_MATCH:
+		if (parms->flow_pattern_id == operand) {
+			BNXT_TF_DBG(ERR, "field pattern match failed %x\n",
+				    parms->flow_pattern_id);
+			return -EINVAL;
+		}
+		break;
+	case BNXT_ULP_COND_OPC_ACT_PAT_MATCH:
+		if (parms->act_pattern_id == operand) {
+			BNXT_TF_DBG(ERR, "act pattern match failed %x\n",
+				    parms->act_pattern_id);
+			return -EINVAL;
+		}
+		break;
 	default:
 		BNXT_TF_DBG(ERR, "Invalid conditional opcode %d\n", opc);
 		rc = -EINVAL;
@@ -2748,7 +2799,7 @@  ulp_mapper_cond_opc_list_process(struct bnxt_ulp_mapper_parms *parms,
 				 int32_t *res)
 {
 	uint32_t i;
-	int32_t rc = 0, trc;
+	int32_t rc = 0, trc = 0;
 
 	switch (list_opc) {
 	case BNXT_ULP_COND_LIST_OPC_AND:
@@ -2870,7 +2921,7 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 	struct bnxt_ulp_mapper_tbl_info *tbl;
 	uint32_t num_tbls, tbl_idx, num_cond_tbls;
 	int32_t rc = -EINVAL, cond_rc = 0;
-	uint32_t cond_goto = 1;
+	int32_t cond_goto = 1;
 
 	cond_tbls = ulp_mapper_tmpl_reject_list_get(parms, tid,
 						    &num_cond_tbls,
@@ -2907,11 +2958,10 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 
 	for (tbl_idx = 0; tbl_idx < num_tbls && cond_goto;) {
 		tbl = &tbls[tbl_idx];
-		cond_goto = tbl->execute_info.cond_goto;
 		/* Handle the table level opcodes to determine if required. */
 		if (ulp_mapper_tbl_memtype_opcode_process(parms, tbl)) {
-			tbl_idx += 1;
-			continue;
+			cond_goto = tbl->execute_info.cond_false_goto;
+			goto next_iteration;
 		}
 
 		cond_tbls = ulp_mapper_tbl_execute_list_get(parms, tbl,
@@ -2927,17 +2977,8 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 		}
 		/* Skip the table if False */
 		if (!cond_rc) {
-			tbl_idx += 1;
-			continue;
-		}
-
-		/* process the fdb opcode for alloc push */
-		if (tbl->fdb_opcode == BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE) {
-			rc = ulp_mapper_fdb_opc_alloc_rid(parms, tbl);
-			if (rc) {
-				BNXT_TF_DBG(ERR, "Failed to do fdb alloc\n");
-				return rc;
-			}
+			cond_goto = tbl->execute_info.cond_false_goto;
+			goto next_iteration;
 		}
 
 		switch (tbl->resource_func) {
@@ -2957,8 +2998,10 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 		case BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE:
 			rc = ulp_mapper_gen_tbl_process(parms, tbl);
 			break;
+		case BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE:
+			rc = ulp_mapper_ctrl_tbl_process(parms, tbl);
+			break;
 		case BNXT_ULP_RESOURCE_FUNC_INVALID:
-		case BNXT_ULP_RESOURCE_FUNC_BRANCH_TABLE:
 			rc = 0;
 			break;
 		default:
@@ -2982,6 +3025,12 @@  ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid)
 			rc = -EINVAL;
 			goto error;
 		}
+next_iteration:
+		if (cond_goto < 0 && ((int32_t)tbl_idx + cond_goto) < 0) {
+			BNXT_TF_DBG(ERR, "invalid conditional goto %d\n",
+				    cond_goto);
+			goto error;
+		}
 		tbl_idx += cond_goto;
 	}
 
@@ -3062,7 +3111,9 @@  ulp_mapper_resources_free(struct bnxt_ulp_context *ulp_ctx,
 	 * Set the critical resource on the first resource del, then iterate
 	 * while status is good
 	 */
-	res_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES;
+	if (flow_type != BNXT_ULP_FDB_TYPE_RID)
+		res_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES;
+
 	rc = ulp_flow_db_resource_del(ulp_ctx, flow_type, fid, &res_parms);
 
 	if (rc) {
@@ -3236,6 +3287,8 @@  ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
 	parms.fid = cparms->flow_id;
 	parms.tun_idx = cparms->tun_idx;
 	parms.app_priority = cparms->app_priority;
+	parms.flow_pattern_id = cparms->flow_pattern_id;
+	parms.act_pattern_id = cparms->act_pattern_id;
 
 	/* Get the device id from the ulp context */
 	if (bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &parms.dev_id)) {
diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h
index b7399b8949..8f0b894d39 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h
@@ -58,6 +58,8 @@  struct bnxt_ulp_mapper_parms {
 	uint8_t					tun_idx;
 	uint32_t				app_priority;
 	uint64_t				shared_hndl;
+	uint32_t				flow_pattern_id;
+	uint32_t				act_pattern_id;
 };
 
 struct bnxt_ulp_mapper_create_parms {
@@ -80,6 +82,11 @@  struct bnxt_ulp_mapper_create_parms {
 	/* if set then create a parent flow */
 	uint32_t			parent_flow;
 	uint8_t				tun_idx;
+
+	/* support pattern based rejection */
+	uint32_t			flow_pattern_id;
+	uint32_t			act_pattern_id;
+
 };
 
 /* Function to initialize any dynamic mapper data. */
diff --git a/drivers/net/bnxt/tf_ulp/ulp_matcher.c b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
index 6e2506cfa3..21eb97b7eb 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_matcher.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
@@ -79,6 +79,7 @@  ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,
 	*class_id = class_match->class_tid;
 	params->hdr_sig_id = class_match->hdr_sig_id;
 	params->flow_sig_id = class_match->flow_sig_id;
+	params->flow_pattern_id = class_match->flow_pattern_id;
 	return BNXT_TF_RC_SUCCESS;
 
 error:
@@ -115,6 +116,7 @@  ulp_matcher_action_match(struct ulp_rte_parser_params *params,
 		goto error;
 	}
 	*act_id = act_match->act_tid;
+	params->act_pattern_id = act_match->act_pattern_id;
 	BNXT_TF_DBG(DEBUG, "Found matching action template %u\n", *act_id);
 	return BNXT_TF_RC_SUCCESS;
 
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c
index 483005f2bc..8e482700e9 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c
@@ -3,7 +3,7 @@ 
  * All rights reserved.
  */
 
-/* date: Tue Dec  8 14:57:13 2020 */
+/* date: Thu Dec 17 19:43:07 2020 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
@@ -18,32 +18,88 @@  uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
 	[BNXT_ULP_ACT_HID_0000] = 1,
 	[BNXT_ULP_ACT_HID_0001] = 2,
 	[BNXT_ULP_ACT_HID_0400] = 3,
-	[BNXT_ULP_ACT_HID_0325] = 4,
+	[BNXT_ULP_ACT_HID_01ab] = 4,
 	[BNXT_ULP_ACT_HID_0010] = 5,
-	[BNXT_ULP_ACT_HID_0725] = 6,
-	[BNXT_ULP_ACT_HID_0335] = 7,
+	[BNXT_ULP_ACT_HID_05ab] = 6,
+	[BNXT_ULP_ACT_HID_01bb] = 7,
 	[BNXT_ULP_ACT_HID_0002] = 8,
 	[BNXT_ULP_ACT_HID_0003] = 9,
 	[BNXT_ULP_ACT_HID_0402] = 10,
-	[BNXT_ULP_ACT_HID_0327] = 11,
+	[BNXT_ULP_ACT_HID_01ad] = 11,
 	[BNXT_ULP_ACT_HID_0012] = 12,
-	[BNXT_ULP_ACT_HID_0727] = 13,
-	[BNXT_ULP_ACT_HID_0337] = 14,
-	[BNXT_ULP_ACT_HID_01de] = 15,
-	[BNXT_ULP_ACT_HID_00c6] = 16,
-	[BNXT_ULP_ACT_HID_0506] = 17,
-	[BNXT_ULP_ACT_HID_01ed] = 18,
-	[BNXT_ULP_ACT_HID_03ef] = 19,
-	[BNXT_ULP_ACT_HID_0516] = 20,
-	[BNXT_ULP_ACT_HID_01df] = 21,
-	[BNXT_ULP_ACT_HID_01e4] = 22,
-	[BNXT_ULP_ACT_HID_00cc] = 23,
-	[BNXT_ULP_ACT_HID_0504] = 24,
-	[BNXT_ULP_ACT_HID_01ef] = 25,
-	[BNXT_ULP_ACT_HID_03ed] = 26,
-	[BNXT_ULP_ACT_HID_0514] = 27,
-	[BNXT_ULP_ACT_HID_00db] = 28,
-	[BNXT_ULP_ACT_HID_00df] = 29
+	[BNXT_ULP_ACT_HID_05ad] = 13,
+	[BNXT_ULP_ACT_HID_01bd] = 14,
+	[BNXT_ULP_ACT_HID_0613] = 15,
+	[BNXT_ULP_ACT_HID_02a9] = 16,
+	[BNXT_ULP_ACT_HID_0054] = 17,
+	[BNXT_ULP_ACT_HID_0622] = 18,
+	[BNXT_ULP_ACT_HID_0454] = 19,
+	[BNXT_ULP_ACT_HID_0064] = 20,
+	[BNXT_ULP_ACT_HID_0614] = 21,
+	[BNXT_ULP_ACT_HID_0615] = 22,
+	[BNXT_ULP_ACT_HID_02ab] = 23,
+	[BNXT_ULP_ACT_HID_0056] = 24,
+	[BNXT_ULP_ACT_HID_0624] = 25,
+	[BNXT_ULP_ACT_HID_0456] = 26,
+	[BNXT_ULP_ACT_HID_0066] = 27,
+	[BNXT_ULP_ACT_HID_048d] = 28,
+	[BNXT_ULP_ACT_HID_048f] = 29,
+	[BNXT_ULP_ACT_HID_04bc] = 30,
+	[BNXT_ULP_ACT_HID_00a9] = 31,
+	[BNXT_ULP_ACT_HID_020f] = 32,
+	[BNXT_ULP_ACT_HID_04a9] = 33,
+	[BNXT_ULP_ACT_HID_01fc] = 34,
+	[BNXT_ULP_ACT_HID_04be] = 35,
+	[BNXT_ULP_ACT_HID_00ab] = 36,
+	[BNXT_ULP_ACT_HID_0211] = 37,
+	[BNXT_ULP_ACT_HID_04ab] = 38,
+	[BNXT_ULP_ACT_HID_01fe] = 39,
+	[BNXT_ULP_ACT_HID_0667] = 40,
+	[BNXT_ULP_ACT_HID_0254] = 41,
+	[BNXT_ULP_ACT_HID_03ba] = 42,
+	[BNXT_ULP_ACT_HID_0654] = 43,
+	[BNXT_ULP_ACT_HID_03a7] = 44,
+	[BNXT_ULP_ACT_HID_0669] = 45,
+	[BNXT_ULP_ACT_HID_0256] = 46,
+	[BNXT_ULP_ACT_HID_03bc] = 47,
+	[BNXT_ULP_ACT_HID_0656] = 48,
+	[BNXT_ULP_ACT_HID_03a9] = 49,
+	[BNXT_ULP_ACT_HID_021b] = 50,
+	[BNXT_ULP_ACT_HID_021c] = 51,
+	[BNXT_ULP_ACT_HID_021e] = 52,
+	[BNXT_ULP_ACT_HID_063f] = 53,
+	[BNXT_ULP_ACT_HID_0510] = 54,
+	[BNXT_ULP_ACT_HID_03c6] = 55,
+	[BNXT_ULP_ACT_HID_0082] = 56,
+	[BNXT_ULP_ACT_HID_06bb] = 57,
+	[BNXT_ULP_ACT_HID_021d] = 58,
+	[BNXT_ULP_ACT_HID_0641] = 59,
+	[BNXT_ULP_ACT_HID_0512] = 60,
+	[BNXT_ULP_ACT_HID_03c8] = 61,
+	[BNXT_ULP_ACT_HID_0084] = 62,
+	[BNXT_ULP_ACT_HID_06bd] = 63,
+	[BNXT_ULP_ACT_HID_06d7] = 64,
+	[BNXT_ULP_ACT_HID_02c4] = 65,
+	[BNXT_ULP_ACT_HID_042a] = 66,
+	[BNXT_ULP_ACT_HID_06c4] = 67,
+	[BNXT_ULP_ACT_HID_0417] = 68,
+	[BNXT_ULP_ACT_HID_06d9] = 69,
+	[BNXT_ULP_ACT_HID_02c6] = 70,
+	[BNXT_ULP_ACT_HID_042c] = 71,
+	[BNXT_ULP_ACT_HID_06c6] = 72,
+	[BNXT_ULP_ACT_HID_0419] = 73,
+	[BNXT_ULP_ACT_HID_0119] = 74,
+	[BNXT_ULP_ACT_HID_046f] = 75,
+	[BNXT_ULP_ACT_HID_05d5] = 76,
+	[BNXT_ULP_ACT_HID_0106] = 77,
+	[BNXT_ULP_ACT_HID_05c2] = 78,
+	[BNXT_ULP_ACT_HID_011b] = 79,
+	[BNXT_ULP_ACT_HID_0471] = 80,
+	[BNXT_ULP_ACT_HID_05d7] = 81,
+	[BNXT_ULP_ACT_HID_0108] = 82,
+	[BNXT_ULP_ACT_HID_05c4] = 83,
+	[BNXT_ULP_ACT_HID_00a2] = 84,
+	[BNXT_ULP_ACT_HID_00a4] = 85
 };
 
 /* Array for the act matcher list */
@@ -69,7 +125,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[4] = {
-	.act_hid = BNXT_ULP_ACT_HID_0325,
+	.act_hid = BNXT_ULP_ACT_HID_01ab,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_DEC_TTL |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
@@ -83,7 +139,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[6] = {
-	.act_hid = BNXT_ULP_ACT_HID_0725,
+	.act_hid = BNXT_ULP_ACT_HID_05ab,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_DEC_TTL |
 		BNXT_ULP_ACT_BIT_POP_VLAN |
@@ -91,7 +147,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[7] = {
-	.act_hid = BNXT_ULP_ACT_HID_0335,
+	.act_hid = BNXT_ULP_ACT_HID_01bb,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 		BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -122,7 +178,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[11] = {
-	.act_hid = BNXT_ULP_ACT_HID_0327,
+	.act_hid = BNXT_ULP_ACT_HID_01ad,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_COUNT |
 		BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -138,7 +194,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[13] = {
-	.act_hid = BNXT_ULP_ACT_HID_0727,
+	.act_hid = BNXT_ULP_ACT_HID_05ad,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_COUNT |
 		BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -147,7 +203,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[14] = {
-	.act_hid = BNXT_ULP_ACT_HID_0337,
+	.act_hid = BNXT_ULP_ACT_HID_01bd,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_COUNT |
 		BNXT_ULP_ACT_BIT_VXLAN_DECAP |
@@ -156,7 +212,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[15] = {
-	.act_hid = BNXT_ULP_ACT_HID_01de,
+	.act_hid = BNXT_ULP_ACT_HID_0613,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_DROP |
@@ -164,7 +220,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[16] = {
-	.act_hid = BNXT_ULP_ACT_HID_00c6,
+	.act_hid = BNXT_ULP_ACT_HID_02a9,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_POP_VLAN |
@@ -172,7 +228,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[17] = {
-	.act_hid = BNXT_ULP_ACT_HID_0506,
+	.act_hid = BNXT_ULP_ACT_HID_0054,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -180,7 +236,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[18] = {
-	.act_hid = BNXT_ULP_ACT_HID_01ed,
+	.act_hid = BNXT_ULP_ACT_HID_0622,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_VXLAN_DECAP |
@@ -188,7 +244,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[19] = {
-	.act_hid = BNXT_ULP_ACT_HID_03ef,
+	.act_hid = BNXT_ULP_ACT_HID_0454,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -197,7 +253,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[20] = {
-	.act_hid = BNXT_ULP_ACT_HID_0516,
+	.act_hid = BNXT_ULP_ACT_HID_0064,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_VXLAN_DECAP |
@@ -206,7 +262,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[21] = {
-	.act_hid = BNXT_ULP_ACT_HID_01df,
+	.act_hid = BNXT_ULP_ACT_HID_0614,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
@@ -214,7 +270,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[22] = {
-	.act_hid = BNXT_ULP_ACT_HID_01e4,
+	.act_hid = BNXT_ULP_ACT_HID_0615,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
@@ -223,7 +279,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[23] = {
-	.act_hid = BNXT_ULP_ACT_HID_00cc,
+	.act_hid = BNXT_ULP_ACT_HID_02ab,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
@@ -232,7 +288,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[24] = {
-	.act_hid = BNXT_ULP_ACT_HID_0504,
+	.act_hid = BNXT_ULP_ACT_HID_0056,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
@@ -241,7 +297,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[25] = {
-	.act_hid = BNXT_ULP_ACT_HID_01ef,
+	.act_hid = BNXT_ULP_ACT_HID_0624,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
@@ -250,7 +306,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[26] = {
-	.act_hid = BNXT_ULP_ACT_HID_03ed,
+	.act_hid = BNXT_ULP_ACT_HID_0456,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
@@ -260,7 +316,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[27] = {
-	.act_hid = BNXT_ULP_ACT_HID_0514,
+	.act_hid = BNXT_ULP_ACT_HID_0066,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
@@ -270,7 +326,7 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 1
 	},
 	[28] = {
-	.act_hid = BNXT_ULP_ACT_HID_00db,
+	.act_hid = BNXT_ULP_ACT_HID_048d,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED |
 		BNXT_ULP_ACT_BIT_SAMPLE |
@@ -278,12 +334,514 @@  struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 	.act_tid = 2
 	},
 	[29] = {
-	.act_hid = BNXT_ULP_ACT_HID_00df,
+	.act_hid = BNXT_ULP_ACT_HID_048f,
 	.act_sig = { .bits =
 		BNXT_ULP_ACT_BIT_SHARED |
 		BNXT_ULP_ACT_BIT_SAMPLE |
 		BNXT_ULP_ACT_BIT_COUNT |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.act_tid = 2
+	},
+	[30] = {
+	.act_hid = BNXT_ULP_ACT_HID_04bc,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[31] = {
+	.act_hid = BNXT_ULP_ACT_HID_00a9,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[32] = {
+	.act_hid = BNXT_ULP_ACT_HID_020f,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[33] = {
+	.act_hid = BNXT_ULP_ACT_HID_04a9,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[34] = {
+	.act_hid = BNXT_ULP_ACT_HID_01fc,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[35] = {
+	.act_hid = BNXT_ULP_ACT_HID_04be,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[36] = {
+	.act_hid = BNXT_ULP_ACT_HID_00ab,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[37] = {
+	.act_hid = BNXT_ULP_ACT_HID_0211,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[38] = {
+	.act_hid = BNXT_ULP_ACT_HID_04ab,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[39] = {
+	.act_hid = BNXT_ULP_ACT_HID_01fe,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[40] = {
+	.act_hid = BNXT_ULP_ACT_HID_0667,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[41] = {
+	.act_hid = BNXT_ULP_ACT_HID_0254,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[42] = {
+	.act_hid = BNXT_ULP_ACT_HID_03ba,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[43] = {
+	.act_hid = BNXT_ULP_ACT_HID_0654,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[44] = {
+	.act_hid = BNXT_ULP_ACT_HID_03a7,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[45] = {
+	.act_hid = BNXT_ULP_ACT_HID_0669,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[46] = {
+	.act_hid = BNXT_ULP_ACT_HID_0256,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[47] = {
+	.act_hid = BNXT_ULP_ACT_HID_03bc,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[48] = {
+	.act_hid = BNXT_ULP_ACT_HID_0656,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[49] = {
+	.act_hid = BNXT_ULP_ACT_HID_03a9,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.act_tid = 3
+	},
+	[50] = {
+	.act_hid = BNXT_ULP_ACT_HID_021b,
+	.act_sig = { .bits =
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[51] = {
+	.act_hid = BNXT_ULP_ACT_HID_021c,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DROP |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[52] = {
+	.act_hid = BNXT_ULP_ACT_HID_021e,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DROP |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[53] = {
+	.act_hid = BNXT_ULP_ACT_HID_063f,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[54] = {
+	.act_hid = BNXT_ULP_ACT_HID_0510,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[55] = {
+	.act_hid = BNXT_ULP_ACT_HID_03c6,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[56] = {
+	.act_hid = BNXT_ULP_ACT_HID_0082,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[57] = {
+	.act_hid = BNXT_ULP_ACT_HID_06bb,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[58] = {
+	.act_hid = BNXT_ULP_ACT_HID_021d,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[59] = {
+	.act_hid = BNXT_ULP_ACT_HID_0641,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[60] = {
+	.act_hid = BNXT_ULP_ACT_HID_0512,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[61] = {
+	.act_hid = BNXT_ULP_ACT_HID_03c8,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[62] = {
+	.act_hid = BNXT_ULP_ACT_HID_0084,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[63] = {
+	.act_hid = BNXT_ULP_ACT_HID_06bd,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+		BNXT_ULP_ACT_BIT_PUSH_VLAN |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 4
+	},
+	[64] = {
+	.act_hid = BNXT_ULP_ACT_HID_06d7,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[65] = {
+	.act_hid = BNXT_ULP_ACT_HID_02c4,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[66] = {
+	.act_hid = BNXT_ULP_ACT_HID_042a,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[67] = {
+	.act_hid = BNXT_ULP_ACT_HID_06c4,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[68] = {
+	.act_hid = BNXT_ULP_ACT_HID_0417,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[69] = {
+	.act_hid = BNXT_ULP_ACT_HID_06d9,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[70] = {
+	.act_hid = BNXT_ULP_ACT_HID_02c6,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[71] = {
+	.act_hid = BNXT_ULP_ACT_HID_042c,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[72] = {
+	.act_hid = BNXT_ULP_ACT_HID_06c6,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[73] = {
+	.act_hid = BNXT_ULP_ACT_HID_0419,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[74] = {
+	.act_hid = BNXT_ULP_ACT_HID_0119,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[75] = {
+	.act_hid = BNXT_ULP_ACT_HID_046f,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[76] = {
+	.act_hid = BNXT_ULP_ACT_HID_05d5,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[77] = {
+	.act_hid = BNXT_ULP_ACT_HID_0106,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[78] = {
+	.act_hid = BNXT_ULP_ACT_HID_05c2,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[79] = {
+	.act_hid = BNXT_ULP_ACT_HID_011b,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[80] = {
+	.act_hid = BNXT_ULP_ACT_HID_0471,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[81] = {
+	.act_hid = BNXT_ULP_ACT_HID_05d7,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[82] = {
+	.act_hid = BNXT_ULP_ACT_HID_0108,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[83] = {
+	.act_hid = BNXT_ULP_ACT_HID_05c4,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_DEC_TTL |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+		BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+		BNXT_ULP_ACT_BIT_SET_TP_SRC |
+		BNXT_ULP_ACT_BIT_SET_TP_DST |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 5
+	},
+	[84] = {
+	.act_hid = BNXT_ULP_ACT_HID_00a2,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 6
+	},
+	[85] = {
+	.act_hid = BNXT_ULP_ACT_HID_00a4,
+	.act_sig = { .bits =
+		BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+		BNXT_ULP_ACT_BIT_COUNT |
+		BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+	.act_tid = 6
 	}
 };
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
index 3197ed2072..0ca0d2b366 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
@@ -3,7 +3,7 @@ 
  * All rights reserved.
  */
 
-/* date: Mon Dec  7 09:51:03 2020 */
+/* date: Wed Dec 16 16:37:41 2020 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
@@ -16,1736 +16,80484 @@ 
  * maps hash id to ulp_class_match_list[] index
  */
 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
-	[BNXT_ULP_CLASS_HID_005c] = 1,
-	[BNXT_ULP_CLASS_HID_0003] = 2,
-	[BNXT_ULP_CLASS_HID_0132] = 3,
-	[BNXT_ULP_CLASS_HID_00e1] = 4,
-	[BNXT_ULP_CLASS_HID_0044] = 5,
-	[BNXT_ULP_CLASS_HID_001b] = 6,
-	[BNXT_ULP_CLASS_HID_012a] = 7,
-	[BNXT_ULP_CLASS_HID_00f9] = 8,
-	[BNXT_ULP_CLASS_HID_018d] = 9,
-	[BNXT_ULP_CLASS_HID_00a7] = 10,
-	[BNXT_ULP_CLASS_HID_006f] = 11,
-	[BNXT_ULP_CLASS_HID_0181] = 12,
-	[BNXT_ULP_CLASS_HID_0195] = 13,
-	[BNXT_ULP_CLASS_HID_00bf] = 14,
-	[BNXT_ULP_CLASS_HID_0077] = 15,
-	[BNXT_ULP_CLASS_HID_0199] = 16,
-	[BNXT_ULP_CLASS_HID_009a] = 17,
-	[BNXT_ULP_CLASS_HID_0192] = 18,
-	[BNXT_ULP_CLASS_HID_01e2] = 19,
-	[BNXT_ULP_CLASS_HID_00fa] = 20,
-	[BNXT_ULP_CLASS_HID_0165] = 21,
-	[BNXT_ULP_CLASS_HID_0042] = 22,
-	[BNXT_ULP_CLASS_HID_00cd] = 23,
-	[BNXT_ULP_CLASS_HID_01aa] = 24,
-	[BNXT_ULP_CLASS_HID_0178] = 25,
-	[BNXT_ULP_CLASS_HID_0070] = 26,
-	[BNXT_ULP_CLASS_HID_00f3] = 27,
-	[BNXT_ULP_CLASS_HID_01d8] = 28,
-	[BNXT_ULP_CLASS_HID_005b] = 29,
-	[BNXT_ULP_CLASS_HID_0153] = 30,
-	[BNXT_ULP_CLASS_HID_01a3] = 31,
-	[BNXT_ULP_CLASS_HID_00bb] = 32,
-	[BNXT_ULP_CLASS_HID_0082] = 33,
-	[BNXT_ULP_CLASS_HID_018a] = 34,
-	[BNXT_ULP_CLASS_HID_01fa] = 35,
-	[BNXT_ULP_CLASS_HID_00e2] = 36,
-	[BNXT_ULP_CLASS_HID_017d] = 37,
-	[BNXT_ULP_CLASS_HID_005a] = 38,
-	[BNXT_ULP_CLASS_HID_00d5] = 39,
-	[BNXT_ULP_CLASS_HID_01b2] = 40,
-	[BNXT_ULP_CLASS_HID_0160] = 41,
-	[BNXT_ULP_CLASS_HID_0068] = 42,
-	[BNXT_ULP_CLASS_HID_00eb] = 43,
-	[BNXT_ULP_CLASS_HID_01c0] = 44,
-	[BNXT_ULP_CLASS_HID_0043] = 45,
-	[BNXT_ULP_CLASS_HID_014b] = 46,
-	[BNXT_ULP_CLASS_HID_01bb] = 47,
-	[BNXT_ULP_CLASS_HID_00a3] = 48,
-	[BNXT_ULP_CLASS_HID_00cb] = 49,
-	[BNXT_ULP_CLASS_HID_00b4] = 50,
-	[BNXT_ULP_CLASS_HID_0013] = 51,
-	[BNXT_ULP_CLASS_HID_001c] = 52,
-	[BNXT_ULP_CLASS_HID_017b] = 53,
-	[BNXT_ULP_CLASS_HID_0164] = 54,
-	[BNXT_ULP_CLASS_HID_00c3] = 55,
-	[BNXT_ULP_CLASS_HID_00cc] = 56,
-	[BNXT_ULP_CLASS_HID_01a5] = 57,
-	[BNXT_ULP_CLASS_HID_0196] = 58,
-	[BNXT_ULP_CLASS_HID_010d] = 59,
-	[BNXT_ULP_CLASS_HID_00fe] = 60,
-	[BNXT_ULP_CLASS_HID_0084] = 61,
-	[BNXT_ULP_CLASS_HID_0046] = 62,
-	[BNXT_ULP_CLASS_HID_01ec] = 63,
-	[BNXT_ULP_CLASS_HID_01ae] = 64,
-	[BNXT_ULP_CLASS_HID_00d3] = 65,
-	[BNXT_ULP_CLASS_HID_00ac] = 66,
-	[BNXT_ULP_CLASS_HID_000b] = 67,
-	[BNXT_ULP_CLASS_HID_0004] = 68,
-	[BNXT_ULP_CLASS_HID_0163] = 69,
-	[BNXT_ULP_CLASS_HID_017c] = 70,
-	[BNXT_ULP_CLASS_HID_00db] = 71,
-	[BNXT_ULP_CLASS_HID_00d4] = 72,
-	[BNXT_ULP_CLASS_HID_01bd] = 73,
-	[BNXT_ULP_CLASS_HID_018e] = 74,
-	[BNXT_ULP_CLASS_HID_0115] = 75,
-	[BNXT_ULP_CLASS_HID_00e6] = 76,
-	[BNXT_ULP_CLASS_HID_009c] = 77,
-	[BNXT_ULP_CLASS_HID_005e] = 78,
-	[BNXT_ULP_CLASS_HID_01f4] = 79,
-	[BNXT_ULP_CLASS_HID_01b6] = 80
+	[BNXT_ULP_CLASS_HID_26d1] = 1,
+	[BNXT_ULP_CLASS_HID_0071] = 2,
+	[BNXT_ULP_CLASS_HID_53a5] = 3,
+	[BNXT_ULP_CLASS_HID_1d49] = 4,
+	[BNXT_ULP_CLASS_HID_2095] = 5,
+	[BNXT_ULP_CLASS_HID_5701] = 6,
+	[BNXT_ULP_CLASS_HID_4d79] = 7,
+	[BNXT_ULP_CLASS_HID_170d] = 8,
+	[BNXT_ULP_CLASS_HID_1a69] = 9,
+	[BNXT_ULP_CLASS_HID_50c5] = 10,
+	[BNXT_ULP_CLASS_HID_473d] = 11,
+	[BNXT_ULP_CLASS_HID_10c1] = 12,
+	[BNXT_ULP_CLASS_HID_142d] = 13,
+	[BNXT_ULP_CLASS_HID_4a99] = 14,
+	[BNXT_ULP_CLASS_HID_40f1] = 15,
+	[BNXT_ULP_CLASS_HID_0a85] = 16,
+	[BNXT_ULP_CLASS_HID_0179] = 17,
+	[BNXT_ULP_CLASS_HID_37d5] = 18,
+	[BNXT_ULP_CLASS_HID_2e4d] = 19,
+	[BNXT_ULP_CLASS_HID_54ad] = 20,
+	[BNXT_ULP_CLASS_HID_5809] = 21,
+	[BNXT_ULP_CLASS_HID_31a9] = 22,
+	[BNXT_ULP_CLASS_HID_2801] = 23,
+	[BNXT_ULP_CLASS_HID_4e61] = 24,
+	[BNXT_ULP_CLASS_HID_2561] = 25,
+	[BNXT_ULP_CLASS_HID_2bad] = 26,
+	[BNXT_ULP_CLASS_HID_26f1] = 27,
+	[BNXT_ULP_CLASS_HID_13cf1] = 28,
+	[BNXT_ULP_CLASS_HID_252f1] = 29,
+	[BNXT_ULP_CLASS_HID_30c25] = 30,
+	[BNXT_ULP_CLASS_HID_0051] = 31,
+	[BNXT_ULP_CLASS_HID_11651] = 32,
+	[BNXT_ULP_CLASS_HID_22c51] = 33,
+	[BNXT_ULP_CLASS_HID_34251] = 34,
+	[BNXT_ULP_CLASS_HID_5385] = 35,
+	[BNXT_ULP_CLASS_HID_10cc9] = 36,
+	[BNXT_ULP_CLASS_HID_222c9] = 37,
+	[BNXT_ULP_CLASS_HID_338c9] = 38,
+	[BNXT_ULP_CLASS_HID_1d69] = 39,
+	[BNXT_ULP_CLASS_HID_13369] = 40,
+	[BNXT_ULP_CLASS_HID_24969] = 41,
+	[BNXT_ULP_CLASS_HID_3025d] = 42,
+	[BNXT_ULP_CLASS_HID_20b5] = 43,
+	[BNXT_ULP_CLASS_HID_136b5] = 44,
+	[BNXT_ULP_CLASS_HID_24cb5] = 45,
+	[BNXT_ULP_CLASS_HID_305f9] = 46,
+	[BNXT_ULP_CLASS_HID_5721] = 47,
+	[BNXT_ULP_CLASS_HID_11015] = 48,
+	[BNXT_ULP_CLASS_HID_22615] = 49,
+	[BNXT_ULP_CLASS_HID_33c15] = 50,
+	[BNXT_ULP_CLASS_HID_4d59] = 51,
+	[BNXT_ULP_CLASS_HID_1068d] = 52,
+	[BNXT_ULP_CLASS_HID_21c8d] = 53,
+	[BNXT_ULP_CLASS_HID_3328d] = 54,
+	[BNXT_ULP_CLASS_HID_172d] = 55,
+	[BNXT_ULP_CLASS_HID_12d2d] = 56,
+	[BNXT_ULP_CLASS_HID_2432d] = 57,
+	[BNXT_ULP_CLASS_HID_3592d] = 58,
+	[BNXT_ULP_CLASS_HID_1a49] = 59,
+	[BNXT_ULP_CLASS_HID_13049] = 60,
+	[BNXT_ULP_CLASS_HID_24649] = 61,
+	[BNXT_ULP_CLASS_HID_35c49] = 62,
+	[BNXT_ULP_CLASS_HID_50e5] = 63,
+	[BNXT_ULP_CLASS_HID_10a29] = 64,
+	[BNXT_ULP_CLASS_HID_22029] = 65,
+	[BNXT_ULP_CLASS_HID_33629] = 66,
+	[BNXT_ULP_CLASS_HID_471d] = 67,
+	[BNXT_ULP_CLASS_HID_10041] = 68,
+	[BNXT_ULP_CLASS_HID_21641] = 69,
+	[BNXT_ULP_CLASS_HID_32c41] = 70,
+	[BNXT_ULP_CLASS_HID_10e1] = 71,
+	[BNXT_ULP_CLASS_HID_126e1] = 72,
+	[BNXT_ULP_CLASS_HID_23ce1] = 73,
+	[BNXT_ULP_CLASS_HID_352e1] = 74,
+	[BNXT_ULP_CLASS_HID_140d] = 75,
+	[BNXT_ULP_CLASS_HID_12a0d] = 76,
+	[BNXT_ULP_CLASS_HID_2400d] = 77,
+	[BNXT_ULP_CLASS_HID_3560d] = 78,
+	[BNXT_ULP_CLASS_HID_4ab9] = 79,
+	[BNXT_ULP_CLASS_HID_103ed] = 80,
+	[BNXT_ULP_CLASS_HID_219ed] = 81,
+	[BNXT_ULP_CLASS_HID_32fed] = 82,
+	[BNXT_ULP_CLASS_HID_40d1] = 83,
+	[BNXT_ULP_CLASS_HID_156d1] = 84,
+	[BNXT_ULP_CLASS_HID_21005] = 85,
+	[BNXT_ULP_CLASS_HID_32605] = 86,
+	[BNXT_ULP_CLASS_HID_0aa5] = 87,
+	[BNXT_ULP_CLASS_HID_120a5] = 88,
+	[BNXT_ULP_CLASS_HID_236a5] = 89,
+	[BNXT_ULP_CLASS_HID_34ca5] = 90,
+	[BNXT_ULP_CLASS_HID_0159] = 91,
+	[BNXT_ULP_CLASS_HID_11759] = 92,
+	[BNXT_ULP_CLASS_HID_22d59] = 93,
+	[BNXT_ULP_CLASS_HID_34359] = 94,
+	[BNXT_ULP_CLASS_HID_37f5] = 95,
+	[BNXT_ULP_CLASS_HID_14df5] = 96,
+	[BNXT_ULP_CLASS_HID_20739] = 97,
+	[BNXT_ULP_CLASS_HID_31d39] = 98,
+	[BNXT_ULP_CLASS_HID_2e6d] = 99,
+	[BNXT_ULP_CLASS_HID_1446d] = 100,
+	[BNXT_ULP_CLASS_HID_25a6d] = 101,
+	[BNXT_ULP_CLASS_HID_31351] = 102,
+	[BNXT_ULP_CLASS_HID_548d] = 103,
+	[BNXT_ULP_CLASS_HID_10df1] = 104,
+	[BNXT_ULP_CLASS_HID_223f1] = 105,
+	[BNXT_ULP_CLASS_HID_339f1] = 106,
+	[BNXT_ULP_CLASS_HID_5829] = 107,
+	[BNXT_ULP_CLASS_HID_1111d] = 108,
+	[BNXT_ULP_CLASS_HID_2271d] = 109,
+	[BNXT_ULP_CLASS_HID_33d1d] = 110,
+	[BNXT_ULP_CLASS_HID_3189] = 111,
+	[BNXT_ULP_CLASS_HID_14789] = 112,
+	[BNXT_ULP_CLASS_HID_200fd] = 113,
+	[BNXT_ULP_CLASS_HID_316fd] = 114,
+	[BNXT_ULP_CLASS_HID_2821] = 115,
+	[BNXT_ULP_CLASS_HID_13e21] = 116,
+	[BNXT_ULP_CLASS_HID_25421] = 117,
+	[BNXT_ULP_CLASS_HID_30d15] = 118,
+	[BNXT_ULP_CLASS_HID_4e41] = 119,
+	[BNXT_ULP_CLASS_HID_107b5] = 120,
+	[BNXT_ULP_CLASS_HID_21db5] = 121,
+	[BNXT_ULP_CLASS_HID_333b5] = 122,
+	[BNXT_ULP_CLASS_HID_2541] = 123,
+	[BNXT_ULP_CLASS_HID_2b8d] = 124,
+	[BNXT_ULP_CLASS_HID_2691] = 125,
+	[BNXT_ULP_CLASS_HID_13c91] = 126,
+	[BNXT_ULP_CLASS_HID_25291] = 127,
+	[BNXT_ULP_CLASS_HID_30c45] = 128,
+	[BNXT_ULP_CLASS_HID_0031] = 129,
+	[BNXT_ULP_CLASS_HID_11631] = 130,
+	[BNXT_ULP_CLASS_HID_22c31] = 131,
+	[BNXT_ULP_CLASS_HID_34231] = 132,
+	[BNXT_ULP_CLASS_HID_53e5] = 133,
+	[BNXT_ULP_CLASS_HID_10ca9] = 134,
+	[BNXT_ULP_CLASS_HID_222a9] = 135,
+	[BNXT_ULP_CLASS_HID_338a9] = 136,
+	[BNXT_ULP_CLASS_HID_1d09] = 137,
+	[BNXT_ULP_CLASS_HID_13309] = 138,
+	[BNXT_ULP_CLASS_HID_24909] = 139,
+	[BNXT_ULP_CLASS_HID_3023d] = 140,
+	[BNXT_ULP_CLASS_HID_20d5] = 141,
+	[BNXT_ULP_CLASS_HID_136d5] = 142,
+	[BNXT_ULP_CLASS_HID_24cd5] = 143,
+	[BNXT_ULP_CLASS_HID_30599] = 144,
+	[BNXT_ULP_CLASS_HID_5741] = 145,
+	[BNXT_ULP_CLASS_HID_11075] = 146,
+	[BNXT_ULP_CLASS_HID_22675] = 147,
+	[BNXT_ULP_CLASS_HID_33c75] = 148,
+	[BNXT_ULP_CLASS_HID_4d39] = 149,
+	[BNXT_ULP_CLASS_HID_106ed] = 150,
+	[BNXT_ULP_CLASS_HID_21ced] = 151,
+	[BNXT_ULP_CLASS_HID_332ed] = 152,
+	[BNXT_ULP_CLASS_HID_174d] = 153,
+	[BNXT_ULP_CLASS_HID_12d4d] = 154,
+	[BNXT_ULP_CLASS_HID_2434d] = 155,
+	[BNXT_ULP_CLASS_HID_3594d] = 156,
+	[BNXT_ULP_CLASS_HID_1a29] = 157,
+	[BNXT_ULP_CLASS_HID_13029] = 158,
+	[BNXT_ULP_CLASS_HID_24629] = 159,
+	[BNXT_ULP_CLASS_HID_35c29] = 160,
+	[BNXT_ULP_CLASS_HID_5085] = 161,
+	[BNXT_ULP_CLASS_HID_10a49] = 162,
+	[BNXT_ULP_CLASS_HID_22049] = 163,
+	[BNXT_ULP_CLASS_HID_33649] = 164,
+	[BNXT_ULP_CLASS_HID_477d] = 165,
+	[BNXT_ULP_CLASS_HID_10021] = 166,
+	[BNXT_ULP_CLASS_HID_21621] = 167,
+	[BNXT_ULP_CLASS_HID_32c21] = 168,
+	[BNXT_ULP_CLASS_HID_1081] = 169,
+	[BNXT_ULP_CLASS_HID_12681] = 170,
+	[BNXT_ULP_CLASS_HID_23c81] = 171,
+	[BNXT_ULP_CLASS_HID_35281] = 172,
+	[BNXT_ULP_CLASS_HID_146d] = 173,
+	[BNXT_ULP_CLASS_HID_12a6d] = 174,
+	[BNXT_ULP_CLASS_HID_2406d] = 175,
+	[BNXT_ULP_CLASS_HID_3566d] = 176,
+	[BNXT_ULP_CLASS_HID_4ad9] = 177,
+	[BNXT_ULP_CLASS_HID_1038d] = 178,
+	[BNXT_ULP_CLASS_HID_2198d] = 179,
+	[BNXT_ULP_CLASS_HID_32f8d] = 180,
+	[BNXT_ULP_CLASS_HID_40b1] = 181,
+	[BNXT_ULP_CLASS_HID_156b1] = 182,
+	[BNXT_ULP_CLASS_HID_21065] = 183,
+	[BNXT_ULP_CLASS_HID_32665] = 184,
+	[BNXT_ULP_CLASS_HID_0ac5] = 185,
+	[BNXT_ULP_CLASS_HID_120c5] = 186,
+	[BNXT_ULP_CLASS_HID_236c5] = 187,
+	[BNXT_ULP_CLASS_HID_34cc5] = 188,
+	[BNXT_ULP_CLASS_HID_0139] = 189,
+	[BNXT_ULP_CLASS_HID_11739] = 190,
+	[BNXT_ULP_CLASS_HID_22d39] = 191,
+	[BNXT_ULP_CLASS_HID_34339] = 192,
+	[BNXT_ULP_CLASS_HID_3795] = 193,
+	[BNXT_ULP_CLASS_HID_14d95] = 194,
+	[BNXT_ULP_CLASS_HID_20759] = 195,
+	[BNXT_ULP_CLASS_HID_31d59] = 196,
+	[BNXT_ULP_CLASS_HID_2e0d] = 197,
+	[BNXT_ULP_CLASS_HID_1440d] = 198,
+	[BNXT_ULP_CLASS_HID_25a0d] = 199,
+	[BNXT_ULP_CLASS_HID_31331] = 200,
+	[BNXT_ULP_CLASS_HID_54ed] = 201,
+	[BNXT_ULP_CLASS_HID_10d91] = 202,
+	[BNXT_ULP_CLASS_HID_22391] = 203,
+	[BNXT_ULP_CLASS_HID_33991] = 204,
+	[BNXT_ULP_CLASS_HID_5849] = 205,
+	[BNXT_ULP_CLASS_HID_1117d] = 206,
+	[BNXT_ULP_CLASS_HID_2277d] = 207,
+	[BNXT_ULP_CLASS_HID_33d7d] = 208,
+	[BNXT_ULP_CLASS_HID_31e9] = 209,
+	[BNXT_ULP_CLASS_HID_147e9] = 210,
+	[BNXT_ULP_CLASS_HID_2009d] = 211,
+	[BNXT_ULP_CLASS_HID_3169d] = 212,
+	[BNXT_ULP_CLASS_HID_2841] = 213,
+	[BNXT_ULP_CLASS_HID_13e41] = 214,
+	[BNXT_ULP_CLASS_HID_25441] = 215,
+	[BNXT_ULP_CLASS_HID_30d75] = 216,
+	[BNXT_ULP_CLASS_HID_4e21] = 217,
+	[BNXT_ULP_CLASS_HID_107d5] = 218,
+	[BNXT_ULP_CLASS_HID_21dd5] = 219,
+	[BNXT_ULP_CLASS_HID_333d5] = 220,
+	[BNXT_ULP_CLASS_HID_2521] = 221,
+	[BNXT_ULP_CLASS_HID_2bed] = 222,
+	[BNXT_ULP_CLASS_HID_1865] = 223,
+	[BNXT_ULP_CLASS_HID_389d] = 224,
+	[BNXT_ULP_CLASS_HID_123d] = 225,
+	[BNXT_ULP_CLASS_HID_4ef1] = 226,
+	[BNXT_ULP_CLASS_HID_1229] = 227,
+	[BNXT_ULP_CLASS_HID_3241] = 228,
+	[BNXT_ULP_CLASS_HID_0be1] = 229,
+	[BNXT_ULP_CLASS_HID_48b5] = 230,
+	[BNXT_ULP_CLASS_HID_0bed] = 231,
+	[BNXT_ULP_CLASS_HID_2c05] = 232,
+	[BNXT_ULP_CLASS_HID_05a5] = 233,
+	[BNXT_ULP_CLASS_HID_4279] = 234,
+	[BNXT_ULP_CLASS_HID_05d1] = 235,
+	[BNXT_ULP_CLASS_HID_25c9] = 236,
+	[BNXT_ULP_CLASS_HID_5c55] = 237,
+	[BNXT_ULP_CLASS_HID_3c3d] = 238,
+	[BNXT_ULP_CLASS_HID_4fc9] = 239,
+	[BNXT_ULP_CLASS_HID_1335] = 240,
+	[BNXT_ULP_CLASS_HID_4981] = 241,
+	[BNXT_ULP_CLASS_HID_2969] = 242,
+	[BNXT_ULP_CLASS_HID_498d] = 243,
+	[BNXT_ULP_CLASS_HID_0cf9] = 244,
+	[BNXT_ULP_CLASS_HID_4345] = 245,
+	[BNXT_ULP_CLASS_HID_232d] = 246,
+	[BNXT_ULP_CLASS_HID_2579] = 247,
+	[BNXT_ULP_CLASS_HID_2bb5] = 248,
+	[BNXT_ULP_CLASS_HID_1845] = 249,
+	[BNXT_ULP_CLASS_HID_1399] = 250,
+	[BNXT_ULP_CLASS_HID_0eed] = 251,
+	[BNXT_ULP_CLASS_HID_0a21] = 252,
+	[BNXT_ULP_CLASS_HID_38bd] = 253,
+	[BNXT_ULP_CLASS_HID_33f1] = 254,
+	[BNXT_ULP_CLASS_HID_2ec5] = 255,
+	[BNXT_ULP_CLASS_HID_2a19] = 256,
+	[BNXT_ULP_CLASS_HID_121d] = 257,
+	[BNXT_ULP_CLASS_HID_0d51] = 258,
+	[BNXT_ULP_CLASS_HID_08a5] = 259,
+	[BNXT_ULP_CLASS_HID_03f9] = 260,
+	[BNXT_ULP_CLASS_HID_4ed1] = 261,
+	[BNXT_ULP_CLASS_HID_4a25] = 262,
+	[BNXT_ULP_CLASS_HID_4579] = 263,
+	[BNXT_ULP_CLASS_HID_404d] = 264,
+	[BNXT_ULP_CLASS_HID_1209] = 265,
+	[BNXT_ULP_CLASS_HID_0d5d] = 266,
+	[BNXT_ULP_CLASS_HID_0891] = 267,
+	[BNXT_ULP_CLASS_HID_03e5] = 268,
+	[BNXT_ULP_CLASS_HID_3261] = 269,
+	[BNXT_ULP_CLASS_HID_2db5] = 270,
+	[BNXT_ULP_CLASS_HID_2889] = 271,
+	[BNXT_ULP_CLASS_HID_23dd] = 272,
+	[BNXT_ULP_CLASS_HID_0bc1] = 273,
+	[BNXT_ULP_CLASS_HID_0715] = 274,
+	[BNXT_ULP_CLASS_HID_0269] = 275,
+	[BNXT_ULP_CLASS_HID_5a69] = 276,
+	[BNXT_ULP_CLASS_HID_4895] = 277,
+	[BNXT_ULP_CLASS_HID_43e9] = 278,
+	[BNXT_ULP_CLASS_HID_3f3d] = 279,
+	[BNXT_ULP_CLASS_HID_3a71] = 280,
+	[BNXT_ULP_CLASS_HID_0bcd] = 281,
+	[BNXT_ULP_CLASS_HID_0701] = 282,
+	[BNXT_ULP_CLASS_HID_0255] = 283,
+	[BNXT_ULP_CLASS_HID_5a55] = 284,
+	[BNXT_ULP_CLASS_HID_2c25] = 285,
+	[BNXT_ULP_CLASS_HID_2779] = 286,
+	[BNXT_ULP_CLASS_HID_224d] = 287,
+	[BNXT_ULP_CLASS_HID_1d81] = 288,
+	[BNXT_ULP_CLASS_HID_0585] = 289,
+	[BNXT_ULP_CLASS_HID_00d9] = 290,
+	[BNXT_ULP_CLASS_HID_58d9] = 291,
+	[BNXT_ULP_CLASS_HID_542d] = 292,
+	[BNXT_ULP_CLASS_HID_4259] = 293,
+	[BNXT_ULP_CLASS_HID_3dad] = 294,
+	[BNXT_ULP_CLASS_HID_38e1] = 295,
+	[BNXT_ULP_CLASS_HID_3435] = 296,
+	[BNXT_ULP_CLASS_HID_05f1] = 297,
+	[BNXT_ULP_CLASS_HID_00c5] = 298,
+	[BNXT_ULP_CLASS_HID_58c5] = 299,
+	[BNXT_ULP_CLASS_HID_5419] = 300,
+	[BNXT_ULP_CLASS_HID_25e9] = 301,
+	[BNXT_ULP_CLASS_HID_213d] = 302,
+	[BNXT_ULP_CLASS_HID_1c71] = 303,
+	[BNXT_ULP_CLASS_HID_1745] = 304,
+	[BNXT_ULP_CLASS_HID_5c75] = 305,
+	[BNXT_ULP_CLASS_HID_5749] = 306,
+	[BNXT_ULP_CLASS_HID_529d] = 307,
+	[BNXT_ULP_CLASS_HID_4dd1] = 308,
+	[BNXT_ULP_CLASS_HID_3c1d] = 309,
+	[BNXT_ULP_CLASS_HID_3751] = 310,
+	[BNXT_ULP_CLASS_HID_32a5] = 311,
+	[BNXT_ULP_CLASS_HID_2df9] = 312,
+	[BNXT_ULP_CLASS_HID_4fe9] = 313,
+	[BNXT_ULP_CLASS_HID_4b3d] = 314,
+	[BNXT_ULP_CLASS_HID_4671] = 315,
+	[BNXT_ULP_CLASS_HID_4145] = 316,
+	[BNXT_ULP_CLASS_HID_1315] = 317,
+	[BNXT_ULP_CLASS_HID_0e69] = 318,
+	[BNXT_ULP_CLASS_HID_09bd] = 319,
+	[BNXT_ULP_CLASS_HID_04f1] = 320,
+	[BNXT_ULP_CLASS_HID_49a1] = 321,
+	[BNXT_ULP_CLASS_HID_44f5] = 322,
+	[BNXT_ULP_CLASS_HID_3fc9] = 323,
+	[BNXT_ULP_CLASS_HID_3b1d] = 324,
+	[BNXT_ULP_CLASS_HID_2949] = 325,
+	[BNXT_ULP_CLASS_HID_249d] = 326,
+	[BNXT_ULP_CLASS_HID_1fd1] = 327,
+	[BNXT_ULP_CLASS_HID_1b25] = 328,
+	[BNXT_ULP_CLASS_HID_49ad] = 329,
+	[BNXT_ULP_CLASS_HID_44e1] = 330,
+	[BNXT_ULP_CLASS_HID_4035] = 331,
+	[BNXT_ULP_CLASS_HID_3b09] = 332,
+	[BNXT_ULP_CLASS_HID_0cd9] = 333,
+	[BNXT_ULP_CLASS_HID_082d] = 334,
+	[BNXT_ULP_CLASS_HID_0361] = 335,
+	[BNXT_ULP_CLASS_HID_5b61] = 336,
+	[BNXT_ULP_CLASS_HID_4365] = 337,
+	[BNXT_ULP_CLASS_HID_3eb9] = 338,
+	[BNXT_ULP_CLASS_HID_398d] = 339,
+	[BNXT_ULP_CLASS_HID_34c1] = 340,
+	[BNXT_ULP_CLASS_HID_230d] = 341,
+	[BNXT_ULP_CLASS_HID_1e41] = 342,
+	[BNXT_ULP_CLASS_HID_1995] = 343,
+	[BNXT_ULP_CLASS_HID_14e9] = 344,
+	[BNXT_ULP_CLASS_HID_2559] = 345,
+	[BNXT_ULP_CLASS_HID_2b95] = 346,
+	[BNXT_ULP_CLASS_HID_1825] = 347,
+	[BNXT_ULP_CLASS_HID_13f9] = 348,
+	[BNXT_ULP_CLASS_HID_0e8d] = 349,
+	[BNXT_ULP_CLASS_HID_0a41] = 350,
+	[BNXT_ULP_CLASS_HID_38dd] = 351,
+	[BNXT_ULP_CLASS_HID_3391] = 352,
+	[BNXT_ULP_CLASS_HID_2ea5] = 353,
+	[BNXT_ULP_CLASS_HID_2a79] = 354,
+	[BNXT_ULP_CLASS_HID_127d] = 355,
+	[BNXT_ULP_CLASS_HID_0d31] = 356,
+	[BNXT_ULP_CLASS_HID_08c5] = 357,
+	[BNXT_ULP_CLASS_HID_0399] = 358,
+	[BNXT_ULP_CLASS_HID_4eb1] = 359,
+	[BNXT_ULP_CLASS_HID_4a45] = 360,
+	[BNXT_ULP_CLASS_HID_4519] = 361,
+	[BNXT_ULP_CLASS_HID_402d] = 362,
+	[BNXT_ULP_CLASS_HID_1269] = 363,
+	[BNXT_ULP_CLASS_HID_0d3d] = 364,
+	[BNXT_ULP_CLASS_HID_08f1] = 365,
+	[BNXT_ULP_CLASS_HID_0385] = 366,
+	[BNXT_ULP_CLASS_HID_3201] = 367,
+	[BNXT_ULP_CLASS_HID_2dd5] = 368,
+	[BNXT_ULP_CLASS_HID_28e9] = 369,
+	[BNXT_ULP_CLASS_HID_23bd] = 370,
+	[BNXT_ULP_CLASS_HID_0ba1] = 371,
+	[BNXT_ULP_CLASS_HID_0775] = 372,
+	[BNXT_ULP_CLASS_HID_0209] = 373,
+	[BNXT_ULP_CLASS_HID_5a09] = 374,
+	[BNXT_ULP_CLASS_HID_48f5] = 375,
+	[BNXT_ULP_CLASS_HID_4389] = 376,
+	[BNXT_ULP_CLASS_HID_3f5d] = 377,
+	[BNXT_ULP_CLASS_HID_3a11] = 378,
+	[BNXT_ULP_CLASS_HID_0bad] = 379,
+	[BNXT_ULP_CLASS_HID_0761] = 380,
+	[BNXT_ULP_CLASS_HID_0235] = 381,
+	[BNXT_ULP_CLASS_HID_5a35] = 382,
+	[BNXT_ULP_CLASS_HID_2c45] = 383,
+	[BNXT_ULP_CLASS_HID_2719] = 384,
+	[BNXT_ULP_CLASS_HID_222d] = 385,
+	[BNXT_ULP_CLASS_HID_1de1] = 386,
+	[BNXT_ULP_CLASS_HID_05e5] = 387,
+	[BNXT_ULP_CLASS_HID_00b9] = 388,
+	[BNXT_ULP_CLASS_HID_58b9] = 389,
+	[BNXT_ULP_CLASS_HID_544d] = 390,
+	[BNXT_ULP_CLASS_HID_4239] = 391,
+	[BNXT_ULP_CLASS_HID_3dcd] = 392,
+	[BNXT_ULP_CLASS_HID_3881] = 393,
+	[BNXT_ULP_CLASS_HID_3455] = 394,
+	[BNXT_ULP_CLASS_HID_0591] = 395,
+	[BNXT_ULP_CLASS_HID_00a5] = 396,
+	[BNXT_ULP_CLASS_HID_58a5] = 397,
+	[BNXT_ULP_CLASS_HID_5479] = 398,
+	[BNXT_ULP_CLASS_HID_2589] = 399,
+	[BNXT_ULP_CLASS_HID_215d] = 400,
+	[BNXT_ULP_CLASS_HID_1c11] = 401,
+	[BNXT_ULP_CLASS_HID_1725] = 402,
+	[BNXT_ULP_CLASS_HID_5c15] = 403,
+	[BNXT_ULP_CLASS_HID_5729] = 404,
+	[BNXT_ULP_CLASS_HID_52fd] = 405,
+	[BNXT_ULP_CLASS_HID_4db1] = 406,
+	[BNXT_ULP_CLASS_HID_3c7d] = 407,
+	[BNXT_ULP_CLASS_HID_3731] = 408,
+	[BNXT_ULP_CLASS_HID_32c5] = 409,
+	[BNXT_ULP_CLASS_HID_2d99] = 410,
+	[BNXT_ULP_CLASS_HID_4f89] = 411,
+	[BNXT_ULP_CLASS_HID_4b5d] = 412,
+	[BNXT_ULP_CLASS_HID_4611] = 413,
+	[BNXT_ULP_CLASS_HID_4125] = 414,
+	[BNXT_ULP_CLASS_HID_1375] = 415,
+	[BNXT_ULP_CLASS_HID_0e09] = 416,
+	[BNXT_ULP_CLASS_HID_09dd] = 417,
+	[BNXT_ULP_CLASS_HID_0491] = 418,
+	[BNXT_ULP_CLASS_HID_49c1] = 419,
+	[BNXT_ULP_CLASS_HID_4495] = 420,
+	[BNXT_ULP_CLASS_HID_3fa9] = 421,
+	[BNXT_ULP_CLASS_HID_3b7d] = 422,
+	[BNXT_ULP_CLASS_HID_2929] = 423,
+	[BNXT_ULP_CLASS_HID_24fd] = 424,
+	[BNXT_ULP_CLASS_HID_1fb1] = 425,
+	[BNXT_ULP_CLASS_HID_1b45] = 426,
+	[BNXT_ULP_CLASS_HID_49cd] = 427,
+	[BNXT_ULP_CLASS_HID_4481] = 428,
+	[BNXT_ULP_CLASS_HID_4055] = 429,
+	[BNXT_ULP_CLASS_HID_3b69] = 430,
+	[BNXT_ULP_CLASS_HID_0cb9] = 431,
+	[BNXT_ULP_CLASS_HID_084d] = 432,
+	[BNXT_ULP_CLASS_HID_0301] = 433,
+	[BNXT_ULP_CLASS_HID_5b01] = 434,
+	[BNXT_ULP_CLASS_HID_4305] = 435,
+	[BNXT_ULP_CLASS_HID_3ed9] = 436,
+	[BNXT_ULP_CLASS_HID_39ed] = 437,
+	[BNXT_ULP_CLASS_HID_34a1] = 438,
+	[BNXT_ULP_CLASS_HID_236d] = 439,
+	[BNXT_ULP_CLASS_HID_1e21] = 440,
+	[BNXT_ULP_CLASS_HID_19f5] = 441,
+	[BNXT_ULP_CLASS_HID_1489] = 442,
+	[BNXT_ULP_CLASS_HID_2539] = 443,
+	[BNXT_ULP_CLASS_HID_2bf5] = 444,
+	[BNXT_ULP_CLASS_HID_b6af] = 445,
+	[BNXT_ULP_CLASS_HID_b1d3] = 446,
+	[BNXT_ULP_CLASS_HID_1c7d3] = 447,
+	[BNXT_ULP_CLASS_HID_1ccaf] = 448,
+	[BNXT_ULP_CLASS_HID_da33] = 449,
+	[BNXT_ULP_CLASS_HID_d567] = 450,
+	[BNXT_ULP_CLASS_HID_18eab] = 451,
+	[BNXT_ULP_CLASS_HID_19367] = 452,
+	[BNXT_ULP_CLASS_HID_a10b] = 453,
+	[BNXT_ULP_CLASS_HID_9c3f] = 454,
+	[BNXT_ULP_CLASS_HID_1b23f] = 455,
+	[BNXT_ULP_CLASS_HID_1b70b] = 456,
+	[BNXT_ULP_CLASS_HID_c49f] = 457,
+	[BNXT_ULP_CLASS_HID_bfc3] = 458,
+	[BNXT_ULP_CLASS_HID_1d5c3] = 459,
+	[BNXT_ULP_CLASS_HID_1da9f] = 460,
+	[BNXT_ULP_CLASS_HID_b063] = 461,
+	[BNXT_ULP_CLASS_HID_ab97] = 462,
+	[BNXT_ULP_CLASS_HID_1c197] = 463,
+	[BNXT_ULP_CLASS_HID_1c663] = 464,
+	[BNXT_ULP_CLASS_HID_d3f7] = 465,
+	[BNXT_ULP_CLASS_HID_cf3b] = 466,
+	[BNXT_ULP_CLASS_HID_1886f] = 467,
+	[BNXT_ULP_CLASS_HID_18d3b] = 468,
+	[BNXT_ULP_CLASS_HID_9acf] = 469,
+	[BNXT_ULP_CLASS_HID_95f3] = 470,
+	[BNXT_ULP_CLASS_HID_1abf3] = 471,
+	[BNXT_ULP_CLASS_HID_1b0cf] = 472,
+	[BNXT_ULP_CLASS_HID_be53] = 473,
+	[BNXT_ULP_CLASS_HID_b987] = 474,
+	[BNXT_ULP_CLASS_HID_1cf87] = 475,
+	[BNXT_ULP_CLASS_HID_1d453] = 476,
+	[BNXT_ULP_CLASS_HID_aa27] = 477,
+	[BNXT_ULP_CLASS_HID_a56b] = 478,
+	[BNXT_ULP_CLASS_HID_1bb6b] = 479,
+	[BNXT_ULP_CLASS_HID_1c027] = 480,
+	[BNXT_ULP_CLASS_HID_cdcb] = 481,
+	[BNXT_ULP_CLASS_HID_c8ff] = 482,
+	[BNXT_ULP_CLASS_HID_18223] = 483,
+	[BNXT_ULP_CLASS_HID_186ff] = 484,
+	[BNXT_ULP_CLASS_HID_9483] = 485,
+	[BNXT_ULP_CLASS_HID_8fb7] = 486,
+	[BNXT_ULP_CLASS_HID_1a5b7] = 487,
+	[BNXT_ULP_CLASS_HID_1aa83] = 488,
+	[BNXT_ULP_CLASS_HID_b817] = 489,
+	[BNXT_ULP_CLASS_HID_b35b] = 490,
+	[BNXT_ULP_CLASS_HID_1c95b] = 491,
+	[BNXT_ULP_CLASS_HID_1ce17] = 492,
+	[BNXT_ULP_CLASS_HID_a3fb] = 493,
+	[BNXT_ULP_CLASS_HID_9f2f] = 494,
+	[BNXT_ULP_CLASS_HID_1b52f] = 495,
+	[BNXT_ULP_CLASS_HID_1b9fb] = 496,
+	[BNXT_ULP_CLASS_HID_c78f] = 497,
+	[BNXT_ULP_CLASS_HID_c2b3] = 498,
+	[BNXT_ULP_CLASS_HID_1d8b3] = 499,
+	[BNXT_ULP_CLASS_HID_180b3] = 500,
+	[BNXT_ULP_CLASS_HID_8e47] = 501,
+	[BNXT_ULP_CLASS_HID_898b] = 502,
+	[BNXT_ULP_CLASS_HID_19f8b] = 503,
+	[BNXT_ULP_CLASS_HID_1a447] = 504,
+	[BNXT_ULP_CLASS_HID_b1eb] = 505,
+	[BNXT_ULP_CLASS_HID_ad1f] = 506,
+	[BNXT_ULP_CLASS_HID_1c31f] = 507,
+	[BNXT_ULP_CLASS_HID_1c7eb] = 508,
+	[BNXT_ULP_CLASS_HID_9137] = 509,
+	[BNXT_ULP_CLASS_HID_8c7b] = 510,
+	[BNXT_ULP_CLASS_HID_1a27b] = 511,
+	[BNXT_ULP_CLASS_HID_1a737] = 512,
+	[BNXT_ULP_CLASS_HID_b4db] = 513,
+	[BNXT_ULP_CLASS_HID_b00f] = 514,
+	[BNXT_ULP_CLASS_HID_1c60f] = 515,
+	[BNXT_ULP_CLASS_HID_1cadb] = 516,
+	[BNXT_ULP_CLASS_HID_8b0b] = 517,
+	[BNXT_ULP_CLASS_HID_863f] = 518,
+	[BNXT_ULP_CLASS_HID_19c3f] = 519,
+	[BNXT_ULP_CLASS_HID_1a10b] = 520,
+	[BNXT_ULP_CLASS_HID_ae9f] = 521,
+	[BNXT_ULP_CLASS_HID_a9c3] = 522,
+	[BNXT_ULP_CLASS_HID_1bfc3] = 523,
+	[BNXT_ULP_CLASS_HID_1c49f] = 524,
+	[BNXT_ULP_CLASS_HID_2563] = 525,
+	[BNXT_ULP_CLASS_HID_2baf] = 526,
+	[BNXT_ULP_CLASS_HID_4f33] = 527,
+	[BNXT_ULP_CLASS_HID_160b] = 528,
+	[BNXT_ULP_CLASS_HID_399f] = 529,
+	[BNXT_ULP_CLASS_HID_48f7] = 530,
+	[BNXT_ULP_CLASS_HID_0fcf] = 531,
+	[BNXT_ULP_CLASS_HID_3353] = 532,
+	[BNXT_ULP_CLASS_HID_b68f] = 533,
+	[BNXT_ULP_CLASS_HID_b94f] = 534,
+	[BNXT_ULP_CLASS_HID_fc0f] = 535,
+	[BNXT_ULP_CLASS_HID_fecf] = 536,
+	[BNXT_ULP_CLASS_HID_b1f3] = 537,
+	[BNXT_ULP_CLASS_HID_b4b3] = 538,
+	[BNXT_ULP_CLASS_HID_f773] = 539,
+	[BNXT_ULP_CLASS_HID_fa33] = 540,
+	[BNXT_ULP_CLASS_HID_1c7f3] = 541,
+	[BNXT_ULP_CLASS_HID_1eab3] = 542,
+	[BNXT_ULP_CLASS_HID_1cd73] = 543,
+	[BNXT_ULP_CLASS_HID_1f033] = 544,
+	[BNXT_ULP_CLASS_HID_1cc8f] = 545,
+	[BNXT_ULP_CLASS_HID_1ef4f] = 546,
+	[BNXT_ULP_CLASS_HID_1d20f] = 547,
+	[BNXT_ULP_CLASS_HID_1f4cf] = 548,
+	[BNXT_ULP_CLASS_HID_da13] = 549,
+	[BNXT_ULP_CLASS_HID_a007] = 550,
+	[BNXT_ULP_CLASS_HID_c2c7] = 551,
+	[BNXT_ULP_CLASS_HID_e587] = 552,
+	[BNXT_ULP_CLASS_HID_d547] = 553,
+	[BNXT_ULP_CLASS_HID_f807] = 554,
+	[BNXT_ULP_CLASS_HID_dac7] = 555,
+	[BNXT_ULP_CLASS_HID_e0cb] = 556,
+	[BNXT_ULP_CLASS_HID_18e8b] = 557,
+	[BNXT_ULP_CLASS_HID_1b14b] = 558,
+	[BNXT_ULP_CLASS_HID_1d40b] = 559,
+	[BNXT_ULP_CLASS_HID_1f6cb] = 560,
+	[BNXT_ULP_CLASS_HID_19347] = 561,
+	[BNXT_ULP_CLASS_HID_1b607] = 562,
+	[BNXT_ULP_CLASS_HID_1d8c7] = 563,
+	[BNXT_ULP_CLASS_HID_1fb87] = 564,
+	[BNXT_ULP_CLASS_HID_a12b] = 565,
+	[BNXT_ULP_CLASS_HID_a3eb] = 566,
+	[BNXT_ULP_CLASS_HID_e6ab] = 567,
+	[BNXT_ULP_CLASS_HID_e96b] = 568,
+	[BNXT_ULP_CLASS_HID_9c1f] = 569,
+	[BNXT_ULP_CLASS_HID_bedf] = 570,
+	[BNXT_ULP_CLASS_HID_e19f] = 571,
+	[BNXT_ULP_CLASS_HID_e45f] = 572,
+	[BNXT_ULP_CLASS_HID_1b21f] = 573,
+	[BNXT_ULP_CLASS_HID_1b4df] = 574,
+	[BNXT_ULP_CLASS_HID_1f79f] = 575,
+	[BNXT_ULP_CLASS_HID_1fa5f] = 576,
+	[BNXT_ULP_CLASS_HID_1b72b] = 577,
+	[BNXT_ULP_CLASS_HID_1b9eb] = 578,
+	[BNXT_ULP_CLASS_HID_1fcab] = 579,
+	[BNXT_ULP_CLASS_HID_1ff6b] = 580,
+	[BNXT_ULP_CLASS_HID_c4bf] = 581,
+	[BNXT_ULP_CLASS_HID_e77f] = 582,
+	[BNXT_ULP_CLASS_HID_ca3f] = 583,
+	[BNXT_ULP_CLASS_HID_ecff] = 584,
+	[BNXT_ULP_CLASS_HID_bfe3] = 585,
+	[BNXT_ULP_CLASS_HID_e2a3] = 586,
+	[BNXT_ULP_CLASS_HID_c563] = 587,
+	[BNXT_ULP_CLASS_HID_e823] = 588,
+	[BNXT_ULP_CLASS_HID_1d5e3] = 589,
+	[BNXT_ULP_CLASS_HID_1f8a3] = 590,
+	[BNXT_ULP_CLASS_HID_1db63] = 591,
+	[BNXT_ULP_CLASS_HID_1e117] = 592,
+	[BNXT_ULP_CLASS_HID_1dabf] = 593,
+	[BNXT_ULP_CLASS_HID_1a0a3] = 594,
+	[BNXT_ULP_CLASS_HID_1c363] = 595,
+	[BNXT_ULP_CLASS_HID_1e623] = 596,
+	[BNXT_ULP_CLASS_HID_b043] = 597,
+	[BNXT_ULP_CLASS_HID_b303] = 598,
+	[BNXT_ULP_CLASS_HID_f5c3] = 599,
+	[BNXT_ULP_CLASS_HID_f883] = 600,
+	[BNXT_ULP_CLASS_HID_abb7] = 601,
+	[BNXT_ULP_CLASS_HID_ae77] = 602,
+	[BNXT_ULP_CLASS_HID_f137] = 603,
+	[BNXT_ULP_CLASS_HID_f3f7] = 604,
+	[BNXT_ULP_CLASS_HID_1c1b7] = 605,
+	[BNXT_ULP_CLASS_HID_1e477] = 606,
+	[BNXT_ULP_CLASS_HID_1c737] = 607,
+	[BNXT_ULP_CLASS_HID_1e9f7] = 608,
+	[BNXT_ULP_CLASS_HID_1c643] = 609,
+	[BNXT_ULP_CLASS_HID_1e903] = 610,
+	[BNXT_ULP_CLASS_HID_1cbc3] = 611,
+	[BNXT_ULP_CLASS_HID_1ee83] = 612,
+	[BNXT_ULP_CLASS_HID_d3d7] = 613,
+	[BNXT_ULP_CLASS_HID_f697] = 614,
+	[BNXT_ULP_CLASS_HID_d957] = 615,
+	[BNXT_ULP_CLASS_HID_fc17] = 616,
+	[BNXT_ULP_CLASS_HID_cf1b] = 617,
+	[BNXT_ULP_CLASS_HID_f1db] = 618,
+	[BNXT_ULP_CLASS_HID_d49b] = 619,
+	[BNXT_ULP_CLASS_HID_f75b] = 620,
+	[BNXT_ULP_CLASS_HID_1884f] = 621,
+	[BNXT_ULP_CLASS_HID_1ab0f] = 622,
+	[BNXT_ULP_CLASS_HID_1cdcf] = 623,
+	[BNXT_ULP_CLASS_HID_1f08f] = 624,
+	[BNXT_ULP_CLASS_HID_18d1b] = 625,
+	[BNXT_ULP_CLASS_HID_1afdb] = 626,
+	[BNXT_ULP_CLASS_HID_1d29b] = 627,
+	[BNXT_ULP_CLASS_HID_1f55b] = 628,
+	[BNXT_ULP_CLASS_HID_9aef] = 629,
+	[BNXT_ULP_CLASS_HID_bdaf] = 630,
+	[BNXT_ULP_CLASS_HID_e06f] = 631,
+	[BNXT_ULP_CLASS_HID_e32f] = 632,
+	[BNXT_ULP_CLASS_HID_95d3] = 633,
+	[BNXT_ULP_CLASS_HID_b893] = 634,
+	[BNXT_ULP_CLASS_HID_db53] = 635,
+	[BNXT_ULP_CLASS_HID_fe13] = 636,
+	[BNXT_ULP_CLASS_HID_1abd3] = 637,
+	[BNXT_ULP_CLASS_HID_1ae93] = 638,
+	[BNXT_ULP_CLASS_HID_1f153] = 639,
+	[BNXT_ULP_CLASS_HID_1f413] = 640,
+	[BNXT_ULP_CLASS_HID_1b0ef] = 641,
+	[BNXT_ULP_CLASS_HID_1b3af] = 642,
+	[BNXT_ULP_CLASS_HID_1f66f] = 643,
+	[BNXT_ULP_CLASS_HID_1f92f] = 644,
+	[BNXT_ULP_CLASS_HID_be73] = 645,
+	[BNXT_ULP_CLASS_HID_e133] = 646,
+	[BNXT_ULP_CLASS_HID_c3f3] = 647,
+	[BNXT_ULP_CLASS_HID_e6b3] = 648,
+	[BNXT_ULP_CLASS_HID_b9a7] = 649,
+	[BNXT_ULP_CLASS_HID_bc67] = 650,
+	[BNXT_ULP_CLASS_HID_ff27] = 651,
+	[BNXT_ULP_CLASS_HID_e1e7] = 652,
+	[BNXT_ULP_CLASS_HID_1cfa7] = 653,
+	[BNXT_ULP_CLASS_HID_1f267] = 654,
+	[BNXT_ULP_CLASS_HID_1d527] = 655,
+	[BNXT_ULP_CLASS_HID_1f7e7] = 656,
+	[BNXT_ULP_CLASS_HID_1d473] = 657,
+	[BNXT_ULP_CLASS_HID_1f733] = 658,
+	[BNXT_ULP_CLASS_HID_1d9f3] = 659,
+	[BNXT_ULP_CLASS_HID_1fcb3] = 660,
+	[BNXT_ULP_CLASS_HID_aa07] = 661,
+	[BNXT_ULP_CLASS_HID_acc7] = 662,
+	[BNXT_ULP_CLASS_HID_ef87] = 663,
+	[BNXT_ULP_CLASS_HID_f247] = 664,
+	[BNXT_ULP_CLASS_HID_a54b] = 665,
+	[BNXT_ULP_CLASS_HID_a80b] = 666,
+	[BNXT_ULP_CLASS_HID_eacb] = 667,
+	[BNXT_ULP_CLASS_HID_ed8b] = 668,
+	[BNXT_ULP_CLASS_HID_1bb4b] = 669,
+	[BNXT_ULP_CLASS_HID_1be0b] = 670,
+	[BNXT_ULP_CLASS_HID_1c0cb] = 671,
+	[BNXT_ULP_CLASS_HID_1e38b] = 672,
+	[BNXT_ULP_CLASS_HID_1c007] = 673,
+	[BNXT_ULP_CLASS_HID_1e2c7] = 674,
+	[BNXT_ULP_CLASS_HID_1c587] = 675,
+	[BNXT_ULP_CLASS_HID_1e847] = 676,
+	[BNXT_ULP_CLASS_HID_cdeb] = 677,
+	[BNXT_ULP_CLASS_HID_f0ab] = 678,
+	[BNXT_ULP_CLASS_HID_d36b] = 679,
+	[BNXT_ULP_CLASS_HID_f62b] = 680,
+	[BNXT_ULP_CLASS_HID_c8df] = 681,
+	[BNXT_ULP_CLASS_HID_eb9f] = 682,
+	[BNXT_ULP_CLASS_HID_ce5f] = 683,
+	[BNXT_ULP_CLASS_HID_f11f] = 684,
+	[BNXT_ULP_CLASS_HID_18203] = 685,
+	[BNXT_ULP_CLASS_HID_1a4c3] = 686,
+	[BNXT_ULP_CLASS_HID_1c783] = 687,
+	[BNXT_ULP_CLASS_HID_1ea43] = 688,
+	[BNXT_ULP_CLASS_HID_186df] = 689,
+	[BNXT_ULP_CLASS_HID_1a99f] = 690,
+	[BNXT_ULP_CLASS_HID_1cc5f] = 691,
+	[BNXT_ULP_CLASS_HID_1ef1f] = 692,
+	[BNXT_ULP_CLASS_HID_94a3] = 693,
+	[BNXT_ULP_CLASS_HID_b763] = 694,
+	[BNXT_ULP_CLASS_HID_da23] = 695,
+	[BNXT_ULP_CLASS_HID_fce3] = 696,
+	[BNXT_ULP_CLASS_HID_8f97] = 697,
+	[BNXT_ULP_CLASS_HID_b257] = 698,
+	[BNXT_ULP_CLASS_HID_d517] = 699,
+	[BNXT_ULP_CLASS_HID_f7d7] = 700,
+	[BNXT_ULP_CLASS_HID_1a597] = 701,
+	[BNXT_ULP_CLASS_HID_1a857] = 702,
+	[BNXT_ULP_CLASS_HID_1eb17] = 703,
+	[BNXT_ULP_CLASS_HID_1edd7] = 704,
+	[BNXT_ULP_CLASS_HID_1aaa3] = 705,
+	[BNXT_ULP_CLASS_HID_1ad63] = 706,
+	[BNXT_ULP_CLASS_HID_1f023] = 707,
+	[BNXT_ULP_CLASS_HID_1f2e3] = 708,
+	[BNXT_ULP_CLASS_HID_b837] = 709,
+	[BNXT_ULP_CLASS_HID_baf7] = 710,
+	[BNXT_ULP_CLASS_HID_fdb7] = 711,
+	[BNXT_ULP_CLASS_HID_e077] = 712,
+	[BNXT_ULP_CLASS_HID_b37b] = 713,
+	[BNXT_ULP_CLASS_HID_b63b] = 714,
+	[BNXT_ULP_CLASS_HID_f8fb] = 715,
+	[BNXT_ULP_CLASS_HID_fbbb] = 716,
+	[BNXT_ULP_CLASS_HID_1c97b] = 717,
+	[BNXT_ULP_CLASS_HID_1ec3b] = 718,
+	[BNXT_ULP_CLASS_HID_1cefb] = 719,
+	[BNXT_ULP_CLASS_HID_1f1bb] = 720,
+	[BNXT_ULP_CLASS_HID_1ce37] = 721,
+	[BNXT_ULP_CLASS_HID_1f0f7] = 722,
+	[BNXT_ULP_CLASS_HID_1d3b7] = 723,
+	[BNXT_ULP_CLASS_HID_1f677] = 724,
+	[BNXT_ULP_CLASS_HID_a3db] = 725,
+	[BNXT_ULP_CLASS_HID_a69b] = 726,
+	[BNXT_ULP_CLASS_HID_e95b] = 727,
+	[BNXT_ULP_CLASS_HID_ec1b] = 728,
+	[BNXT_ULP_CLASS_HID_9f0f] = 729,
+	[BNXT_ULP_CLASS_HID_a1cf] = 730,
+	[BNXT_ULP_CLASS_HID_e48f] = 731,
+	[BNXT_ULP_CLASS_HID_e74f] = 732,
+	[BNXT_ULP_CLASS_HID_1b50f] = 733,
+	[BNXT_ULP_CLASS_HID_1b7cf] = 734,
+	[BNXT_ULP_CLASS_HID_1fa8f] = 735,
+	[BNXT_ULP_CLASS_HID_1fd4f] = 736,
+	[BNXT_ULP_CLASS_HID_1b9db] = 737,
+	[BNXT_ULP_CLASS_HID_1bc9b] = 738,
+	[BNXT_ULP_CLASS_HID_1ff5b] = 739,
+	[BNXT_ULP_CLASS_HID_1e21b] = 740,
+	[BNXT_ULP_CLASS_HID_c7af] = 741,
+	[BNXT_ULP_CLASS_HID_ea6f] = 742,
+	[BNXT_ULP_CLASS_HID_cd2f] = 743,
+	[BNXT_ULP_CLASS_HID_efef] = 744,
+	[BNXT_ULP_CLASS_HID_c293] = 745,
+	[BNXT_ULP_CLASS_HID_e553] = 746,
+	[BNXT_ULP_CLASS_HID_c813] = 747,
+	[BNXT_ULP_CLASS_HID_ead3] = 748,
+	[BNXT_ULP_CLASS_HID_1d893] = 749,
+	[BNXT_ULP_CLASS_HID_1fb53] = 750,
+	[BNXT_ULP_CLASS_HID_1c147] = 751,
+	[BNXT_ULP_CLASS_HID_1e407] = 752,
+	[BNXT_ULP_CLASS_HID_18093] = 753,
+	[BNXT_ULP_CLASS_HID_1a353] = 754,
+	[BNXT_ULP_CLASS_HID_1c613] = 755,
+	[BNXT_ULP_CLASS_HID_1e8d3] = 756,
+	[BNXT_ULP_CLASS_HID_8e67] = 757,
+	[BNXT_ULP_CLASS_HID_b127] = 758,
+	[BNXT_ULP_CLASS_HID_d3e7] = 759,
+	[BNXT_ULP_CLASS_HID_f6a7] = 760,
+	[BNXT_ULP_CLASS_HID_89ab] = 761,
+	[BNXT_ULP_CLASS_HID_ac6b] = 762,
+	[BNXT_ULP_CLASS_HID_cf2b] = 763,
+	[BNXT_ULP_CLASS_HID_f1eb] = 764,
+	[BNXT_ULP_CLASS_HID_19fab] = 765,
+	[BNXT_ULP_CLASS_HID_1a26b] = 766,
+	[BNXT_ULP_CLASS_HID_1e52b] = 767,
+	[BNXT_ULP_CLASS_HID_1e7eb] = 768,
+	[BNXT_ULP_CLASS_HID_1a467] = 769,
+	[BNXT_ULP_CLASS_HID_1a727] = 770,
+	[BNXT_ULP_CLASS_HID_1e9e7] = 771,
+	[BNXT_ULP_CLASS_HID_1eca7] = 772,
+	[BNXT_ULP_CLASS_HID_b1cb] = 773,
+	[BNXT_ULP_CLASS_HID_b48b] = 774,
+	[BNXT_ULP_CLASS_HID_f74b] = 775,
+	[BNXT_ULP_CLASS_HID_fa0b] = 776,
+	[BNXT_ULP_CLASS_HID_ad3f] = 777,
+	[BNXT_ULP_CLASS_HID_afff] = 778,
+	[BNXT_ULP_CLASS_HID_f2bf] = 779,
+	[BNXT_ULP_CLASS_HID_f57f] = 780,
+	[BNXT_ULP_CLASS_HID_1c33f] = 781,
+	[BNXT_ULP_CLASS_HID_1e5ff] = 782,
+	[BNXT_ULP_CLASS_HID_1c8bf] = 783,
+	[BNXT_ULP_CLASS_HID_1eb7f] = 784,
+	[BNXT_ULP_CLASS_HID_1c7cb] = 785,
+	[BNXT_ULP_CLASS_HID_1ea8b] = 786,
+	[BNXT_ULP_CLASS_HID_1cd4b] = 787,
+	[BNXT_ULP_CLASS_HID_1f00b] = 788,
+	[BNXT_ULP_CLASS_HID_9117] = 789,
+	[BNXT_ULP_CLASS_HID_b3d7] = 790,
+	[BNXT_ULP_CLASS_HID_d697] = 791,
+	[BNXT_ULP_CLASS_HID_f957] = 792,
+	[BNXT_ULP_CLASS_HID_8c5b] = 793,
+	[BNXT_ULP_CLASS_HID_af1b] = 794,
+	[BNXT_ULP_CLASS_HID_d1db] = 795,
+	[BNXT_ULP_CLASS_HID_f49b] = 796,
+	[BNXT_ULP_CLASS_HID_1a25b] = 797,
+	[BNXT_ULP_CLASS_HID_1a51b] = 798,
+	[BNXT_ULP_CLASS_HID_1e7db] = 799,
+	[BNXT_ULP_CLASS_HID_1ea9b] = 800,
+	[BNXT_ULP_CLASS_HID_1a717] = 801,
+	[BNXT_ULP_CLASS_HID_1a9d7] = 802,
+	[BNXT_ULP_CLASS_HID_1ec97] = 803,
+	[BNXT_ULP_CLASS_HID_1ef57] = 804,
+	[BNXT_ULP_CLASS_HID_b4fb] = 805,
+	[BNXT_ULP_CLASS_HID_b7bb] = 806,
+	[BNXT_ULP_CLASS_HID_fa7b] = 807,
+	[BNXT_ULP_CLASS_HID_fd3b] = 808,
+	[BNXT_ULP_CLASS_HID_b02f] = 809,
+	[BNXT_ULP_CLASS_HID_b2ef] = 810,
+	[BNXT_ULP_CLASS_HID_f5af] = 811,
+	[BNXT_ULP_CLASS_HID_f86f] = 812,
+	[BNXT_ULP_CLASS_HID_1c62f] = 813,
+	[BNXT_ULP_CLASS_HID_1e8ef] = 814,
+	[BNXT_ULP_CLASS_HID_1cbaf] = 815,
+	[BNXT_ULP_CLASS_HID_1ee6f] = 816,
+	[BNXT_ULP_CLASS_HID_1cafb] = 817,
+	[BNXT_ULP_CLASS_HID_1edbb] = 818,
+	[BNXT_ULP_CLASS_HID_1d07b] = 819,
+	[BNXT_ULP_CLASS_HID_1f33b] = 820,
+	[BNXT_ULP_CLASS_HID_8b2b] = 821,
+	[BNXT_ULP_CLASS_HID_adeb] = 822,
+	[BNXT_ULP_CLASS_HID_d0ab] = 823,
+	[BNXT_ULP_CLASS_HID_f36b] = 824,
+	[BNXT_ULP_CLASS_HID_861f] = 825,
+	[BNXT_ULP_CLASS_HID_a8df] = 826,
+	[BNXT_ULP_CLASS_HID_cb9f] = 827,
+	[BNXT_ULP_CLASS_HID_ee5f] = 828,
+	[BNXT_ULP_CLASS_HID_19c1f] = 829,
+	[BNXT_ULP_CLASS_HID_1bedf] = 830,
+	[BNXT_ULP_CLASS_HID_1e19f] = 831,
+	[BNXT_ULP_CLASS_HID_1e45f] = 832,
+	[BNXT_ULP_CLASS_HID_1a12b] = 833,
+	[BNXT_ULP_CLASS_HID_1a3eb] = 834,
+	[BNXT_ULP_CLASS_HID_1e6ab] = 835,
+	[BNXT_ULP_CLASS_HID_1e96b] = 836,
+	[BNXT_ULP_CLASS_HID_aebf] = 837,
+	[BNXT_ULP_CLASS_HID_b17f] = 838,
+	[BNXT_ULP_CLASS_HID_f43f] = 839,
+	[BNXT_ULP_CLASS_HID_f6ff] = 840,
+	[BNXT_ULP_CLASS_HID_a9e3] = 841,
+	[BNXT_ULP_CLASS_HID_aca3] = 842,
+	[BNXT_ULP_CLASS_HID_ef63] = 843,
+	[BNXT_ULP_CLASS_HID_f223] = 844,
+	[BNXT_ULP_CLASS_HID_1bfe3] = 845,
+	[BNXT_ULP_CLASS_HID_1e2a3] = 846,
+	[BNXT_ULP_CLASS_HID_1c563] = 847,
+	[BNXT_ULP_CLASS_HID_1e823] = 848,
+	[BNXT_ULP_CLASS_HID_1c4bf] = 849,
+	[BNXT_ULP_CLASS_HID_1e77f] = 850,
+	[BNXT_ULP_CLASS_HID_1ca3f] = 851,
+	[BNXT_ULP_CLASS_HID_1ecff] = 852,
+	[BNXT_ULP_CLASS_HID_2543] = 853,
+	[BNXT_ULP_CLASS_HID_2b8f] = 854,
+	[BNXT_ULP_CLASS_HID_4f13] = 855,
+	[BNXT_ULP_CLASS_HID_162b] = 856,
+	[BNXT_ULP_CLASS_HID_39bf] = 857,
+	[BNXT_ULP_CLASS_HID_48d7] = 858,
+	[BNXT_ULP_CLASS_HID_0fef] = 859,
+	[BNXT_ULP_CLASS_HID_3373] = 860,
+	[BNXT_ULP_CLASS_HID_b6ef] = 861,
+	[BNXT_ULP_CLASS_HID_b92f] = 862,
+	[BNXT_ULP_CLASS_HID_fc6f] = 863,
+	[BNXT_ULP_CLASS_HID_feaf] = 864,
+	[BNXT_ULP_CLASS_HID_b193] = 865,
+	[BNXT_ULP_CLASS_HID_b4d3] = 866,
+	[BNXT_ULP_CLASS_HID_f713] = 867,
+	[BNXT_ULP_CLASS_HID_fa53] = 868,
+	[BNXT_ULP_CLASS_HID_1c793] = 869,
+	[BNXT_ULP_CLASS_HID_1ead3] = 870,
+	[BNXT_ULP_CLASS_HID_1cd13] = 871,
+	[BNXT_ULP_CLASS_HID_1f053] = 872,
+	[BNXT_ULP_CLASS_HID_1ccef] = 873,
+	[BNXT_ULP_CLASS_HID_1ef2f] = 874,
+	[BNXT_ULP_CLASS_HID_1d26f] = 875,
+	[BNXT_ULP_CLASS_HID_1f4af] = 876,
+	[BNXT_ULP_CLASS_HID_da73] = 877,
+	[BNXT_ULP_CLASS_HID_a067] = 878,
+	[BNXT_ULP_CLASS_HID_c2a7] = 879,
+	[BNXT_ULP_CLASS_HID_e5e7] = 880,
+	[BNXT_ULP_CLASS_HID_d527] = 881,
+	[BNXT_ULP_CLASS_HID_f867] = 882,
+	[BNXT_ULP_CLASS_HID_daa7] = 883,
+	[BNXT_ULP_CLASS_HID_e0ab] = 884,
+	[BNXT_ULP_CLASS_HID_18eeb] = 885,
+	[BNXT_ULP_CLASS_HID_1b12b] = 886,
+	[BNXT_ULP_CLASS_HID_1d46b] = 887,
+	[BNXT_ULP_CLASS_HID_1f6ab] = 888,
+	[BNXT_ULP_CLASS_HID_19327] = 889,
+	[BNXT_ULP_CLASS_HID_1b667] = 890,
+	[BNXT_ULP_CLASS_HID_1d8a7] = 891,
+	[BNXT_ULP_CLASS_HID_1fbe7] = 892,
+	[BNXT_ULP_CLASS_HID_a14b] = 893,
+	[BNXT_ULP_CLASS_HID_a38b] = 894,
+	[BNXT_ULP_CLASS_HID_e6cb] = 895,
+	[BNXT_ULP_CLASS_HID_e90b] = 896,
+	[BNXT_ULP_CLASS_HID_9c7f] = 897,
+	[BNXT_ULP_CLASS_HID_bebf] = 898,
+	[BNXT_ULP_CLASS_HID_e1ff] = 899,
+	[BNXT_ULP_CLASS_HID_e43f] = 900,
+	[BNXT_ULP_CLASS_HID_1b27f] = 901,
+	[BNXT_ULP_CLASS_HID_1b4bf] = 902,
+	[BNXT_ULP_CLASS_HID_1f7ff] = 903,
+	[BNXT_ULP_CLASS_HID_1fa3f] = 904,
+	[BNXT_ULP_CLASS_HID_1b74b] = 905,
+	[BNXT_ULP_CLASS_HID_1b98b] = 906,
+	[BNXT_ULP_CLASS_HID_1fccb] = 907,
+	[BNXT_ULP_CLASS_HID_1ff0b] = 908,
+	[BNXT_ULP_CLASS_HID_c4df] = 909,
+	[BNXT_ULP_CLASS_HID_e71f] = 910,
+	[BNXT_ULP_CLASS_HID_ca5f] = 911,
+	[BNXT_ULP_CLASS_HID_ec9f] = 912,
+	[BNXT_ULP_CLASS_HID_bf83] = 913,
+	[BNXT_ULP_CLASS_HID_e2c3] = 914,
+	[BNXT_ULP_CLASS_HID_c503] = 915,
+	[BNXT_ULP_CLASS_HID_e843] = 916,
+	[BNXT_ULP_CLASS_HID_1d583] = 917,
+	[BNXT_ULP_CLASS_HID_1f8c3] = 918,
+	[BNXT_ULP_CLASS_HID_1db03] = 919,
+	[BNXT_ULP_CLASS_HID_1e177] = 920,
+	[BNXT_ULP_CLASS_HID_1dadf] = 921,
+	[BNXT_ULP_CLASS_HID_1a0c3] = 922,
+	[BNXT_ULP_CLASS_HID_1c303] = 923,
+	[BNXT_ULP_CLASS_HID_1e643] = 924,
+	[BNXT_ULP_CLASS_HID_b023] = 925,
+	[BNXT_ULP_CLASS_HID_b363] = 926,
+	[BNXT_ULP_CLASS_HID_f5a3] = 927,
+	[BNXT_ULP_CLASS_HID_f8e3] = 928,
+	[BNXT_ULP_CLASS_HID_abd7] = 929,
+	[BNXT_ULP_CLASS_HID_ae17] = 930,
+	[BNXT_ULP_CLASS_HID_f157] = 931,
+	[BNXT_ULP_CLASS_HID_f397] = 932,
+	[BNXT_ULP_CLASS_HID_1c1d7] = 933,
+	[BNXT_ULP_CLASS_HID_1e417] = 934,
+	[BNXT_ULP_CLASS_HID_1c757] = 935,
+	[BNXT_ULP_CLASS_HID_1e997] = 936,
+	[BNXT_ULP_CLASS_HID_1c623] = 937,
+	[BNXT_ULP_CLASS_HID_1e963] = 938,
+	[BNXT_ULP_CLASS_HID_1cba3] = 939,
+	[BNXT_ULP_CLASS_HID_1eee3] = 940,
+	[BNXT_ULP_CLASS_HID_d3b7] = 941,
+	[BNXT_ULP_CLASS_HID_f6f7] = 942,
+	[BNXT_ULP_CLASS_HID_d937] = 943,
+	[BNXT_ULP_CLASS_HID_fc77] = 944,
+	[BNXT_ULP_CLASS_HID_cf7b] = 945,
+	[BNXT_ULP_CLASS_HID_f1bb] = 946,
+	[BNXT_ULP_CLASS_HID_d4fb] = 947,
+	[BNXT_ULP_CLASS_HID_f73b] = 948,
+	[BNXT_ULP_CLASS_HID_1882f] = 949,
+	[BNXT_ULP_CLASS_HID_1ab6f] = 950,
+	[BNXT_ULP_CLASS_HID_1cdaf] = 951,
+	[BNXT_ULP_CLASS_HID_1f0ef] = 952,
+	[BNXT_ULP_CLASS_HID_18d7b] = 953,
+	[BNXT_ULP_CLASS_HID_1afbb] = 954,
+	[BNXT_ULP_CLASS_HID_1d2fb] = 955,
+	[BNXT_ULP_CLASS_HID_1f53b] = 956,
+	[BNXT_ULP_CLASS_HID_9a8f] = 957,
+	[BNXT_ULP_CLASS_HID_bdcf] = 958,
+	[BNXT_ULP_CLASS_HID_e00f] = 959,
+	[BNXT_ULP_CLASS_HID_e34f] = 960,
+	[BNXT_ULP_CLASS_HID_95b3] = 961,
+	[BNXT_ULP_CLASS_HID_b8f3] = 962,
+	[BNXT_ULP_CLASS_HID_db33] = 963,
+	[BNXT_ULP_CLASS_HID_fe73] = 964,
+	[BNXT_ULP_CLASS_HID_1abb3] = 965,
+	[BNXT_ULP_CLASS_HID_1aef3] = 966,
+	[BNXT_ULP_CLASS_HID_1f133] = 967,
+	[BNXT_ULP_CLASS_HID_1f473] = 968,
+	[BNXT_ULP_CLASS_HID_1b08f] = 969,
+	[BNXT_ULP_CLASS_HID_1b3cf] = 970,
+	[BNXT_ULP_CLASS_HID_1f60f] = 971,
+	[BNXT_ULP_CLASS_HID_1f94f] = 972,
+	[BNXT_ULP_CLASS_HID_be13] = 973,
+	[BNXT_ULP_CLASS_HID_e153] = 974,
+	[BNXT_ULP_CLASS_HID_c393] = 975,
+	[BNXT_ULP_CLASS_HID_e6d3] = 976,
+	[BNXT_ULP_CLASS_HID_b9c7] = 977,
+	[BNXT_ULP_CLASS_HID_bc07] = 978,
+	[BNXT_ULP_CLASS_HID_ff47] = 979,
+	[BNXT_ULP_CLASS_HID_e187] = 980,
+	[BNXT_ULP_CLASS_HID_1cfc7] = 981,
+	[BNXT_ULP_CLASS_HID_1f207] = 982,
+	[BNXT_ULP_CLASS_HID_1d547] = 983,
+	[BNXT_ULP_CLASS_HID_1f787] = 984,
+	[BNXT_ULP_CLASS_HID_1d413] = 985,
+	[BNXT_ULP_CLASS_HID_1f753] = 986,
+	[BNXT_ULP_CLASS_HID_1d993] = 987,
+	[BNXT_ULP_CLASS_HID_1fcd3] = 988,
+	[BNXT_ULP_CLASS_HID_aa67] = 989,
+	[BNXT_ULP_CLASS_HID_aca7] = 990,
+	[BNXT_ULP_CLASS_HID_efe7] = 991,
+	[BNXT_ULP_CLASS_HID_f227] = 992,
+	[BNXT_ULP_CLASS_HID_a52b] = 993,
+	[BNXT_ULP_CLASS_HID_a86b] = 994,
+	[BNXT_ULP_CLASS_HID_eaab] = 995,
+	[BNXT_ULP_CLASS_HID_edeb] = 996,
+	[BNXT_ULP_CLASS_HID_1bb2b] = 997,
+	[BNXT_ULP_CLASS_HID_1be6b] = 998,
+	[BNXT_ULP_CLASS_HID_1c0ab] = 999,
+	[BNXT_ULP_CLASS_HID_1e3eb] = 1000,
+	[BNXT_ULP_CLASS_HID_1c067] = 1001,
+	[BNXT_ULP_CLASS_HID_1e2a7] = 1002,
+	[BNXT_ULP_CLASS_HID_1c5e7] = 1003,
+	[BNXT_ULP_CLASS_HID_1e827] = 1004,
+	[BNXT_ULP_CLASS_HID_cd8b] = 1005,
+	[BNXT_ULP_CLASS_HID_f0cb] = 1006,
+	[BNXT_ULP_CLASS_HID_d30b] = 1007,
+	[BNXT_ULP_CLASS_HID_f64b] = 1008,
+	[BNXT_ULP_CLASS_HID_c8bf] = 1009,
+	[BNXT_ULP_CLASS_HID_ebff] = 1010,
+	[BNXT_ULP_CLASS_HID_ce3f] = 1011,
+	[BNXT_ULP_CLASS_HID_f17f] = 1012,
+	[BNXT_ULP_CLASS_HID_18263] = 1013,
+	[BNXT_ULP_CLASS_HID_1a4a3] = 1014,
+	[BNXT_ULP_CLASS_HID_1c7e3] = 1015,
+	[BNXT_ULP_CLASS_HID_1ea23] = 1016,
+	[BNXT_ULP_CLASS_HID_186bf] = 1017,
+	[BNXT_ULP_CLASS_HID_1a9ff] = 1018,
+	[BNXT_ULP_CLASS_HID_1cc3f] = 1019,
+	[BNXT_ULP_CLASS_HID_1ef7f] = 1020,
+	[BNXT_ULP_CLASS_HID_94c3] = 1021,
+	[BNXT_ULP_CLASS_HID_b703] = 1022,
+	[BNXT_ULP_CLASS_HID_da43] = 1023,
+	[BNXT_ULP_CLASS_HID_fc83] = 1024,
+	[BNXT_ULP_CLASS_HID_8ff7] = 1025,
+	[BNXT_ULP_CLASS_HID_b237] = 1026,
+	[BNXT_ULP_CLASS_HID_d577] = 1027,
+	[BNXT_ULP_CLASS_HID_f7b7] = 1028,
+	[BNXT_ULP_CLASS_HID_1a5f7] = 1029,
+	[BNXT_ULP_CLASS_HID_1a837] = 1030,
+	[BNXT_ULP_CLASS_HID_1eb77] = 1031,
+	[BNXT_ULP_CLASS_HID_1edb7] = 1032,
+	[BNXT_ULP_CLASS_HID_1aac3] = 1033,
+	[BNXT_ULP_CLASS_HID_1ad03] = 1034,
+	[BNXT_ULP_CLASS_HID_1f043] = 1035,
+	[BNXT_ULP_CLASS_HID_1f283] = 1036,
+	[BNXT_ULP_CLASS_HID_b857] = 1037,
+	[BNXT_ULP_CLASS_HID_ba97] = 1038,
+	[BNXT_ULP_CLASS_HID_fdd7] = 1039,
+	[BNXT_ULP_CLASS_HID_e017] = 1040,
+	[BNXT_ULP_CLASS_HID_b31b] = 1041,
+	[BNXT_ULP_CLASS_HID_b65b] = 1042,
+	[BNXT_ULP_CLASS_HID_f89b] = 1043,
+	[BNXT_ULP_CLASS_HID_fbdb] = 1044,
+	[BNXT_ULP_CLASS_HID_1c91b] = 1045,
+	[BNXT_ULP_CLASS_HID_1ec5b] = 1046,
+	[BNXT_ULP_CLASS_HID_1ce9b] = 1047,
+	[BNXT_ULP_CLASS_HID_1f1db] = 1048,
+	[BNXT_ULP_CLASS_HID_1ce57] = 1049,
+	[BNXT_ULP_CLASS_HID_1f097] = 1050,
+	[BNXT_ULP_CLASS_HID_1d3d7] = 1051,
+	[BNXT_ULP_CLASS_HID_1f617] = 1052,
+	[BNXT_ULP_CLASS_HID_a3bb] = 1053,
+	[BNXT_ULP_CLASS_HID_a6fb] = 1054,
+	[BNXT_ULP_CLASS_HID_e93b] = 1055,
+	[BNXT_ULP_CLASS_HID_ec7b] = 1056,
+	[BNXT_ULP_CLASS_HID_9f6f] = 1057,
+	[BNXT_ULP_CLASS_HID_a1af] = 1058,
+	[BNXT_ULP_CLASS_HID_e4ef] = 1059,
+	[BNXT_ULP_CLASS_HID_e72f] = 1060,
+	[BNXT_ULP_CLASS_HID_1b56f] = 1061,
+	[BNXT_ULP_CLASS_HID_1b7af] = 1062,
+	[BNXT_ULP_CLASS_HID_1faef] = 1063,
+	[BNXT_ULP_CLASS_HID_1fd2f] = 1064,
+	[BNXT_ULP_CLASS_HID_1b9bb] = 1065,
+	[BNXT_ULP_CLASS_HID_1bcfb] = 1066,
+	[BNXT_ULP_CLASS_HID_1ff3b] = 1067,
+	[BNXT_ULP_CLASS_HID_1e27b] = 1068,
+	[BNXT_ULP_CLASS_HID_c7cf] = 1069,
+	[BNXT_ULP_CLASS_HID_ea0f] = 1070,
+	[BNXT_ULP_CLASS_HID_cd4f] = 1071,
+	[BNXT_ULP_CLASS_HID_ef8f] = 1072,
+	[BNXT_ULP_CLASS_HID_c2f3] = 1073,
+	[BNXT_ULP_CLASS_HID_e533] = 1074,
+	[BNXT_ULP_CLASS_HID_c873] = 1075,
+	[BNXT_ULP_CLASS_HID_eab3] = 1076,
+	[BNXT_ULP_CLASS_HID_1d8f3] = 1077,
+	[BNXT_ULP_CLASS_HID_1fb33] = 1078,
+	[BNXT_ULP_CLASS_HID_1c127] = 1079,
+	[BNXT_ULP_CLASS_HID_1e467] = 1080,
+	[BNXT_ULP_CLASS_HID_180f3] = 1081,
+	[BNXT_ULP_CLASS_HID_1a333] = 1082,
+	[BNXT_ULP_CLASS_HID_1c673] = 1083,
+	[BNXT_ULP_CLASS_HID_1e8b3] = 1084,
+	[BNXT_ULP_CLASS_HID_8e07] = 1085,
+	[BNXT_ULP_CLASS_HID_b147] = 1086,
+	[BNXT_ULP_CLASS_HID_d387] = 1087,
+	[BNXT_ULP_CLASS_HID_f6c7] = 1088,
+	[BNXT_ULP_CLASS_HID_89cb] = 1089,
+	[BNXT_ULP_CLASS_HID_ac0b] = 1090,
+	[BNXT_ULP_CLASS_HID_cf4b] = 1091,
+	[BNXT_ULP_CLASS_HID_f18b] = 1092,
+	[BNXT_ULP_CLASS_HID_19fcb] = 1093,
+	[BNXT_ULP_CLASS_HID_1a20b] = 1094,
+	[BNXT_ULP_CLASS_HID_1e54b] = 1095,
+	[BNXT_ULP_CLASS_HID_1e78b] = 1096,
+	[BNXT_ULP_CLASS_HID_1a407] = 1097,
+	[BNXT_ULP_CLASS_HID_1a747] = 1098,
+	[BNXT_ULP_CLASS_HID_1e987] = 1099,
+	[BNXT_ULP_CLASS_HID_1ecc7] = 1100,
+	[BNXT_ULP_CLASS_HID_b1ab] = 1101,
+	[BNXT_ULP_CLASS_HID_b4eb] = 1102,
+	[BNXT_ULP_CLASS_HID_f72b] = 1103,
+	[BNXT_ULP_CLASS_HID_fa6b] = 1104,
+	[BNXT_ULP_CLASS_HID_ad5f] = 1105,
+	[BNXT_ULP_CLASS_HID_af9f] = 1106,
+	[BNXT_ULP_CLASS_HID_f2df] = 1107,
+	[BNXT_ULP_CLASS_HID_f51f] = 1108,
+	[BNXT_ULP_CLASS_HID_1c35f] = 1109,
+	[BNXT_ULP_CLASS_HID_1e59f] = 1110,
+	[BNXT_ULP_CLASS_HID_1c8df] = 1111,
+	[BNXT_ULP_CLASS_HID_1eb1f] = 1112,
+	[BNXT_ULP_CLASS_HID_1c7ab] = 1113,
+	[BNXT_ULP_CLASS_HID_1eaeb] = 1114,
+	[BNXT_ULP_CLASS_HID_1cd2b] = 1115,
+	[BNXT_ULP_CLASS_HID_1f06b] = 1116,
+	[BNXT_ULP_CLASS_HID_9177] = 1117,
+	[BNXT_ULP_CLASS_HID_b3b7] = 1118,
+	[BNXT_ULP_CLASS_HID_d6f7] = 1119,
+	[BNXT_ULP_CLASS_HID_f937] = 1120,
+	[BNXT_ULP_CLASS_HID_8c3b] = 1121,
+	[BNXT_ULP_CLASS_HID_af7b] = 1122,
+	[BNXT_ULP_CLASS_HID_d1bb] = 1123,
+	[BNXT_ULP_CLASS_HID_f4fb] = 1124,
+	[BNXT_ULP_CLASS_HID_1a23b] = 1125,
+	[BNXT_ULP_CLASS_HID_1a57b] = 1126,
+	[BNXT_ULP_CLASS_HID_1e7bb] = 1127,
+	[BNXT_ULP_CLASS_HID_1eafb] = 1128,
+	[BNXT_ULP_CLASS_HID_1a777] = 1129,
+	[BNXT_ULP_CLASS_HID_1a9b7] = 1130,
+	[BNXT_ULP_CLASS_HID_1ecf7] = 1131,
+	[BNXT_ULP_CLASS_HID_1ef37] = 1132,
+	[BNXT_ULP_CLASS_HID_b49b] = 1133,
+	[BNXT_ULP_CLASS_HID_b7db] = 1134,
+	[BNXT_ULP_CLASS_HID_fa1b] = 1135,
+	[BNXT_ULP_CLASS_HID_fd5b] = 1136,
+	[BNXT_ULP_CLASS_HID_b04f] = 1137,
+	[BNXT_ULP_CLASS_HID_b28f] = 1138,
+	[BNXT_ULP_CLASS_HID_f5cf] = 1139,
+	[BNXT_ULP_CLASS_HID_f80f] = 1140,
+	[BNXT_ULP_CLASS_HID_1c64f] = 1141,
+	[BNXT_ULP_CLASS_HID_1e88f] = 1142,
+	[BNXT_ULP_CLASS_HID_1cbcf] = 1143,
+	[BNXT_ULP_CLASS_HID_1ee0f] = 1144,
+	[BNXT_ULP_CLASS_HID_1ca9b] = 1145,
+	[BNXT_ULP_CLASS_HID_1eddb] = 1146,
+	[BNXT_ULP_CLASS_HID_1d01b] = 1147,
+	[BNXT_ULP_CLASS_HID_1f35b] = 1148,
+	[BNXT_ULP_CLASS_HID_8b4b] = 1149,
+	[BNXT_ULP_CLASS_HID_ad8b] = 1150,
+	[BNXT_ULP_CLASS_HID_d0cb] = 1151,
+	[BNXT_ULP_CLASS_HID_f30b] = 1152,
+	[BNXT_ULP_CLASS_HID_867f] = 1153,
+	[BNXT_ULP_CLASS_HID_a8bf] = 1154,
+	[BNXT_ULP_CLASS_HID_cbff] = 1155,
+	[BNXT_ULP_CLASS_HID_ee3f] = 1156,
+	[BNXT_ULP_CLASS_HID_19c7f] = 1157,
+	[BNXT_ULP_CLASS_HID_1bebf] = 1158,
+	[BNXT_ULP_CLASS_HID_1e1ff] = 1159,
+	[BNXT_ULP_CLASS_HID_1e43f] = 1160,
+	[BNXT_ULP_CLASS_HID_1a14b] = 1161,
+	[BNXT_ULP_CLASS_HID_1a38b] = 1162,
+	[BNXT_ULP_CLASS_HID_1e6cb] = 1163,
+	[BNXT_ULP_CLASS_HID_1e90b] = 1164,
+	[BNXT_ULP_CLASS_HID_aedf] = 1165,
+	[BNXT_ULP_CLASS_HID_b11f] = 1166,
+	[BNXT_ULP_CLASS_HID_f45f] = 1167,
+	[BNXT_ULP_CLASS_HID_f69f] = 1168,
+	[BNXT_ULP_CLASS_HID_a983] = 1169,
+	[BNXT_ULP_CLASS_HID_acc3] = 1170,
+	[BNXT_ULP_CLASS_HID_ef03] = 1171,
+	[BNXT_ULP_CLASS_HID_f243] = 1172,
+	[BNXT_ULP_CLASS_HID_1bf83] = 1173,
+	[BNXT_ULP_CLASS_HID_1e2c3] = 1174,
+	[BNXT_ULP_CLASS_HID_1c503] = 1175,
+	[BNXT_ULP_CLASS_HID_1e843] = 1176,
+	[BNXT_ULP_CLASS_HID_1c4df] = 1177,
+	[BNXT_ULP_CLASS_HID_1e71f] = 1178,
+	[BNXT_ULP_CLASS_HID_1ca5f] = 1179,
+	[BNXT_ULP_CLASS_HID_1ec9f] = 1180,
+	[BNXT_ULP_CLASS_HID_2523] = 1181,
+	[BNXT_ULP_CLASS_HID_2bef] = 1182,
+	[BNXT_ULP_CLASS_HID_4f73] = 1183,
+	[BNXT_ULP_CLASS_HID_164b] = 1184,
+	[BNXT_ULP_CLASS_HID_39df] = 1185,
+	[BNXT_ULP_CLASS_HID_48b7] = 1186,
+	[BNXT_ULP_CLASS_HID_0f8f] = 1187,
+	[BNXT_ULP_CLASS_HID_3313] = 1188,
+	[BNXT_ULP_CLASS_HID_257b7] = 1189,
+	[BNXT_ULP_CLASS_HID_24467] = 1190,
+	[BNXT_ULP_CLASS_HID_23fbb] = 1191,
+	[BNXT_ULP_CLASS_HID_252cb] = 1192,
+	[BNXT_ULP_CLASS_HID_21e7f] = 1193,
+	[BNXT_ULP_CLASS_HID_20b2f] = 1194,
+	[BNXT_ULP_CLASS_HID_20663] = 1195,
+	[BNXT_ULP_CLASS_HID_219b3] = 1196,
+	[BNXT_ULP_CLASS_HID_24213] = 1197,
+	[BNXT_ULP_CLASS_HID_22ec3] = 1198,
+	[BNXT_ULP_CLASS_HID_22a17] = 1199,
+	[BNXT_ULP_CLASS_HID_23d27] = 1200,
+	[BNXT_ULP_CLASS_HID_208db] = 1201,
+	[BNXT_ULP_CLASS_HID_25277] = 1202,
+	[BNXT_ULP_CLASS_HID_24d8b] = 1203,
+	[BNXT_ULP_CLASS_HID_203ef] = 1204,
+	[BNXT_ULP_CLASS_HID_2517b] = 1205,
+	[BNXT_ULP_CLASS_HID_23e2b] = 1206,
+	[BNXT_ULP_CLASS_HID_2397f] = 1207,
+	[BNXT_ULP_CLASS_HID_24c8f] = 1208,
+	[BNXT_ULP_CLASS_HID_21823] = 1209,
+	[BNXT_ULP_CLASS_HID_20513] = 1210,
+	[BNXT_ULP_CLASS_HID_20027] = 1211,
+	[BNXT_ULP_CLASS_HID_21377] = 1212,
+	[BNXT_ULP_CLASS_HID_23bd7] = 1213,
+	[BNXT_ULP_CLASS_HID_22887] = 1214,
+	[BNXT_ULP_CLASS_HID_223db] = 1215,
+	[BNXT_ULP_CLASS_HID_236eb] = 1216,
+	[BNXT_ULP_CLASS_HID_2029f] = 1217,
+	[BNXT_ULP_CLASS_HID_24c3b] = 1218,
+	[BNXT_ULP_CLASS_HID_2474f] = 1219,
+	[BNXT_ULP_CLASS_HID_25a9f] = 1220,
+	[BNXT_ULP_CLASS_HID_24b3f] = 1221,
+	[BNXT_ULP_CLASS_HID_237ef] = 1222,
+	[BNXT_ULP_CLASS_HID_23323] = 1223,
+	[BNXT_ULP_CLASS_HID_24673] = 1224,
+	[BNXT_ULP_CLASS_HID_211e7] = 1225,
+	[BNXT_ULP_CLASS_HID_25b83] = 1226,
+	[BNXT_ULP_CLASS_HID_256d7] = 1227,
+	[BNXT_ULP_CLASS_HID_20d3b] = 1228,
+	[BNXT_ULP_CLASS_HID_2359b] = 1229,
+	[BNXT_ULP_CLASS_HID_2224b] = 1230,
+	[BNXT_ULP_CLASS_HID_21d9f] = 1231,
+	[BNXT_ULP_CLASS_HID_230af] = 1232,
+	[BNXT_ULP_CLASS_HID_2590f] = 1233,
+	[BNXT_ULP_CLASS_HID_245ff] = 1234,
+	[BNXT_ULP_CLASS_HID_24133] = 1235,
+	[BNXT_ULP_CLASS_HID_25443] = 1236,
+	[BNXT_ULP_CLASS_HID_244e3] = 1237,
+	[BNXT_ULP_CLASS_HID_231d3] = 1238,
+	[BNXT_ULP_CLASS_HID_22ce7] = 1239,
+	[BNXT_ULP_CLASS_HID_24037] = 1240,
+	[BNXT_ULP_CLASS_HID_20bab] = 1241,
+	[BNXT_ULP_CLASS_HID_25547] = 1242,
+	[BNXT_ULP_CLASS_HID_2509b] = 1243,
+	[BNXT_ULP_CLASS_HID_206ff] = 1244,
+	[BNXT_ULP_CLASS_HID_22f5f] = 1245,
+	[BNXT_ULP_CLASS_HID_21c0f] = 1246,
+	[BNXT_ULP_CLASS_HID_21743] = 1247,
+	[BNXT_ULP_CLASS_HID_22a93] = 1248,
+	[BNXT_ULP_CLASS_HID_252f3] = 1249,
+	[BNXT_ULP_CLASS_HID_23fa3] = 1250,
+	[BNXT_ULP_CLASS_HID_23af7] = 1251,
+	[BNXT_ULP_CLASS_HID_24e07] = 1252,
+	[BNXT_ULP_CLASS_HID_2322f] = 1253,
+	[BNXT_ULP_CLASS_HID_21f1f] = 1254,
+	[BNXT_ULP_CLASS_HID_21a53] = 1255,
+	[BNXT_ULP_CLASS_HID_22d63] = 1256,
+	[BNXT_ULP_CLASS_HID_255c3] = 1257,
+	[BNXT_ULP_CLASS_HID_242b3] = 1258,
+	[BNXT_ULP_CLASS_HID_23dc7] = 1259,
+	[BNXT_ULP_CLASS_HID_25117] = 1260,
+	[BNXT_ULP_CLASS_HID_22c13] = 1261,
+	[BNXT_ULP_CLASS_HID_218c3] = 1262,
+	[BNXT_ULP_CLASS_HID_21417] = 1263,
+	[BNXT_ULP_CLASS_HID_22727] = 1264,
+	[BNXT_ULP_CLASS_HID_24f87] = 1265,
+	[BNXT_ULP_CLASS_HID_23c77] = 1266,
+	[BNXT_ULP_CLASS_HID_2378b] = 1267,
+	[BNXT_ULP_CLASS_HID_24adb] = 1268,
+	[BNXT_ULP_CLASS_HID_257b] = 1269,
+	[BNXT_ULP_CLASS_HID_2bb7] = 1270,
+	[BNXT_ULP_CLASS_HID_4f2b] = 1271,
+	[BNXT_ULP_CLASS_HID_1613] = 1272,
+	[BNXT_ULP_CLASS_HID_3987] = 1273,
+	[BNXT_ULP_CLASS_HID_48ef] = 1274,
+	[BNXT_ULP_CLASS_HID_0fd7] = 1275,
+	[BNXT_ULP_CLASS_HID_334b] = 1276,
+	[BNXT_ULP_CLASS_HID_25797] = 1277,
+	[BNXT_ULP_CLASS_HID_285eb] = 1278,
+	[BNXT_ULP_CLASS_HID_310eb] = 1279,
+	[BNXT_ULP_CLASS_HID_39beb] = 1280,
+	[BNXT_ULP_CLASS_HID_24447] = 1281,
+	[BNXT_ULP_CLASS_HID_2cf47] = 1282,
+	[BNXT_ULP_CLASS_HID_35a47] = 1283,
+	[BNXT_ULP_CLASS_HID_3889b] = 1284,
+	[BNXT_ULP_CLASS_HID_23f9b] = 1285,
+	[BNXT_ULP_CLASS_HID_2ca9b] = 1286,
+	[BNXT_ULP_CLASS_HID_3559b] = 1287,
+	[BNXT_ULP_CLASS_HID_383ef] = 1288,
+	[BNXT_ULP_CLASS_HID_252eb] = 1289,
+	[BNXT_ULP_CLASS_HID_2813f] = 1290,
+	[BNXT_ULP_CLASS_HID_30c3f] = 1291,
+	[BNXT_ULP_CLASS_HID_3973f] = 1292,
+	[BNXT_ULP_CLASS_HID_21e5f] = 1293,
+	[BNXT_ULP_CLASS_HID_2a95f] = 1294,
+	[BNXT_ULP_CLASS_HID_3345f] = 1295,
+	[BNXT_ULP_CLASS_HID_3bf5f] = 1296,
+	[BNXT_ULP_CLASS_HID_20b0f] = 1297,
+	[BNXT_ULP_CLASS_HID_2960f] = 1298,
+	[BNXT_ULP_CLASS_HID_3210f] = 1299,
+	[BNXT_ULP_CLASS_HID_3ac0f] = 1300,
+	[BNXT_ULP_CLASS_HID_20643] = 1301,
+	[BNXT_ULP_CLASS_HID_29143] = 1302,
+	[BNXT_ULP_CLASS_HID_31c43] = 1303,
+	[BNXT_ULP_CLASS_HID_3a743] = 1304,
+	[BNXT_ULP_CLASS_HID_21993] = 1305,
+	[BNXT_ULP_CLASS_HID_2a493] = 1306,
+	[BNXT_ULP_CLASS_HID_32f93] = 1307,
+	[BNXT_ULP_CLASS_HID_3ba93] = 1308,
+	[BNXT_ULP_CLASS_HID_24233] = 1309,
+	[BNXT_ULP_CLASS_HID_2cd33] = 1310,
+	[BNXT_ULP_CLASS_HID_35833] = 1311,
+	[BNXT_ULP_CLASS_HID_38607] = 1312,
+	[BNXT_ULP_CLASS_HID_22ee3] = 1313,
+	[BNXT_ULP_CLASS_HID_2b9e3] = 1314,
+	[BNXT_ULP_CLASS_HID_344e3] = 1315,
+	[BNXT_ULP_CLASS_HID_3cfe3] = 1316,
+	[BNXT_ULP_CLASS_HID_22a37] = 1317,
+	[BNXT_ULP_CLASS_HID_2b537] = 1318,
+	[BNXT_ULP_CLASS_HID_34037] = 1319,
+	[BNXT_ULP_CLASS_HID_3cb37] = 1320,
+	[BNXT_ULP_CLASS_HID_23d07] = 1321,
+	[BNXT_ULP_CLASS_HID_2c807] = 1322,
+	[BNXT_ULP_CLASS_HID_35307] = 1323,
+	[BNXT_ULP_CLASS_HID_3815b] = 1324,
+	[BNXT_ULP_CLASS_HID_208fb] = 1325,
+	[BNXT_ULP_CLASS_HID_293fb] = 1326,
+	[BNXT_ULP_CLASS_HID_31efb] = 1327,
+	[BNXT_ULP_CLASS_HID_3a9fb] = 1328,
+	[BNXT_ULP_CLASS_HID_25257] = 1329,
+	[BNXT_ULP_CLASS_HID_280ab] = 1330,
+	[BNXT_ULP_CLASS_HID_30bab] = 1331,
+	[BNXT_ULP_CLASS_HID_396ab] = 1332,
+	[BNXT_ULP_CLASS_HID_24dab] = 1333,
+	[BNXT_ULP_CLASS_HID_2d8ab] = 1334,
+	[BNXT_ULP_CLASS_HID_306ff] = 1335,
+	[BNXT_ULP_CLASS_HID_391ff] = 1336,
+	[BNXT_ULP_CLASS_HID_203cf] = 1337,
+	[BNXT_ULP_CLASS_HID_28ecf] = 1338,
+	[BNXT_ULP_CLASS_HID_319cf] = 1339,
+	[BNXT_ULP_CLASS_HID_3a4cf] = 1340,
+	[BNXT_ULP_CLASS_HID_2515b] = 1341,
+	[BNXT_ULP_CLASS_HID_2dc5b] = 1342,
+	[BNXT_ULP_CLASS_HID_30aaf] = 1343,
+	[BNXT_ULP_CLASS_HID_395af] = 1344,
+	[BNXT_ULP_CLASS_HID_23e0b] = 1345,
+	[BNXT_ULP_CLASS_HID_2c90b] = 1346,
+	[BNXT_ULP_CLASS_HID_3540b] = 1347,
+	[BNXT_ULP_CLASS_HID_3825f] = 1348,
+	[BNXT_ULP_CLASS_HID_2395f] = 1349,
+	[BNXT_ULP_CLASS_HID_2c45f] = 1350,
+	[BNXT_ULP_CLASS_HID_34f5f] = 1351,
+	[BNXT_ULP_CLASS_HID_3da5f] = 1352,
+	[BNXT_ULP_CLASS_HID_24caf] = 1353,
+	[BNXT_ULP_CLASS_HID_2d7af] = 1354,
+	[BNXT_ULP_CLASS_HID_305e3] = 1355,
+	[BNXT_ULP_CLASS_HID_390e3] = 1356,
+	[BNXT_ULP_CLASS_HID_21803] = 1357,
+	[BNXT_ULP_CLASS_HID_2a303] = 1358,
+	[BNXT_ULP_CLASS_HID_32e03] = 1359,
+	[BNXT_ULP_CLASS_HID_3b903] = 1360,
+	[BNXT_ULP_CLASS_HID_20533] = 1361,
+	[BNXT_ULP_CLASS_HID_29033] = 1362,
+	[BNXT_ULP_CLASS_HID_31b33] = 1363,
+	[BNXT_ULP_CLASS_HID_3a633] = 1364,
+	[BNXT_ULP_CLASS_HID_20007] = 1365,
+	[BNXT_ULP_CLASS_HID_28b07] = 1366,
+	[BNXT_ULP_CLASS_HID_31607] = 1367,
+	[BNXT_ULP_CLASS_HID_3a107] = 1368,
+	[BNXT_ULP_CLASS_HID_21357] = 1369,
+	[BNXT_ULP_CLASS_HID_29e57] = 1370,
+	[BNXT_ULP_CLASS_HID_32957] = 1371,
+	[BNXT_ULP_CLASS_HID_3b457] = 1372,
+	[BNXT_ULP_CLASS_HID_23bf7] = 1373,
+	[BNXT_ULP_CLASS_HID_2c6f7] = 1374,
+	[BNXT_ULP_CLASS_HID_351f7] = 1375,
+	[BNXT_ULP_CLASS_HID_3dcf7] = 1376,
+	[BNXT_ULP_CLASS_HID_228a7] = 1377,
+	[BNXT_ULP_CLASS_HID_2b3a7] = 1378,
+	[BNXT_ULP_CLASS_HID_33ea7] = 1379,
+	[BNXT_ULP_CLASS_HID_3c9a7] = 1380,
+	[BNXT_ULP_CLASS_HID_223fb] = 1381,
+	[BNXT_ULP_CLASS_HID_2aefb] = 1382,
+	[BNXT_ULP_CLASS_HID_339fb] = 1383,
+	[BNXT_ULP_CLASS_HID_3c4fb] = 1384,
+	[BNXT_ULP_CLASS_HID_236cb] = 1385,
+	[BNXT_ULP_CLASS_HID_2c1cb] = 1386,
+	[BNXT_ULP_CLASS_HID_34ccb] = 1387,
+	[BNXT_ULP_CLASS_HID_3d7cb] = 1388,
+	[BNXT_ULP_CLASS_HID_202bf] = 1389,
+	[BNXT_ULP_CLASS_HID_28dbf] = 1390,
+	[BNXT_ULP_CLASS_HID_318bf] = 1391,
+	[BNXT_ULP_CLASS_HID_3a3bf] = 1392,
+	[BNXT_ULP_CLASS_HID_24c1b] = 1393,
+	[BNXT_ULP_CLASS_HID_2d71b] = 1394,
+	[BNXT_ULP_CLASS_HID_3056f] = 1395,
+	[BNXT_ULP_CLASS_HID_3906f] = 1396,
+	[BNXT_ULP_CLASS_HID_2476f] = 1397,
+	[BNXT_ULP_CLASS_HID_2d26f] = 1398,
+	[BNXT_ULP_CLASS_HID_300a3] = 1399,
+	[BNXT_ULP_CLASS_HID_38ba3] = 1400,
+	[BNXT_ULP_CLASS_HID_25abf] = 1401,
+	[BNXT_ULP_CLASS_HID_288f3] = 1402,
+	[BNXT_ULP_CLASS_HID_313f3] = 1403,
+	[BNXT_ULP_CLASS_HID_39ef3] = 1404,
+	[BNXT_ULP_CLASS_HID_24b1f] = 1405,
+	[BNXT_ULP_CLASS_HID_2d61f] = 1406,
+	[BNXT_ULP_CLASS_HID_30453] = 1407,
+	[BNXT_ULP_CLASS_HID_38f53] = 1408,
+	[BNXT_ULP_CLASS_HID_237cf] = 1409,
+	[BNXT_ULP_CLASS_HID_2c2cf] = 1410,
+	[BNXT_ULP_CLASS_HID_34dcf] = 1411,
+	[BNXT_ULP_CLASS_HID_3d8cf] = 1412,
+	[BNXT_ULP_CLASS_HID_23303] = 1413,
+	[BNXT_ULP_CLASS_HID_2be03] = 1414,
+	[BNXT_ULP_CLASS_HID_34903] = 1415,
+	[BNXT_ULP_CLASS_HID_3d403] = 1416,
+	[BNXT_ULP_CLASS_HID_24653] = 1417,
+	[BNXT_ULP_CLASS_HID_2d153] = 1418,
+	[BNXT_ULP_CLASS_HID_35c53] = 1419,
+	[BNXT_ULP_CLASS_HID_38aa7] = 1420,
+	[BNXT_ULP_CLASS_HID_211c7] = 1421,
+	[BNXT_ULP_CLASS_HID_29cc7] = 1422,
+	[BNXT_ULP_CLASS_HID_327c7] = 1423,
+	[BNXT_ULP_CLASS_HID_3b2c7] = 1424,
+	[BNXT_ULP_CLASS_HID_25ba3] = 1425,
+	[BNXT_ULP_CLASS_HID_289f7] = 1426,
+	[BNXT_ULP_CLASS_HID_314f7] = 1427,
+	[BNXT_ULP_CLASS_HID_39ff7] = 1428,
+	[BNXT_ULP_CLASS_HID_256f7] = 1429,
+	[BNXT_ULP_CLASS_HID_284cb] = 1430,
+	[BNXT_ULP_CLASS_HID_30fcb] = 1431,
+	[BNXT_ULP_CLASS_HID_39acb] = 1432,
+	[BNXT_ULP_CLASS_HID_20d1b] = 1433,
+	[BNXT_ULP_CLASS_HID_2981b] = 1434,
+	[BNXT_ULP_CLASS_HID_3231b] = 1435,
+	[BNXT_ULP_CLASS_HID_3ae1b] = 1436,
+	[BNXT_ULP_CLASS_HID_235bb] = 1437,
+	[BNXT_ULP_CLASS_HID_2c0bb] = 1438,
+	[BNXT_ULP_CLASS_HID_34bbb] = 1439,
+	[BNXT_ULP_CLASS_HID_3d6bb] = 1440,
+	[BNXT_ULP_CLASS_HID_2226b] = 1441,
+	[BNXT_ULP_CLASS_HID_2ad6b] = 1442,
+	[BNXT_ULP_CLASS_HID_3386b] = 1443,
+	[BNXT_ULP_CLASS_HID_3c36b] = 1444,
+	[BNXT_ULP_CLASS_HID_21dbf] = 1445,
+	[BNXT_ULP_CLASS_HID_2a8bf] = 1446,
+	[BNXT_ULP_CLASS_HID_333bf] = 1447,
+	[BNXT_ULP_CLASS_HID_3bebf] = 1448,
+	[BNXT_ULP_CLASS_HID_2308f] = 1449,
+	[BNXT_ULP_CLASS_HID_2bb8f] = 1450,
+	[BNXT_ULP_CLASS_HID_3468f] = 1451,
+	[BNXT_ULP_CLASS_HID_3d18f] = 1452,
+	[BNXT_ULP_CLASS_HID_2592f] = 1453,
+	[BNXT_ULP_CLASS_HID_28763] = 1454,
+	[BNXT_ULP_CLASS_HID_31263] = 1455,
+	[BNXT_ULP_CLASS_HID_39d63] = 1456,
+	[BNXT_ULP_CLASS_HID_245df] = 1457,
+	[BNXT_ULP_CLASS_HID_2d0df] = 1458,
+	[BNXT_ULP_CLASS_HID_35bdf] = 1459,
+	[BNXT_ULP_CLASS_HID_38a13] = 1460,
+	[BNXT_ULP_CLASS_HID_24113] = 1461,
+	[BNXT_ULP_CLASS_HID_2cc13] = 1462,
+	[BNXT_ULP_CLASS_HID_35713] = 1463,
+	[BNXT_ULP_CLASS_HID_38567] = 1464,
+	[BNXT_ULP_CLASS_HID_25463] = 1465,
+	[BNXT_ULP_CLASS_HID_282b7] = 1466,
+	[BNXT_ULP_CLASS_HID_30db7] = 1467,
+	[BNXT_ULP_CLASS_HID_398b7] = 1468,
+	[BNXT_ULP_CLASS_HID_244c3] = 1469,
+	[BNXT_ULP_CLASS_HID_2cfc3] = 1470,
+	[BNXT_ULP_CLASS_HID_35ac3] = 1471,
+	[BNXT_ULP_CLASS_HID_38917] = 1472,
+	[BNXT_ULP_CLASS_HID_231f3] = 1473,
+	[BNXT_ULP_CLASS_HID_2bcf3] = 1474,
+	[BNXT_ULP_CLASS_HID_347f3] = 1475,
+	[BNXT_ULP_CLASS_HID_3d2f3] = 1476,
+	[BNXT_ULP_CLASS_HID_22cc7] = 1477,
+	[BNXT_ULP_CLASS_HID_2b7c7] = 1478,
+	[BNXT_ULP_CLASS_HID_342c7] = 1479,
+	[BNXT_ULP_CLASS_HID_3cdc7] = 1480,
+	[BNXT_ULP_CLASS_HID_24017] = 1481,
+	[BNXT_ULP_CLASS_HID_2cb17] = 1482,
+	[BNXT_ULP_CLASS_HID_35617] = 1483,
+	[BNXT_ULP_CLASS_HID_3846b] = 1484,
+	[BNXT_ULP_CLASS_HID_20b8b] = 1485,
+	[BNXT_ULP_CLASS_HID_2968b] = 1486,
+	[BNXT_ULP_CLASS_HID_3218b] = 1487,
+	[BNXT_ULP_CLASS_HID_3ac8b] = 1488,
+	[BNXT_ULP_CLASS_HID_25567] = 1489,
+	[BNXT_ULP_CLASS_HID_283bb] = 1490,
+	[BNXT_ULP_CLASS_HID_30ebb] = 1491,
+	[BNXT_ULP_CLASS_HID_399bb] = 1492,
+	[BNXT_ULP_CLASS_HID_250bb] = 1493,
+	[BNXT_ULP_CLASS_HID_2dbbb] = 1494,
+	[BNXT_ULP_CLASS_HID_3098f] = 1495,
+	[BNXT_ULP_CLASS_HID_3948f] = 1496,
+	[BNXT_ULP_CLASS_HID_206df] = 1497,
+	[BNXT_ULP_CLASS_HID_291df] = 1498,
+	[BNXT_ULP_CLASS_HID_31cdf] = 1499,
+	[BNXT_ULP_CLASS_HID_3a7df] = 1500,
+	[BNXT_ULP_CLASS_HID_22f7f] = 1501,
+	[BNXT_ULP_CLASS_HID_2ba7f] = 1502,
+	[BNXT_ULP_CLASS_HID_3457f] = 1503,
+	[BNXT_ULP_CLASS_HID_3d07f] = 1504,
+	[BNXT_ULP_CLASS_HID_21c2f] = 1505,
+	[BNXT_ULP_CLASS_HID_2a72f] = 1506,
+	[BNXT_ULP_CLASS_HID_3322f] = 1507,
+	[BNXT_ULP_CLASS_HID_3bd2f] = 1508,
+	[BNXT_ULP_CLASS_HID_21763] = 1509,
+	[BNXT_ULP_CLASS_HID_2a263] = 1510,
+	[BNXT_ULP_CLASS_HID_32d63] = 1511,
+	[BNXT_ULP_CLASS_HID_3b863] = 1512,
+	[BNXT_ULP_CLASS_HID_22ab3] = 1513,
+	[BNXT_ULP_CLASS_HID_2b5b3] = 1514,
+	[BNXT_ULP_CLASS_HID_340b3] = 1515,
+	[BNXT_ULP_CLASS_HID_3cbb3] = 1516,
+	[BNXT_ULP_CLASS_HID_252d3] = 1517,
+	[BNXT_ULP_CLASS_HID_28127] = 1518,
+	[BNXT_ULP_CLASS_HID_30c27] = 1519,
+	[BNXT_ULP_CLASS_HID_39727] = 1520,
+	[BNXT_ULP_CLASS_HID_23f83] = 1521,
+	[BNXT_ULP_CLASS_HID_2ca83] = 1522,
+	[BNXT_ULP_CLASS_HID_35583] = 1523,
+	[BNXT_ULP_CLASS_HID_383d7] = 1524,
+	[BNXT_ULP_CLASS_HID_23ad7] = 1525,
+	[BNXT_ULP_CLASS_HID_2c5d7] = 1526,
+	[BNXT_ULP_CLASS_HID_350d7] = 1527,
+	[BNXT_ULP_CLASS_HID_3dbd7] = 1528,
+	[BNXT_ULP_CLASS_HID_24e27] = 1529,
+	[BNXT_ULP_CLASS_HID_2d927] = 1530,
+	[BNXT_ULP_CLASS_HID_3077b] = 1531,
+	[BNXT_ULP_CLASS_HID_3927b] = 1532,
+	[BNXT_ULP_CLASS_HID_2320f] = 1533,
+	[BNXT_ULP_CLASS_HID_2bd0f] = 1534,
+	[BNXT_ULP_CLASS_HID_3480f] = 1535,
+	[BNXT_ULP_CLASS_HID_3d30f] = 1536,
+	[BNXT_ULP_CLASS_HID_21f3f] = 1537,
+	[BNXT_ULP_CLASS_HID_2aa3f] = 1538,
+	[BNXT_ULP_CLASS_HID_3353f] = 1539,
+	[BNXT_ULP_CLASS_HID_3c03f] = 1540,
+	[BNXT_ULP_CLASS_HID_21a73] = 1541,
+	[BNXT_ULP_CLASS_HID_2a573] = 1542,
+	[BNXT_ULP_CLASS_HID_33073] = 1543,
+	[BNXT_ULP_CLASS_HID_3bb73] = 1544,
+	[BNXT_ULP_CLASS_HID_22d43] = 1545,
+	[BNXT_ULP_CLASS_HID_2b843] = 1546,
+	[BNXT_ULP_CLASS_HID_34343] = 1547,
+	[BNXT_ULP_CLASS_HID_3ce43] = 1548,
+	[BNXT_ULP_CLASS_HID_255e3] = 1549,
+	[BNXT_ULP_CLASS_HID_28437] = 1550,
+	[BNXT_ULP_CLASS_HID_30f37] = 1551,
+	[BNXT_ULP_CLASS_HID_39a37] = 1552,
+	[BNXT_ULP_CLASS_HID_24293] = 1553,
+	[BNXT_ULP_CLASS_HID_2cd93] = 1554,
+	[BNXT_ULP_CLASS_HID_35893] = 1555,
+	[BNXT_ULP_CLASS_HID_386e7] = 1556,
+	[BNXT_ULP_CLASS_HID_23de7] = 1557,
+	[BNXT_ULP_CLASS_HID_2c8e7] = 1558,
+	[BNXT_ULP_CLASS_HID_353e7] = 1559,
+	[BNXT_ULP_CLASS_HID_3823b] = 1560,
+	[BNXT_ULP_CLASS_HID_25137] = 1561,
+	[BNXT_ULP_CLASS_HID_2dc37] = 1562,
+	[BNXT_ULP_CLASS_HID_30a0b] = 1563,
+	[BNXT_ULP_CLASS_HID_3950b] = 1564,
+	[BNXT_ULP_CLASS_HID_22c33] = 1565,
+	[BNXT_ULP_CLASS_HID_2b733] = 1566,
+	[BNXT_ULP_CLASS_HID_34233] = 1567,
+	[BNXT_ULP_CLASS_HID_3cd33] = 1568,
+	[BNXT_ULP_CLASS_HID_218e3] = 1569,
+	[BNXT_ULP_CLASS_HID_2a3e3] = 1570,
+	[BNXT_ULP_CLASS_HID_32ee3] = 1571,
+	[BNXT_ULP_CLASS_HID_3b9e3] = 1572,
+	[BNXT_ULP_CLASS_HID_21437] = 1573,
+	[BNXT_ULP_CLASS_HID_29f37] = 1574,
+	[BNXT_ULP_CLASS_HID_32a37] = 1575,
+	[BNXT_ULP_CLASS_HID_3b537] = 1576,
+	[BNXT_ULP_CLASS_HID_22707] = 1577,
+	[BNXT_ULP_CLASS_HID_2b207] = 1578,
+	[BNXT_ULP_CLASS_HID_33d07] = 1579,
+	[BNXT_ULP_CLASS_HID_3c807] = 1580,
+	[BNXT_ULP_CLASS_HID_24fa7] = 1581,
+	[BNXT_ULP_CLASS_HID_2daa7] = 1582,
+	[BNXT_ULP_CLASS_HID_308fb] = 1583,
+	[BNXT_ULP_CLASS_HID_393fb] = 1584,
+	[BNXT_ULP_CLASS_HID_23c57] = 1585,
+	[BNXT_ULP_CLASS_HID_2c757] = 1586,
+	[BNXT_ULP_CLASS_HID_35257] = 1587,
+	[BNXT_ULP_CLASS_HID_380ab] = 1588,
+	[BNXT_ULP_CLASS_HID_237ab] = 1589,
+	[BNXT_ULP_CLASS_HID_2c2ab] = 1590,
+	[BNXT_ULP_CLASS_HID_34dab] = 1591,
+	[BNXT_ULP_CLASS_HID_3d8ab] = 1592,
+	[BNXT_ULP_CLASS_HID_24afb] = 1593,
+	[BNXT_ULP_CLASS_HID_2d5fb] = 1594,
+	[BNXT_ULP_CLASS_HID_303cf] = 1595,
+	[BNXT_ULP_CLASS_HID_38ecf] = 1596,
+	[BNXT_ULP_CLASS_HID_255b] = 1597,
+	[BNXT_ULP_CLASS_HID_2b97] = 1598,
+	[BNXT_ULP_CLASS_HID_4f0b] = 1599,
+	[BNXT_ULP_CLASS_HID_1633] = 1600,
+	[BNXT_ULP_CLASS_HID_39a7] = 1601,
+	[BNXT_ULP_CLASS_HID_48cf] = 1602,
+	[BNXT_ULP_CLASS_HID_0ff7] = 1603,
+	[BNXT_ULP_CLASS_HID_336b] = 1604,
+	[BNXT_ULP_CLASS_HID_257f7] = 1605,
+	[BNXT_ULP_CLASS_HID_2858b] = 1606,
+	[BNXT_ULP_CLASS_HID_3108b] = 1607,
+	[BNXT_ULP_CLASS_HID_39b8b] = 1608,
+	[BNXT_ULP_CLASS_HID_24427] = 1609,
+	[BNXT_ULP_CLASS_HID_2cf27] = 1610,
+	[BNXT_ULP_CLASS_HID_35a27] = 1611,
+	[BNXT_ULP_CLASS_HID_388fb] = 1612,
+	[BNXT_ULP_CLASS_HID_23ffb] = 1613,
+	[BNXT_ULP_CLASS_HID_2cafb] = 1614,
+	[BNXT_ULP_CLASS_HID_355fb] = 1615,
+	[BNXT_ULP_CLASS_HID_3838f] = 1616,
+	[BNXT_ULP_CLASS_HID_2528b] = 1617,
+	[BNXT_ULP_CLASS_HID_2815f] = 1618,
+	[BNXT_ULP_CLASS_HID_30c5f] = 1619,
+	[BNXT_ULP_CLASS_HID_3975f] = 1620,
+	[BNXT_ULP_CLASS_HID_21e3f] = 1621,
+	[BNXT_ULP_CLASS_HID_2a93f] = 1622,
+	[BNXT_ULP_CLASS_HID_3343f] = 1623,
+	[BNXT_ULP_CLASS_HID_3bf3f] = 1624,
+	[BNXT_ULP_CLASS_HID_20b6f] = 1625,
+	[BNXT_ULP_CLASS_HID_2966f] = 1626,
+	[BNXT_ULP_CLASS_HID_3216f] = 1627,
+	[BNXT_ULP_CLASS_HID_3ac6f] = 1628,
+	[BNXT_ULP_CLASS_HID_20623] = 1629,
+	[BNXT_ULP_CLASS_HID_29123] = 1630,
+	[BNXT_ULP_CLASS_HID_31c23] = 1631,
+	[BNXT_ULP_CLASS_HID_3a723] = 1632,
+	[BNXT_ULP_CLASS_HID_219f3] = 1633,
+	[BNXT_ULP_CLASS_HID_2a4f3] = 1634,
+	[BNXT_ULP_CLASS_HID_32ff3] = 1635,
+	[BNXT_ULP_CLASS_HID_3baf3] = 1636,
+	[BNXT_ULP_CLASS_HID_24253] = 1637,
+	[BNXT_ULP_CLASS_HID_2cd53] = 1638,
+	[BNXT_ULP_CLASS_HID_35853] = 1639,
+	[BNXT_ULP_CLASS_HID_38667] = 1640,
+	[BNXT_ULP_CLASS_HID_22e83] = 1641,
+	[BNXT_ULP_CLASS_HID_2b983] = 1642,
+	[BNXT_ULP_CLASS_HID_34483] = 1643,
+	[BNXT_ULP_CLASS_HID_3cf83] = 1644,
+	[BNXT_ULP_CLASS_HID_22a57] = 1645,
+	[BNXT_ULP_CLASS_HID_2b557] = 1646,
+	[BNXT_ULP_CLASS_HID_34057] = 1647,
+	[BNXT_ULP_CLASS_HID_3cb57] = 1648,
+	[BNXT_ULP_CLASS_HID_23d67] = 1649,
+	[BNXT_ULP_CLASS_HID_2c867] = 1650,
+	[BNXT_ULP_CLASS_HID_35367] = 1651,
+	[BNXT_ULP_CLASS_HID_3813b] = 1652,
+	[BNXT_ULP_CLASS_HID_2089b] = 1653,
+	[BNXT_ULP_CLASS_HID_2939b] = 1654,
+	[BNXT_ULP_CLASS_HID_31e9b] = 1655,
+	[BNXT_ULP_CLASS_HID_3a99b] = 1656,
+	[BNXT_ULP_CLASS_HID_25237] = 1657,
+	[BNXT_ULP_CLASS_HID_280cb] = 1658,
+	[BNXT_ULP_CLASS_HID_30bcb] = 1659,
+	[BNXT_ULP_CLASS_HID_396cb] = 1660,
+	[BNXT_ULP_CLASS_HID_24dcb] = 1661,
+	[BNXT_ULP_CLASS_HID_2d8cb] = 1662,
+	[BNXT_ULP_CLASS_HID_3069f] = 1663,
+	[BNXT_ULP_CLASS_HID_3919f] = 1664,
+	[BNXT_ULP_CLASS_HID_203af] = 1665,
+	[BNXT_ULP_CLASS_HID_28eaf] = 1666,
+	[BNXT_ULP_CLASS_HID_319af] = 1667,
+	[BNXT_ULP_CLASS_HID_3a4af] = 1668,
+	[BNXT_ULP_CLASS_HID_2513b] = 1669,
+	[BNXT_ULP_CLASS_HID_2dc3b] = 1670,
+	[BNXT_ULP_CLASS_HID_30acf] = 1671,
+	[BNXT_ULP_CLASS_HID_395cf] = 1672,
+	[BNXT_ULP_CLASS_HID_23e6b] = 1673,
+	[BNXT_ULP_CLASS_HID_2c96b] = 1674,
+	[BNXT_ULP_CLASS_HID_3546b] = 1675,
+	[BNXT_ULP_CLASS_HID_3823f] = 1676,
+	[BNXT_ULP_CLASS_HID_2393f] = 1677,
+	[BNXT_ULP_CLASS_HID_2c43f] = 1678,
+	[BNXT_ULP_CLASS_HID_34f3f] = 1679,
+	[BNXT_ULP_CLASS_HID_3da3f] = 1680,
+	[BNXT_ULP_CLASS_HID_24ccf] = 1681,
+	[BNXT_ULP_CLASS_HID_2d7cf] = 1682,
+	[BNXT_ULP_CLASS_HID_30583] = 1683,
+	[BNXT_ULP_CLASS_HID_39083] = 1684,
+	[BNXT_ULP_CLASS_HID_21863] = 1685,
+	[BNXT_ULP_CLASS_HID_2a363] = 1686,
+	[BNXT_ULP_CLASS_HID_32e63] = 1687,
+	[BNXT_ULP_CLASS_HID_3b963] = 1688,
+	[BNXT_ULP_CLASS_HID_20553] = 1689,
+	[BNXT_ULP_CLASS_HID_29053] = 1690,
+	[BNXT_ULP_CLASS_HID_31b53] = 1691,
+	[BNXT_ULP_CLASS_HID_3a653] = 1692,
+	[BNXT_ULP_CLASS_HID_20067] = 1693,
+	[BNXT_ULP_CLASS_HID_28b67] = 1694,
+	[BNXT_ULP_CLASS_HID_31667] = 1695,
+	[BNXT_ULP_CLASS_HID_3a167] = 1696,
+	[BNXT_ULP_CLASS_HID_21337] = 1697,
+	[BNXT_ULP_CLASS_HID_29e37] = 1698,
+	[BNXT_ULP_CLASS_HID_32937] = 1699,
+	[BNXT_ULP_CLASS_HID_3b437] = 1700,
+	[BNXT_ULP_CLASS_HID_23b97] = 1701,
+	[BNXT_ULP_CLASS_HID_2c697] = 1702,
+	[BNXT_ULP_CLASS_HID_35197] = 1703,
+	[BNXT_ULP_CLASS_HID_3dc97] = 1704,
+	[BNXT_ULP_CLASS_HID_228c7] = 1705,
+	[BNXT_ULP_CLASS_HID_2b3c7] = 1706,
+	[BNXT_ULP_CLASS_HID_33ec7] = 1707,
+	[BNXT_ULP_CLASS_HID_3c9c7] = 1708,
+	[BNXT_ULP_CLASS_HID_2239b] = 1709,
+	[BNXT_ULP_CLASS_HID_2ae9b] = 1710,
+	[BNXT_ULP_CLASS_HID_3399b] = 1711,
+	[BNXT_ULP_CLASS_HID_3c49b] = 1712,
+	[BNXT_ULP_CLASS_HID_236ab] = 1713,
+	[BNXT_ULP_CLASS_HID_2c1ab] = 1714,
+	[BNXT_ULP_CLASS_HID_34cab] = 1715,
+	[BNXT_ULP_CLASS_HID_3d7ab] = 1716,
+	[BNXT_ULP_CLASS_HID_202df] = 1717,
+	[BNXT_ULP_CLASS_HID_28ddf] = 1718,
+	[BNXT_ULP_CLASS_HID_318df] = 1719,
+	[BNXT_ULP_CLASS_HID_3a3df] = 1720,
+	[BNXT_ULP_CLASS_HID_24c7b] = 1721,
+	[BNXT_ULP_CLASS_HID_2d77b] = 1722,
+	[BNXT_ULP_CLASS_HID_3050f] = 1723,
+	[BNXT_ULP_CLASS_HID_3900f] = 1724,
+	[BNXT_ULP_CLASS_HID_2470f] = 1725,
+	[BNXT_ULP_CLASS_HID_2d20f] = 1726,
+	[BNXT_ULP_CLASS_HID_300c3] = 1727,
+	[BNXT_ULP_CLASS_HID_38bc3] = 1728,
+	[BNXT_ULP_CLASS_HID_25adf] = 1729,
+	[BNXT_ULP_CLASS_HID_28893] = 1730,
+	[BNXT_ULP_CLASS_HID_31393] = 1731,
+	[BNXT_ULP_CLASS_HID_39e93] = 1732,
+	[BNXT_ULP_CLASS_HID_24b7f] = 1733,
+	[BNXT_ULP_CLASS_HID_2d67f] = 1734,
+	[BNXT_ULP_CLASS_HID_30433] = 1735,
+	[BNXT_ULP_CLASS_HID_38f33] = 1736,
+	[BNXT_ULP_CLASS_HID_237af] = 1737,
+	[BNXT_ULP_CLASS_HID_2c2af] = 1738,
+	[BNXT_ULP_CLASS_HID_34daf] = 1739,
+	[BNXT_ULP_CLASS_HID_3d8af] = 1740,
+	[BNXT_ULP_CLASS_HID_23363] = 1741,
+	[BNXT_ULP_CLASS_HID_2be63] = 1742,
+	[BNXT_ULP_CLASS_HID_34963] = 1743,
+	[BNXT_ULP_CLASS_HID_3d463] = 1744,
+	[BNXT_ULP_CLASS_HID_24633] = 1745,
+	[BNXT_ULP_CLASS_HID_2d133] = 1746,
+	[BNXT_ULP_CLASS_HID_35c33] = 1747,
+	[BNXT_ULP_CLASS_HID_38ac7] = 1748,
+	[BNXT_ULP_CLASS_HID_211a7] = 1749,
+	[BNXT_ULP_CLASS_HID_29ca7] = 1750,
+	[BNXT_ULP_CLASS_HID_327a7] = 1751,
+	[BNXT_ULP_CLASS_HID_3b2a7] = 1752,
+	[BNXT_ULP_CLASS_HID_25bc3] = 1753,
+	[BNXT_ULP_CLASS_HID_28997] = 1754,
+	[BNXT_ULP_CLASS_HID_31497] = 1755,
+	[BNXT_ULP_CLASS_HID_39f97] = 1756,
+	[BNXT_ULP_CLASS_HID_25697] = 1757,
+	[BNXT_ULP_CLASS_HID_284ab] = 1758,
+	[BNXT_ULP_CLASS_HID_30fab] = 1759,
+	[BNXT_ULP_CLASS_HID_39aab] = 1760,
+	[BNXT_ULP_CLASS_HID_20d7b] = 1761,
+	[BNXT_ULP_CLASS_HID_2987b] = 1762,
+	[BNXT_ULP_CLASS_HID_3237b] = 1763,
+	[BNXT_ULP_CLASS_HID_3ae7b] = 1764,
+	[BNXT_ULP_CLASS_HID_235db] = 1765,
+	[BNXT_ULP_CLASS_HID_2c0db] = 1766,
+	[BNXT_ULP_CLASS_HID_34bdb] = 1767,
+	[BNXT_ULP_CLASS_HID_3d6db] = 1768,
+	[BNXT_ULP_CLASS_HID_2220b] = 1769,
+	[BNXT_ULP_CLASS_HID_2ad0b] = 1770,
+	[BNXT_ULP_CLASS_HID_3380b] = 1771,
+	[BNXT_ULP_CLASS_HID_3c30b] = 1772,
+	[BNXT_ULP_CLASS_HID_21ddf] = 1773,
+	[BNXT_ULP_CLASS_HID_2a8df] = 1774,
+	[BNXT_ULP_CLASS_HID_333df] = 1775,
+	[BNXT_ULP_CLASS_HID_3bedf] = 1776,
+	[BNXT_ULP_CLASS_HID_230ef] = 1777,
+	[BNXT_ULP_CLASS_HID_2bbef] = 1778,
+	[BNXT_ULP_CLASS_HID_346ef] = 1779,
+	[BNXT_ULP_CLASS_HID_3d1ef] = 1780,
+	[BNXT_ULP_CLASS_HID_2594f] = 1781,
+	[BNXT_ULP_CLASS_HID_28703] = 1782,
+	[BNXT_ULP_CLASS_HID_31203] = 1783,
+	[BNXT_ULP_CLASS_HID_39d03] = 1784,
+	[BNXT_ULP_CLASS_HID_245bf] = 1785,
+	[BNXT_ULP_CLASS_HID_2d0bf] = 1786,
+	[BNXT_ULP_CLASS_HID_35bbf] = 1787,
+	[BNXT_ULP_CLASS_HID_38a73] = 1788,
+	[BNXT_ULP_CLASS_HID_24173] = 1789,
+	[BNXT_ULP_CLASS_HID_2cc73] = 1790,
+	[BNXT_ULP_CLASS_HID_35773] = 1791,
+	[BNXT_ULP_CLASS_HID_38507] = 1792,
+	[BNXT_ULP_CLASS_HID_25403] = 1793,
+	[BNXT_ULP_CLASS_HID_282d7] = 1794,
+	[BNXT_ULP_CLASS_HID_30dd7] = 1795,
+	[BNXT_ULP_CLASS_HID_398d7] = 1796,
+	[BNXT_ULP_CLASS_HID_244a3] = 1797,
+	[BNXT_ULP_CLASS_HID_2cfa3] = 1798,
+	[BNXT_ULP_CLASS_HID_35aa3] = 1799,
+	[BNXT_ULP_CLASS_HID_38977] = 1800,
+	[BNXT_ULP_CLASS_HID_23193] = 1801,
+	[BNXT_ULP_CLASS_HID_2bc93] = 1802,
+	[BNXT_ULP_CLASS_HID_34793] = 1803,
+	[BNXT_ULP_CLASS_HID_3d293] = 1804,
+	[BNXT_ULP_CLASS_HID_22ca7] = 1805,
+	[BNXT_ULP_CLASS_HID_2b7a7] = 1806,
+	[BNXT_ULP_CLASS_HID_342a7] = 1807,
+	[BNXT_ULP_CLASS_HID_3cda7] = 1808,
+	[BNXT_ULP_CLASS_HID_24077] = 1809,
+	[BNXT_ULP_CLASS_HID_2cb77] = 1810,
+	[BNXT_ULP_CLASS_HID_35677] = 1811,
+	[BNXT_ULP_CLASS_HID_3840b] = 1812,
+	[BNXT_ULP_CLASS_HID_20beb] = 1813,
+	[BNXT_ULP_CLASS_HID_296eb] = 1814,
+	[BNXT_ULP_CLASS_HID_321eb] = 1815,
+	[BNXT_ULP_CLASS_HID_3aceb] = 1816,
+	[BNXT_ULP_CLASS_HID_25507] = 1817,
+	[BNXT_ULP_CLASS_HID_283db] = 1818,
+	[BNXT_ULP_CLASS_HID_30edb] = 1819,
+	[BNXT_ULP_CLASS_HID_399db] = 1820,
+	[BNXT_ULP_CLASS_HID_250db] = 1821,
+	[BNXT_ULP_CLASS_HID_2dbdb] = 1822,
+	[BNXT_ULP_CLASS_HID_309ef] = 1823,
+	[BNXT_ULP_CLASS_HID_394ef] = 1824,
+	[BNXT_ULP_CLASS_HID_206bf] = 1825,
+	[BNXT_ULP_CLASS_HID_291bf] = 1826,
+	[BNXT_ULP_CLASS_HID_31cbf] = 1827,
+	[BNXT_ULP_CLASS_HID_3a7bf] = 1828,
+	[BNXT_ULP_CLASS_HID_22f1f] = 1829,
+	[BNXT_ULP_CLASS_HID_2ba1f] = 1830,
+	[BNXT_ULP_CLASS_HID_3451f] = 1831,
+	[BNXT_ULP_CLASS_HID_3d01f] = 1832,
+	[BNXT_ULP_CLASS_HID_21c4f] = 1833,
+	[BNXT_ULP_CLASS_HID_2a74f] = 1834,
+	[BNXT_ULP_CLASS_HID_3324f] = 1835,
+	[BNXT_ULP_CLASS_HID_3bd4f] = 1836,
+	[BNXT_ULP_CLASS_HID_21703] = 1837,
+	[BNXT_ULP_CLASS_HID_2a203] = 1838,
+	[BNXT_ULP_CLASS_HID_32d03] = 1839,
+	[BNXT_ULP_CLASS_HID_3b803] = 1840,
+	[BNXT_ULP_CLASS_HID_22ad3] = 1841,
+	[BNXT_ULP_CLASS_HID_2b5d3] = 1842,
+	[BNXT_ULP_CLASS_HID_340d3] = 1843,
+	[BNXT_ULP_CLASS_HID_3cbd3] = 1844,
+	[BNXT_ULP_CLASS_HID_252b3] = 1845,
+	[BNXT_ULP_CLASS_HID_28147] = 1846,
+	[BNXT_ULP_CLASS_HID_30c47] = 1847,
+	[BNXT_ULP_CLASS_HID_39747] = 1848,
+	[BNXT_ULP_CLASS_HID_23fe3] = 1849,
+	[BNXT_ULP_CLASS_HID_2cae3] = 1850,
+	[BNXT_ULP_CLASS_HID_355e3] = 1851,
+	[BNXT_ULP_CLASS_HID_383b7] = 1852,
+	[BNXT_ULP_CLASS_HID_23ab7] = 1853,
+	[BNXT_ULP_CLASS_HID_2c5b7] = 1854,
+	[BNXT_ULP_CLASS_HID_350b7] = 1855,
+	[BNXT_ULP_CLASS_HID_3dbb7] = 1856,
+	[BNXT_ULP_CLASS_HID_24e47] = 1857,
+	[BNXT_ULP_CLASS_HID_2d947] = 1858,
+	[BNXT_ULP_CLASS_HID_3071b] = 1859,
+	[BNXT_ULP_CLASS_HID_3921b] = 1860,
+	[BNXT_ULP_CLASS_HID_2326f] = 1861,
+	[BNXT_ULP_CLASS_HID_2bd6f] = 1862,
+	[BNXT_ULP_CLASS_HID_3486f] = 1863,
+	[BNXT_ULP_CLASS_HID_3d36f] = 1864,
+	[BNXT_ULP_CLASS_HID_21f5f] = 1865,
+	[BNXT_ULP_CLASS_HID_2aa5f] = 1866,
+	[BNXT_ULP_CLASS_HID_3355f] = 1867,
+	[BNXT_ULP_CLASS_HID_3c05f] = 1868,
+	[BNXT_ULP_CLASS_HID_21a13] = 1869,
+	[BNXT_ULP_CLASS_HID_2a513] = 1870,
+	[BNXT_ULP_CLASS_HID_33013] = 1871,
+	[BNXT_ULP_CLASS_HID_3bb13] = 1872,
+	[BNXT_ULP_CLASS_HID_22d23] = 1873,
+	[BNXT_ULP_CLASS_HID_2b823] = 1874,
+	[BNXT_ULP_CLASS_HID_34323] = 1875,
+	[BNXT_ULP_CLASS_HID_3ce23] = 1876,
+	[BNXT_ULP_CLASS_HID_25583] = 1877,
+	[BNXT_ULP_CLASS_HID_28457] = 1878,
+	[BNXT_ULP_CLASS_HID_30f57] = 1879,
+	[BNXT_ULP_CLASS_HID_39a57] = 1880,
+	[BNXT_ULP_CLASS_HID_242f3] = 1881,
+	[BNXT_ULP_CLASS_HID_2cdf3] = 1882,
+	[BNXT_ULP_CLASS_HID_358f3] = 1883,
+	[BNXT_ULP_CLASS_HID_38687] = 1884,
+	[BNXT_ULP_CLASS_HID_23d87] = 1885,
+	[BNXT_ULP_CLASS_HID_2c887] = 1886,
+	[BNXT_ULP_CLASS_HID_35387] = 1887,
+	[BNXT_ULP_CLASS_HID_3825b] = 1888,
+	[BNXT_ULP_CLASS_HID_25157] = 1889,
+	[BNXT_ULP_CLASS_HID_2dc57] = 1890,
+	[BNXT_ULP_CLASS_HID_30a6b] = 1891,
+	[BNXT_ULP_CLASS_HID_3956b] = 1892,
+	[BNXT_ULP_CLASS_HID_22c53] = 1893,
+	[BNXT_ULP_CLASS_HID_2b753] = 1894,
+	[BNXT_ULP_CLASS_HID_34253] = 1895,
+	[BNXT_ULP_CLASS_HID_3cd53] = 1896,
+	[BNXT_ULP_CLASS_HID_21883] = 1897,
+	[BNXT_ULP_CLASS_HID_2a383] = 1898,
+	[BNXT_ULP_CLASS_HID_32e83] = 1899,
+	[BNXT_ULP_CLASS_HID_3b983] = 1900,
+	[BNXT_ULP_CLASS_HID_21457] = 1901,
+	[BNXT_ULP_CLASS_HID_29f57] = 1902,
+	[BNXT_ULP_CLASS_HID_32a57] = 1903,
+	[BNXT_ULP_CLASS_HID_3b557] = 1904,
+	[BNXT_ULP_CLASS_HID_22767] = 1905,
+	[BNXT_ULP_CLASS_HID_2b267] = 1906,
+	[BNXT_ULP_CLASS_HID_33d67] = 1907,
+	[BNXT_ULP_CLASS_HID_3c867] = 1908,
+	[BNXT_ULP_CLASS_HID_24fc7] = 1909,
+	[BNXT_ULP_CLASS_HID_2dac7] = 1910,
+	[BNXT_ULP_CLASS_HID_3089b] = 1911,
+	[BNXT_ULP_CLASS_HID_3939b] = 1912,
+	[BNXT_ULP_CLASS_HID_23c37] = 1913,
+	[BNXT_ULP_CLASS_HID_2c737] = 1914,
+	[BNXT_ULP_CLASS_HID_35237] = 1915,
+	[BNXT_ULP_CLASS_HID_380cb] = 1916,
+	[BNXT_ULP_CLASS_HID_237cb] = 1917,
+	[BNXT_ULP_CLASS_HID_2c2cb] = 1918,
+	[BNXT_ULP_CLASS_HID_34dcb] = 1919,
+	[BNXT_ULP_CLASS_HID_3d8cb] = 1920,
+	[BNXT_ULP_CLASS_HID_24a9b] = 1921,
+	[BNXT_ULP_CLASS_HID_2d59b] = 1922,
+	[BNXT_ULP_CLASS_HID_303af] = 1923,
+	[BNXT_ULP_CLASS_HID_38eaf] = 1924,
+	[BNXT_ULP_CLASS_HID_253b] = 1925,
+	[BNXT_ULP_CLASS_HID_2bf7] = 1926,
+	[BNXT_ULP_CLASS_HID_4f6b] = 1927,
+	[BNXT_ULP_CLASS_HID_1653] = 1928,
+	[BNXT_ULP_CLASS_HID_39c7] = 1929,
+	[BNXT_ULP_CLASS_HID_48af] = 1930,
+	[BNXT_ULP_CLASS_HID_0f97] = 1931,
+	[BNXT_ULP_CLASS_HID_330b] = 1932,
+	[BNXT_ULP_CLASS_HID_374e] = 1933,
+	[BNXT_ULP_CLASS_HID_11ee] = 1934,
+	[BNXT_ULP_CLASS_HID_423a] = 1935,
+	[BNXT_ULP_CLASS_HID_0cd6] = 1936,
+	[BNXT_ULP_CLASS_HID_310a] = 1937,
+	[BNXT_ULP_CLASS_HID_469e] = 1938,
+	[BNXT_ULP_CLASS_HID_5ce6] = 1939,
+	[BNXT_ULP_CLASS_HID_0692] = 1940,
+	[BNXT_ULP_CLASS_HID_1c7e] = 1941,
+	[BNXT_ULP_CLASS_HID_55c2] = 1942,
+	[BNXT_ULP_CLASS_HID_2b2a] = 1943,
+	[BNXT_ULP_CLASS_HID_15c6] = 1944,
+	[BNXT_ULP_CLASS_HID_163a] = 1945,
+	[BNXT_ULP_CLASS_HID_2f8e] = 1946,
+	[BNXT_ULP_CLASS_HID_2516] = 1947,
+	[BNXT_ULP_CLASS_HID_4b76] = 1948,
+	[BNXT_ULP_CLASS_HID_10e6] = 1949,
+	[BNXT_ULP_CLASS_HID_264a] = 1950,
+	[BNXT_ULP_CLASS_HID_3fd2] = 1951,
+	[BNXT_ULP_CLASS_HID_4532] = 1952,
+	[BNXT_ULP_CLASS_HID_4996] = 1953,
+	[BNXT_ULP_CLASS_HID_2036] = 1954,
+	[BNXT_ULP_CLASS_HID_399e] = 1955,
+	[BNXT_ULP_CLASS_HID_5ffe] = 1956,
+	[BNXT_ULP_CLASS_HID_34fe] = 1957,
+	[BNXT_ULP_CLASS_HID_3a32] = 1958,
+	[BNXT_ULP_CLASS_HID_376e] = 1959,
+	[BNXT_ULP_CLASS_HID_12d6e] = 1960,
+	[BNXT_ULP_CLASS_HID_2436e] = 1961,
+	[BNXT_ULP_CLASS_HID_31dba] = 1962,
+	[BNXT_ULP_CLASS_HID_11ce] = 1963,
+	[BNXT_ULP_CLASS_HID_107ce] = 1964,
+	[BNXT_ULP_CLASS_HID_23dce] = 1965,
+	[BNXT_ULP_CLASS_HID_353ce] = 1966,
+	[BNXT_ULP_CLASS_HID_421a] = 1967,
+	[BNXT_ULP_CLASS_HID_11d56] = 1968,
+	[BNXT_ULP_CLASS_HID_23356] = 1969,
+	[BNXT_ULP_CLASS_HID_32956] = 1970,
+	[BNXT_ULP_CLASS_HID_0cf6] = 1971,
+	[BNXT_ULP_CLASS_HID_122f6] = 1972,
+	[BNXT_ULP_CLASS_HID_258f6] = 1973,
+	[BNXT_ULP_CLASS_HID_313c2] = 1974,
+	[BNXT_ULP_CLASS_HID_312a] = 1975,
+	[BNXT_ULP_CLASS_HID_1272a] = 1976,
+	[BNXT_ULP_CLASS_HID_25d2a] = 1977,
+	[BNXT_ULP_CLASS_HID_31466] = 1978,
+	[BNXT_ULP_CLASS_HID_46be] = 1979,
+	[BNXT_ULP_CLASS_HID_1018a] = 1980,
+	[BNXT_ULP_CLASS_HID_2378a] = 1981,
+	[BNXT_ULP_CLASS_HID_32d8a] = 1982,
+	[BNXT_ULP_CLASS_HID_5cc6] = 1983,
+	[BNXT_ULP_CLASS_HID_11712] = 1984,
+	[BNXT_ULP_CLASS_HID_20d12] = 1985,
+	[BNXT_ULP_CLASS_HID_32312] = 1986,
+	[BNXT_ULP_CLASS_HID_06b2] = 1987,
+	[BNXT_ULP_CLASS_HID_13cb2] = 1988,
+	[BNXT_ULP_CLASS_HID_252b2] = 1989,
+	[BNXT_ULP_CLASS_HID_348b2] = 1990,
+	[BNXT_ULP_CLASS_HID_1c5e] = 1991,
+	[BNXT_ULP_CLASS_HID_1325e] = 1992,
+	[BNXT_ULP_CLASS_HID_2285e] = 1993,
+	[BNXT_ULP_CLASS_HID_35e5e] = 1994,
+	[BNXT_ULP_CLASS_HID_55e2] = 1995,
+	[BNXT_ULP_CLASS_HID_14be2] = 1996,
+	[BNXT_ULP_CLASS_HID_2023e] = 1997,
+	[BNXT_ULP_CLASS_HID_3383e] = 1998,
+	[BNXT_ULP_CLASS_HID_2b0a] = 1999,
+	[BNXT_ULP_CLASS_HID_1410a] = 2000,
+	[BNXT_ULP_CLASS_HID_21846] = 2001,
+	[BNXT_ULP_CLASS_HID_30e46] = 2002,
+	[BNXT_ULP_CLASS_HID_15e6] = 2003,
+	[BNXT_ULP_CLASS_HID_10be6] = 2004,
+	[BNXT_ULP_CLASS_HID_221e6] = 2005,
+	[BNXT_ULP_CLASS_HID_357e6] = 2006,
+	[BNXT_ULP_CLASS_HID_161a] = 2007,
+	[BNXT_ULP_CLASS_HID_10c1a] = 2008,
+	[BNXT_ULP_CLASS_HID_2221a] = 2009,
+	[BNXT_ULP_CLASS_HID_3581a] = 2010,
+	[BNXT_ULP_CLASS_HID_2fae] = 2011,
+	[BNXT_ULP_CLASS_HID_145ae] = 2012,
+	[BNXT_ULP_CLASS_HID_21cfa] = 2013,
+	[BNXT_ULP_CLASS_HID_332fa] = 2014,
+	[BNXT_ULP_CLASS_HID_2536] = 2015,
+	[BNXT_ULP_CLASS_HID_15b36] = 2016,
+	[BNXT_ULP_CLASS_HID_21202] = 2017,
+	[BNXT_ULP_CLASS_HID_30802] = 2018,
+	[BNXT_ULP_CLASS_HID_4b56] = 2019,
+	[BNXT_ULP_CLASS_HID_105a2] = 2020,
+	[BNXT_ULP_CLASS_HID_23ba2] = 2021,
+	[BNXT_ULP_CLASS_HID_351a2] = 2022,
+	[BNXT_ULP_CLASS_HID_10c6] = 2023,
+	[BNXT_ULP_CLASS_HID_106c6] = 2024,
+	[BNXT_ULP_CLASS_HID_23cc6] = 2025,
+	[BNXT_ULP_CLASS_HID_352c6] = 2026,
+	[BNXT_ULP_CLASS_HID_266a] = 2027,
+	[BNXT_ULP_CLASS_HID_15c6a] = 2028,
+	[BNXT_ULP_CLASS_HID_216a6] = 2029,
+	[BNXT_ULP_CLASS_HID_30ca6] = 2030,
+	[BNXT_ULP_CLASS_HID_3ff2] = 2031,
+	[BNXT_ULP_CLASS_HID_155f2] = 2032,
+	[BNXT_ULP_CLASS_HID_24bf2] = 2033,
+	[BNXT_ULP_CLASS_HID_302ce] = 2034,
+	[BNXT_ULP_CLASS_HID_4512] = 2035,
+	[BNXT_ULP_CLASS_HID_11c6e] = 2036,
+	[BNXT_ULP_CLASS_HID_2326e] = 2037,
+	[BNXT_ULP_CLASS_HID_3286e] = 2038,
+	[BNXT_ULP_CLASS_HID_49b6] = 2039,
+	[BNXT_ULP_CLASS_HID_10082] = 2040,
+	[BNXT_ULP_CLASS_HID_23682] = 2041,
+	[BNXT_ULP_CLASS_HID_32c82] = 2042,
+	[BNXT_ULP_CLASS_HID_2016] = 2043,
+	[BNXT_ULP_CLASS_HID_15616] = 2044,
+	[BNXT_ULP_CLASS_HID_21162] = 2045,
+	[BNXT_ULP_CLASS_HID_30762] = 2046,
+	[BNXT_ULP_CLASS_HID_39be] = 2047,
+	[BNXT_ULP_CLASS_HID_12fbe] = 2048,
+	[BNXT_ULP_CLASS_HID_245be] = 2049,
+	[BNXT_ULP_CLASS_HID_31c8a] = 2050,
+	[BNXT_ULP_CLASS_HID_5fde] = 2051,
+	[BNXT_ULP_CLASS_HID_1162a] = 2052,
+	[BNXT_ULP_CLASS_HID_20c2a] = 2053,
+	[BNXT_ULP_CLASS_HID_3222a] = 2054,
+	[BNXT_ULP_CLASS_HID_34de] = 2055,
+	[BNXT_ULP_CLASS_HID_3a12] = 2056,
+	[BNXT_ULP_CLASS_HID_370e] = 2057,
+	[BNXT_ULP_CLASS_HID_12d0e] = 2058,
+	[BNXT_ULP_CLASS_HID_2430e] = 2059,
+	[BNXT_ULP_CLASS_HID_31dda] = 2060,
+	[BNXT_ULP_CLASS_HID_11ae] = 2061,
+	[BNXT_ULP_CLASS_HID_107ae] = 2062,
+	[BNXT_ULP_CLASS_HID_23dae] = 2063,
+	[BNXT_ULP_CLASS_HID_353ae] = 2064,
+	[BNXT_ULP_CLASS_HID_427a] = 2065,
+	[BNXT_ULP_CLASS_HID_11d36] = 2066,
+	[BNXT_ULP_CLASS_HID_23336] = 2067,
+	[BNXT_ULP_CLASS_HID_32936] = 2068,
+	[BNXT_ULP_CLASS_HID_0c96] = 2069,
+	[BNXT_ULP_CLASS_HID_12296] = 2070,
+	[BNXT_ULP_CLASS_HID_25896] = 2071,
+	[BNXT_ULP_CLASS_HID_313a2] = 2072,
+	[BNXT_ULP_CLASS_HID_314a] = 2073,
+	[BNXT_ULP_CLASS_HID_1274a] = 2074,
+	[BNXT_ULP_CLASS_HID_25d4a] = 2075,
+	[BNXT_ULP_CLASS_HID_31406] = 2076,
+	[BNXT_ULP_CLASS_HID_46de] = 2077,
+	[BNXT_ULP_CLASS_HID_101ea] = 2078,
+	[BNXT_ULP_CLASS_HID_237ea] = 2079,
+	[BNXT_ULP_CLASS_HID_32dea] = 2080,
+	[BNXT_ULP_CLASS_HID_5ca6] = 2081,
+	[BNXT_ULP_CLASS_HID_11772] = 2082,
+	[BNXT_ULP_CLASS_HID_20d72] = 2083,
+	[BNXT_ULP_CLASS_HID_32372] = 2084,
+	[BNXT_ULP_CLASS_HID_06d2] = 2085,
+	[BNXT_ULP_CLASS_HID_13cd2] = 2086,
+	[BNXT_ULP_CLASS_HID_252d2] = 2087,
+	[BNXT_ULP_CLASS_HID_348d2] = 2088,
+	[BNXT_ULP_CLASS_HID_1c3e] = 2089,
+	[BNXT_ULP_CLASS_HID_1323e] = 2090,
+	[BNXT_ULP_CLASS_HID_2283e] = 2091,
+	[BNXT_ULP_CLASS_HID_35e3e] = 2092,
+	[BNXT_ULP_CLASS_HID_5582] = 2093,
+	[BNXT_ULP_CLASS_HID_14b82] = 2094,
+	[BNXT_ULP_CLASS_HID_2025e] = 2095,
+	[BNXT_ULP_CLASS_HID_3385e] = 2096,
+	[BNXT_ULP_CLASS_HID_2b6a] = 2097,
+	[BNXT_ULP_CLASS_HID_1416a] = 2098,
+	[BNXT_ULP_CLASS_HID_21826] = 2099,
+	[BNXT_ULP_CLASS_HID_30e26] = 2100,
+	[BNXT_ULP_CLASS_HID_1586] = 2101,
+	[BNXT_ULP_CLASS_HID_10b86] = 2102,
+	[BNXT_ULP_CLASS_HID_22186] = 2103,
+	[BNXT_ULP_CLASS_HID_35786] = 2104,
+	[BNXT_ULP_CLASS_HID_167a] = 2105,
+	[BNXT_ULP_CLASS_HID_10c7a] = 2106,
+	[BNXT_ULP_CLASS_HID_2227a] = 2107,
+	[BNXT_ULP_CLASS_HID_3587a] = 2108,
+	[BNXT_ULP_CLASS_HID_2fce] = 2109,
+	[BNXT_ULP_CLASS_HID_145ce] = 2110,
+	[BNXT_ULP_CLASS_HID_21c9a] = 2111,
+	[BNXT_ULP_CLASS_HID_3329a] = 2112,
+	[BNXT_ULP_CLASS_HID_2556] = 2113,
+	[BNXT_ULP_CLASS_HID_15b56] = 2114,
+	[BNXT_ULP_CLASS_HID_21262] = 2115,
+	[BNXT_ULP_CLASS_HID_30862] = 2116,
+	[BNXT_ULP_CLASS_HID_4b36] = 2117,
+	[BNXT_ULP_CLASS_HID_105c2] = 2118,
+	[BNXT_ULP_CLASS_HID_23bc2] = 2119,
+	[BNXT_ULP_CLASS_HID_351c2] = 2120,
+	[BNXT_ULP_CLASS_HID_10a6] = 2121,
+	[BNXT_ULP_CLASS_HID_106a6] = 2122,
+	[BNXT_ULP_CLASS_HID_23ca6] = 2123,
+	[BNXT_ULP_CLASS_HID_352a6] = 2124,
+	[BNXT_ULP_CLASS_HID_260a] = 2125,
+	[BNXT_ULP_CLASS_HID_15c0a] = 2126,
+	[BNXT_ULP_CLASS_HID_216c6] = 2127,
+	[BNXT_ULP_CLASS_HID_30cc6] = 2128,
+	[BNXT_ULP_CLASS_HID_3f92] = 2129,
+	[BNXT_ULP_CLASS_HID_15592] = 2130,
+	[BNXT_ULP_CLASS_HID_24b92] = 2131,
+	[BNXT_ULP_CLASS_HID_302ae] = 2132,
+	[BNXT_ULP_CLASS_HID_4572] = 2133,
+	[BNXT_ULP_CLASS_HID_11c0e] = 2134,
+	[BNXT_ULP_CLASS_HID_2320e] = 2135,
+	[BNXT_ULP_CLASS_HID_3280e] = 2136,
+	[BNXT_ULP_CLASS_HID_49d6] = 2137,
+	[BNXT_ULP_CLASS_HID_100e2] = 2138,
+	[BNXT_ULP_CLASS_HID_236e2] = 2139,
+	[BNXT_ULP_CLASS_HID_32ce2] = 2140,
+	[BNXT_ULP_CLASS_HID_2076] = 2141,
+	[BNXT_ULP_CLASS_HID_15676] = 2142,
+	[BNXT_ULP_CLASS_HID_21102] = 2143,
+	[BNXT_ULP_CLASS_HID_30702] = 2144,
+	[BNXT_ULP_CLASS_HID_39de] = 2145,
+	[BNXT_ULP_CLASS_HID_12fde] = 2146,
+	[BNXT_ULP_CLASS_HID_245de] = 2147,
+	[BNXT_ULP_CLASS_HID_31cea] = 2148,
+	[BNXT_ULP_CLASS_HID_5fbe] = 2149,
+	[BNXT_ULP_CLASS_HID_1164a] = 2150,
+	[BNXT_ULP_CLASS_HID_20c4a] = 2151,
+	[BNXT_ULP_CLASS_HID_3224a] = 2152,
+	[BNXT_ULP_CLASS_HID_34be] = 2153,
+	[BNXT_ULP_CLASS_HID_3a72] = 2154,
+	[BNXT_ULP_CLASS_HID_09ea] = 2155,
+	[BNXT_ULP_CLASS_HID_2912] = 2156,
+	[BNXT_ULP_CLASS_HID_03b2] = 2157,
+	[BNXT_ULP_CLASS_HID_5f7e] = 2158,
+	[BNXT_ULP_CLASS_HID_03a6] = 2159,
+	[BNXT_ULP_CLASS_HID_23ce] = 2160,
+	[BNXT_ULP_CLASS_HID_1a6e] = 2161,
+	[BNXT_ULP_CLASS_HID_593a] = 2162,
+	[BNXT_ULP_CLASS_HID_4dce] = 2163,
+	[BNXT_ULP_CLASS_HID_0e02] = 2164,
+	[BNXT_ULP_CLASS_HID_4796] = 2165,
+	[BNXT_ULP_CLASS_HID_246e] = 2166,
+	[BNXT_ULP_CLASS_HID_478a] = 2167,
+	[BNXT_ULP_CLASS_HID_08fe] = 2168,
+	[BNXT_ULP_CLASS_HID_5e52] = 2169,
+	[BNXT_ULP_CLASS_HID_3e2a] = 2170,
+	[BNXT_ULP_CLASS_HID_5e46] = 2171,
+	[BNXT_ULP_CLASS_HID_02ba] = 2172,
+	[BNXT_ULP_CLASS_HID_580e] = 2173,
+	[BNXT_ULP_CLASS_HID_38e6] = 2174,
+	[BNXT_ULP_CLASS_HID_5802] = 2175,
+	[BNXT_ULP_CLASS_HID_1d76] = 2176,
+	[BNXT_ULP_CLASS_HID_52ca] = 2177,
+	[BNXT_ULP_CLASS_HID_32a2] = 2178,
+	[BNXT_ULP_CLASS_HID_34f6] = 2179,
+	[BNXT_ULP_CLASS_HID_3a3a] = 2180,
+	[BNXT_ULP_CLASS_HID_09ca] = 2181,
+	[BNXT_ULP_CLASS_HID_0216] = 2182,
+	[BNXT_ULP_CLASS_HID_1f62] = 2183,
+	[BNXT_ULP_CLASS_HID_1bae] = 2184,
+	[BNXT_ULP_CLASS_HID_2932] = 2185,
+	[BNXT_ULP_CLASS_HID_227e] = 2186,
+	[BNXT_ULP_CLASS_HID_3f4a] = 2187,
+	[BNXT_ULP_CLASS_HID_3b96] = 2188,
+	[BNXT_ULP_CLASS_HID_0392] = 2189,
+	[BNXT_ULP_CLASS_HID_1cde] = 2190,
+	[BNXT_ULP_CLASS_HID_192a] = 2191,
+	[BNXT_ULP_CLASS_HID_1276] = 2192,
+	[BNXT_ULP_CLASS_HID_5f5e] = 2193,
+	[BNXT_ULP_CLASS_HID_5baa] = 2194,
+	[BNXT_ULP_CLASS_HID_54f6] = 2195,
+	[BNXT_ULP_CLASS_HID_51c2] = 2196,
+	[BNXT_ULP_CLASS_HID_0386] = 2197,
+	[BNXT_ULP_CLASS_HID_1cd2] = 2198,
+	[BNXT_ULP_CLASS_HID_191e] = 2199,
+	[BNXT_ULP_CLASS_HID_126a] = 2200,
+	[BNXT_ULP_CLASS_HID_23ee] = 2201,
+	[BNXT_ULP_CLASS_HID_3c3a] = 2202,
+	[BNXT_ULP_CLASS_HID_3906] = 2203,
+	[BNXT_ULP_CLASS_HID_3252] = 2204,
+	[BNXT_ULP_CLASS_HID_1a4e] = 2205,
+	[BNXT_ULP_CLASS_HID_169a] = 2206,
+	[BNXT_ULP_CLASS_HID_13e6] = 2207,
+	[BNXT_ULP_CLASS_HID_4be6] = 2208,
+	[BNXT_ULP_CLASS_HID_591a] = 2209,
+	[BNXT_ULP_CLASS_HID_5266] = 2210,
+	[BNXT_ULP_CLASS_HID_2eb2] = 2211,
+	[BNXT_ULP_CLASS_HID_2bfe] = 2212,
+	[BNXT_ULP_CLASS_HID_4dee] = 2213,
+	[BNXT_ULP_CLASS_HID_463a] = 2214,
+	[BNXT_ULP_CLASS_HID_4306] = 2215,
+	[BNXT_ULP_CLASS_HID_5c52] = 2216,
+	[BNXT_ULP_CLASS_HID_0e22] = 2217,
+	[BNXT_ULP_CLASS_HID_0b6e] = 2218,
+	[BNXT_ULP_CLASS_HID_07ba] = 2219,
+	[BNXT_ULP_CLASS_HID_0086] = 2220,
+	[BNXT_ULP_CLASS_HID_47b6] = 2221,
+	[BNXT_ULP_CLASS_HID_4082] = 2222,
+	[BNXT_ULP_CLASS_HID_5dce] = 2223,
+	[BNXT_ULP_CLASS_HID_561a] = 2224,
+	[BNXT_ULP_CLASS_HID_244e] = 2225,
+	[BNXT_ULP_CLASS_HID_209a] = 2226,
+	[BNXT_ULP_CLASS_HID_3de6] = 2227,
+	[BNXT_ULP_CLASS_HID_3632] = 2228,
+	[BNXT_ULP_CLASS_HID_47aa] = 2229,
+	[BNXT_ULP_CLASS_HID_40f6] = 2230,
+	[BNXT_ULP_CLASS_HID_5dc2] = 2231,
+	[BNXT_ULP_CLASS_HID_560e] = 2232,
+	[BNXT_ULP_CLASS_HID_08de] = 2233,
+	[BNXT_ULP_CLASS_HID_052a] = 2234,
+	[BNXT_ULP_CLASS_HID_1e76] = 2235,
+	[BNXT_ULP_CLASS_HID_1b42] = 2236,
+	[BNXT_ULP_CLASS_HID_5e72] = 2237,
+	[BNXT_ULP_CLASS_HID_5abe] = 2238,
+	[BNXT_ULP_CLASS_HID_578a] = 2239,
+	[BNXT_ULP_CLASS_HID_50d6] = 2240,
+	[BNXT_ULP_CLASS_HID_3e0a] = 2241,
+	[BNXT_ULP_CLASS_HID_3b56] = 2242,
+	[BNXT_ULP_CLASS_HID_37a2] = 2243,
+	[BNXT_ULP_CLASS_HID_30ee] = 2244,
+	[BNXT_ULP_CLASS_HID_5e66] = 2245,
+	[BNXT_ULP_CLASS_HID_5ab2] = 2246,
+	[BNXT_ULP_CLASS_HID_57fe] = 2247,
+	[BNXT_ULP_CLASS_HID_50ca] = 2248,
+	[BNXT_ULP_CLASS_HID_029a] = 2249,
+	[BNXT_ULP_CLASS_HID_1fe6] = 2250,
+	[BNXT_ULP_CLASS_HID_1832] = 2251,
+	[BNXT_ULP_CLASS_HID_157e] = 2252,
+	[BNXT_ULP_CLASS_HID_582e] = 2253,
+	[BNXT_ULP_CLASS_HID_557a] = 2254,
+	[BNXT_ULP_CLASS_HID_2e46] = 2255,
+	[BNXT_ULP_CLASS_HID_2a92] = 2256,
+	[BNXT_ULP_CLASS_HID_38c6] = 2257,
+	[BNXT_ULP_CLASS_HID_3512] = 2258,
+	[BNXT_ULP_CLASS_HID_0e5e] = 2259,
+	[BNXT_ULP_CLASS_HID_0aaa] = 2260,
+	[BNXT_ULP_CLASS_HID_5822] = 2261,
+	[BNXT_ULP_CLASS_HID_556e] = 2262,
+	[BNXT_ULP_CLASS_HID_51ba] = 2263,
+	[BNXT_ULP_CLASS_HID_2a86] = 2264,
+	[BNXT_ULP_CLASS_HID_1d56] = 2265,
+	[BNXT_ULP_CLASS_HID_19a2] = 2266,
+	[BNXT_ULP_CLASS_HID_12ee] = 2267,
+	[BNXT_ULP_CLASS_HID_4aee] = 2268,
+	[BNXT_ULP_CLASS_HID_52ea] = 2269,
+	[BNXT_ULP_CLASS_HID_2f36] = 2270,
+	[BNXT_ULP_CLASS_HID_2802] = 2271,
+	[BNXT_ULP_CLASS_HID_254e] = 2272,
+	[BNXT_ULP_CLASS_HID_3282] = 2273,
+	[BNXT_ULP_CLASS_HID_0fce] = 2274,
+	[BNXT_ULP_CLASS_HID_081a] = 2275,
+	[BNXT_ULP_CLASS_HID_0566] = 2276,
+	[BNXT_ULP_CLASS_HID_34d6] = 2277,
+	[BNXT_ULP_CLASS_HID_3a1a] = 2278,
+	[BNXT_ULP_CLASS_HID_09aa] = 2279,
+	[BNXT_ULP_CLASS_HID_0276] = 2280,
+	[BNXT_ULP_CLASS_HID_1f02] = 2281,
+	[BNXT_ULP_CLASS_HID_1bce] = 2282,
+	[BNXT_ULP_CLASS_HID_2952] = 2283,
+	[BNXT_ULP_CLASS_HID_221e] = 2284,
+	[BNXT_ULP_CLASS_HID_3f2a] = 2285,
+	[BNXT_ULP_CLASS_HID_3bf6] = 2286,
+	[BNXT_ULP_CLASS_HID_03f2] = 2287,
+	[BNXT_ULP_CLASS_HID_1cbe] = 2288,
+	[BNXT_ULP_CLASS_HID_194a] = 2289,
+	[BNXT_ULP_CLASS_HID_1216] = 2290,
+	[BNXT_ULP_CLASS_HID_5f3e] = 2291,
+	[BNXT_ULP_CLASS_HID_5bca] = 2292,
+	[BNXT_ULP_CLASS_HID_5496] = 2293,
+	[BNXT_ULP_CLASS_HID_51a2] = 2294,
+	[BNXT_ULP_CLASS_HID_03e6] = 2295,
+	[BNXT_ULP_CLASS_HID_1cb2] = 2296,
+	[BNXT_ULP_CLASS_HID_197e] = 2297,
+	[BNXT_ULP_CLASS_HID_120a] = 2298,
+	[BNXT_ULP_CLASS_HID_238e] = 2299,
+	[BNXT_ULP_CLASS_HID_3c5a] = 2300,
+	[BNXT_ULP_CLASS_HID_3966] = 2301,
+	[BNXT_ULP_CLASS_HID_3232] = 2302,
+	[BNXT_ULP_CLASS_HID_1a2e] = 2303,
+	[BNXT_ULP_CLASS_HID_16fa] = 2304,
+	[BNXT_ULP_CLASS_HID_1386] = 2305,
+	[BNXT_ULP_CLASS_HID_4b86] = 2306,
+	[BNXT_ULP_CLASS_HID_597a] = 2307,
+	[BNXT_ULP_CLASS_HID_5206] = 2308,
+	[BNXT_ULP_CLASS_HID_2ed2] = 2309,
+	[BNXT_ULP_CLASS_HID_2b9e] = 2310,
+	[BNXT_ULP_CLASS_HID_4d8e] = 2311,
+	[BNXT_ULP_CLASS_HID_465a] = 2312,
+	[BNXT_ULP_CLASS_HID_4366] = 2313,
+	[BNXT_ULP_CLASS_HID_5c32] = 2314,
+	[BNXT_ULP_CLASS_HID_0e42] = 2315,
+	[BNXT_ULP_CLASS_HID_0b0e] = 2316,
+	[BNXT_ULP_CLASS_HID_07da] = 2317,
+	[BNXT_ULP_CLASS_HID_00e6] = 2318,
+	[BNXT_ULP_CLASS_HID_47d6] = 2319,
+	[BNXT_ULP_CLASS_HID_40e2] = 2320,
+	[BNXT_ULP_CLASS_HID_5dae] = 2321,
+	[BNXT_ULP_CLASS_HID_567a] = 2322,
+	[BNXT_ULP_CLASS_HID_242e] = 2323,
+	[BNXT_ULP_CLASS_HID_20fa] = 2324,
+	[BNXT_ULP_CLASS_HID_3d86] = 2325,
+	[BNXT_ULP_CLASS_HID_3652] = 2326,
+	[BNXT_ULP_CLASS_HID_47ca] = 2327,
+	[BNXT_ULP_CLASS_HID_4096] = 2328,
+	[BNXT_ULP_CLASS_HID_5da2] = 2329,
+	[BNXT_ULP_CLASS_HID_566e] = 2330,
+	[BNXT_ULP_CLASS_HID_08be] = 2331,
+	[BNXT_ULP_CLASS_HID_054a] = 2332,
+	[BNXT_ULP_CLASS_HID_1e16] = 2333,
+	[BNXT_ULP_CLASS_HID_1b22] = 2334,
+	[BNXT_ULP_CLASS_HID_5e12] = 2335,
+	[BNXT_ULP_CLASS_HID_5ade] = 2336,
+	[BNXT_ULP_CLASS_HID_57ea] = 2337,
+	[BNXT_ULP_CLASS_HID_50b6] = 2338,
+	[BNXT_ULP_CLASS_HID_3e6a] = 2339,
+	[BNXT_ULP_CLASS_HID_3b36] = 2340,
+	[BNXT_ULP_CLASS_HID_37c2] = 2341,
+	[BNXT_ULP_CLASS_HID_308e] = 2342,
+	[BNXT_ULP_CLASS_HID_5e06] = 2343,
+	[BNXT_ULP_CLASS_HID_5ad2] = 2344,
+	[BNXT_ULP_CLASS_HID_579e] = 2345,
+	[BNXT_ULP_CLASS_HID_50aa] = 2346,
+	[BNXT_ULP_CLASS_HID_02fa] = 2347,
+	[BNXT_ULP_CLASS_HID_1f86] = 2348,
+	[BNXT_ULP_CLASS_HID_1852] = 2349,
+	[BNXT_ULP_CLASS_HID_151e] = 2350,
+	[BNXT_ULP_CLASS_HID_584e] = 2351,
+	[BNXT_ULP_CLASS_HID_551a] = 2352,
+	[BNXT_ULP_CLASS_HID_2e26] = 2353,
+	[BNXT_ULP_CLASS_HID_2af2] = 2354,
+	[BNXT_ULP_CLASS_HID_38a6] = 2355,
+	[BNXT_ULP_CLASS_HID_3572] = 2356,
+	[BNXT_ULP_CLASS_HID_0e3e] = 2357,
+	[BNXT_ULP_CLASS_HID_0aca] = 2358,
+	[BNXT_ULP_CLASS_HID_5842] = 2359,
+	[BNXT_ULP_CLASS_HID_550e] = 2360,
+	[BNXT_ULP_CLASS_HID_51da] = 2361,
+	[BNXT_ULP_CLASS_HID_2ae6] = 2362,
+	[BNXT_ULP_CLASS_HID_1d36] = 2363,
+	[BNXT_ULP_CLASS_HID_19c2] = 2364,
+	[BNXT_ULP_CLASS_HID_128e] = 2365,
+	[BNXT_ULP_CLASS_HID_4a8e] = 2366,
+	[BNXT_ULP_CLASS_HID_528a] = 2367,
+	[BNXT_ULP_CLASS_HID_2f56] = 2368,
+	[BNXT_ULP_CLASS_HID_2862] = 2369,
+	[BNXT_ULP_CLASS_HID_252e] = 2370,
+	[BNXT_ULP_CLASS_HID_32e2] = 2371,
+	[BNXT_ULP_CLASS_HID_0fae] = 2372,
+	[BNXT_ULP_CLASS_HID_087a] = 2373,
+	[BNXT_ULP_CLASS_HID_0506] = 2374,
+	[BNXT_ULP_CLASS_HID_34b6] = 2375,
+	[BNXT_ULP_CLASS_HID_3a7a] = 2376,
+	[BNXT_ULP_CLASS_HID_a73c] = 2377,
+	[BNXT_ULP_CLASS_HID_a040] = 2378,
+	[BNXT_ULP_CLASS_HID_1d640] = 2379,
+	[BNXT_ULP_CLASS_HID_1dd3c] = 2380,
+	[BNXT_ULP_CLASS_HID_cba0] = 2381,
+	[BNXT_ULP_CLASS_HID_c4f4] = 2382,
+	[BNXT_ULP_CLASS_HID_19f38] = 2383,
+	[BNXT_ULP_CLASS_HID_182f4] = 2384,
+	[BNXT_ULP_CLASS_HID_b098] = 2385,
+	[BNXT_ULP_CLASS_HID_8dac] = 2386,
+	[BNXT_ULP_CLASS_HID_1a3ac] = 2387,
+	[BNXT_ULP_CLASS_HID_1a698] = 2388,
+	[BNXT_ULP_CLASS_HID_d50c] = 2389,
+	[BNXT_ULP_CLASS_HID_ae50] = 2390,
+	[BNXT_ULP_CLASS_HID_1c450] = 2391,
+	[BNXT_ULP_CLASS_HID_1cb0c] = 2392,
+	[BNXT_ULP_CLASS_HID_a1f0] = 2393,
+	[BNXT_ULP_CLASS_HID_ba04] = 2394,
+	[BNXT_ULP_CLASS_HID_1d004] = 2395,
+	[BNXT_ULP_CLASS_HID_1d7f0] = 2396,
+	[BNXT_ULP_CLASS_HID_c264] = 2397,
+	[BNXT_ULP_CLASS_HID_dea8] = 2398,
+	[BNXT_ULP_CLASS_HID_199fc] = 2399,
+	[BNXT_ULP_CLASS_HID_19ca8] = 2400,
+	[BNXT_ULP_CLASS_HID_8b5c] = 2401,
+	[BNXT_ULP_CLASS_HID_8460] = 2402,
+	[BNXT_ULP_CLASS_HID_1ba60] = 2403,
+	[BNXT_ULP_CLASS_HID_1a15c] = 2404,
+	[BNXT_ULP_CLASS_HID_afc0] = 2405,
+	[BNXT_ULP_CLASS_HID_a814] = 2406,
+	[BNXT_ULP_CLASS_HID_1de14] = 2407,
+	[BNXT_ULP_CLASS_HID_1c5c0] = 2408,
+	[BNXT_ULP_CLASS_HID_8c2c] = 2409,
+	[BNXT_ULP_CLASS_HID_8970] = 2410,
+	[BNXT_ULP_CLASS_HID_1bf70] = 2411,
+	[BNXT_ULP_CLASS_HID_1a22c] = 2412,
+	[BNXT_ULP_CLASS_HID_d0d0] = 2413,
+	[BNXT_ULP_CLASS_HID_ade4] = 2414,
+	[BNXT_ULP_CLASS_HID_1c3e4] = 2415,
+	[BNXT_ULP_CLASS_HID_1c6d0] = 2416,
+	[BNXT_ULP_CLASS_HID_9988] = 2417,
+	[BNXT_ULP_CLASS_HID_92dc] = 2418,
+	[BNXT_ULP_CLASS_HID_188dc] = 2419,
+	[BNXT_ULP_CLASS_HID_18f88] = 2420,
+	[BNXT_ULP_CLASS_HID_ba3c] = 2421,
+	[BNXT_ULP_CLASS_HID_b740] = 2422,
+	[BNXT_ULP_CLASS_HID_1ad40] = 2423,
+	[BNXT_ULP_CLASS_HID_1d03c] = 2424,
+	[BNXT_ULP_CLASS_HID_86e0] = 2425,
+	[BNXT_ULP_CLASS_HID_8334] = 2426,
+	[BNXT_ULP_CLASS_HID_1b934] = 2427,
+	[BNXT_ULP_CLASS_HID_1bce0] = 2428,
+	[BNXT_ULP_CLASS_HID_aa94] = 2429,
+	[BNXT_ULP_CLASS_HID_a7d8] = 2430,
+	[BNXT_ULP_CLASS_HID_1ddd8] = 2431,
+	[BNXT_ULP_CLASS_HID_1c094] = 2432,
+	[BNXT_ULP_CLASS_HID_904c] = 2433,
+	[BNXT_ULP_CLASS_HID_c84c] = 2434,
+	[BNXT_ULP_CLASS_HID_18290] = 2435,
+	[BNXT_ULP_CLASS_HID_1864c] = 2436,
+	[BNXT_ULP_CLASS_HID_b4f0] = 2437,
+	[BNXT_ULP_CLASS_HID_b104] = 2438,
+	[BNXT_ULP_CLASS_HID_1a704] = 2439,
+	[BNXT_ULP_CLASS_HID_1aaf0] = 2440,
+	[BNXT_ULP_CLASS_HID_80a4] = 2441,
+	[BNXT_ULP_CLASS_HID_9de8] = 2442,
+	[BNXT_ULP_CLASS_HID_1b3e8] = 2443,
+	[BNXT_ULP_CLASS_HID_1b6a4] = 2444,
+	[BNXT_ULP_CLASS_HID_a548] = 2445,
+	[BNXT_ULP_CLASS_HID_a19c] = 2446,
+	[BNXT_ULP_CLASS_HID_1d79c] = 2447,
+	[BNXT_ULP_CLASS_HID_1db48] = 2448,
+	[BNXT_ULP_CLASS_HID_9a98] = 2449,
+	[BNXT_ULP_CLASS_HID_97ac] = 2450,
+	[BNXT_ULP_CLASS_HID_18dac] = 2451,
+	[BNXT_ULP_CLASS_HID_1b098] = 2452,
+	[BNXT_ULP_CLASS_HID_bf0c] = 2453,
+	[BNXT_ULP_CLASS_HID_b850] = 2454,
+	[BNXT_ULP_CLASS_HID_1ae50] = 2455,
+	[BNXT_ULP_CLASS_HID_1d50c] = 2456,
+	[BNXT_ULP_CLASS_HID_34f0] = 2457,
+	[BNXT_ULP_CLASS_HID_3a3c] = 2458,
+	[BNXT_ULP_CLASS_HID_5ea0] = 2459,
+	[BNXT_ULP_CLASS_HID_0798] = 2460,
+	[BNXT_ULP_CLASS_HID_280c] = 2461,
+	[BNXT_ULP_CLASS_HID_5964] = 2462,
+	[BNXT_ULP_CLASS_HID_1e5c] = 2463,
+	[BNXT_ULP_CLASS_HID_22c0] = 2464,
+	[BNXT_ULP_CLASS_HID_a71c] = 2465,
+	[BNXT_ULP_CLASS_HID_a8dc] = 2466,
+	[BNXT_ULP_CLASS_HID_ed9c] = 2467,
+	[BNXT_ULP_CLASS_HID_ef5c] = 2468,
+	[BNXT_ULP_CLASS_HID_a060] = 2469,
+	[BNXT_ULP_CLASS_HID_a520] = 2470,
+	[BNXT_ULP_CLASS_HID_e6e0] = 2471,
+	[BNXT_ULP_CLASS_HID_eba0] = 2472,
+	[BNXT_ULP_CLASS_HID_1d660] = 2473,
+	[BNXT_ULP_CLASS_HID_1fb20] = 2474,
+	[BNXT_ULP_CLASS_HID_1dce0] = 2475,
+	[BNXT_ULP_CLASS_HID_1e1a0] = 2476,
+	[BNXT_ULP_CLASS_HID_1dd1c] = 2477,
+	[BNXT_ULP_CLASS_HID_1fedc] = 2478,
+	[BNXT_ULP_CLASS_HID_1c39c] = 2479,
+	[BNXT_ULP_CLASS_HID_1e55c] = 2480,
+	[BNXT_ULP_CLASS_HID_cb80] = 2481,
+	[BNXT_ULP_CLASS_HID_b194] = 2482,
+	[BNXT_ULP_CLASS_HID_d354] = 2483,
+	[BNXT_ULP_CLASS_HID_f414] = 2484,
+	[BNXT_ULP_CLASS_HID_c4d4] = 2485,
+	[BNXT_ULP_CLASS_HID_e994] = 2486,
+	[BNXT_ULP_CLASS_HID_cb54] = 2487,
+	[BNXT_ULP_CLASS_HID_f158] = 2488,
+	[BNXT_ULP_CLASS_HID_19f18] = 2489,
+	[BNXT_ULP_CLASS_HID_1a0d8] = 2490,
+	[BNXT_ULP_CLASS_HID_1c598] = 2491,
+	[BNXT_ULP_CLASS_HID_1e758] = 2492,
+	[BNXT_ULP_CLASS_HID_182d4] = 2493,
+	[BNXT_ULP_CLASS_HID_1a794] = 2494,
+	[BNXT_ULP_CLASS_HID_1c954] = 2495,
+	[BNXT_ULP_CLASS_HID_1ea14] = 2496,
+	[BNXT_ULP_CLASS_HID_b0b8] = 2497,
+	[BNXT_ULP_CLASS_HID_b278] = 2498,
+	[BNXT_ULP_CLASS_HID_f738] = 2499,
+	[BNXT_ULP_CLASS_HID_f8f8] = 2500,
+	[BNXT_ULP_CLASS_HID_8d8c] = 2501,
+	[BNXT_ULP_CLASS_HID_af4c] = 2502,
+	[BNXT_ULP_CLASS_HID_f00c] = 2503,
+	[BNXT_ULP_CLASS_HID_f5cc] = 2504,
+	[BNXT_ULP_CLASS_HID_1a38c] = 2505,
+	[BNXT_ULP_CLASS_HID_1a54c] = 2506,
+	[BNXT_ULP_CLASS_HID_1e60c] = 2507,
+	[BNXT_ULP_CLASS_HID_1ebcc] = 2508,
+	[BNXT_ULP_CLASS_HID_1a6b8] = 2509,
+	[BNXT_ULP_CLASS_HID_1a878] = 2510,
+	[BNXT_ULP_CLASS_HID_1ed38] = 2511,
+	[BNXT_ULP_CLASS_HID_1eef8] = 2512,
+	[BNXT_ULP_CLASS_HID_d52c] = 2513,
+	[BNXT_ULP_CLASS_HID_f6ec] = 2514,
+	[BNXT_ULP_CLASS_HID_dbac] = 2515,
+	[BNXT_ULP_CLASS_HID_fd6c] = 2516,
+	[BNXT_ULP_CLASS_HID_ae70] = 2517,
+	[BNXT_ULP_CLASS_HID_f330] = 2518,
+	[BNXT_ULP_CLASS_HID_d4f0] = 2519,
+	[BNXT_ULP_CLASS_HID_f9b0] = 2520,
+	[BNXT_ULP_CLASS_HID_1c470] = 2521,
+	[BNXT_ULP_CLASS_HID_1e930] = 2522,
+	[BNXT_ULP_CLASS_HID_1caf0] = 2523,
+	[BNXT_ULP_CLASS_HID_1f084] = 2524,
+	[BNXT_ULP_CLASS_HID_1cb2c] = 2525,
+	[BNXT_ULP_CLASS_HID_1b130] = 2526,
+	[BNXT_ULP_CLASS_HID_1d2f0] = 2527,
+	[BNXT_ULP_CLASS_HID_1f7b0] = 2528,
+	[BNXT_ULP_CLASS_HID_a1d0] = 2529,
+	[BNXT_ULP_CLASS_HID_a290] = 2530,
+	[BNXT_ULP_CLASS_HID_e450] = 2531,
+	[BNXT_ULP_CLASS_HID_e910] = 2532,
+	[BNXT_ULP_CLASS_HID_ba24] = 2533,
+	[BNXT_ULP_CLASS_HID_bfe4] = 2534,
+	[BNXT_ULP_CLASS_HID_e0a4] = 2535,
+	[BNXT_ULP_CLASS_HID_e264] = 2536,
+	[BNXT_ULP_CLASS_HID_1d024] = 2537,
+	[BNXT_ULP_CLASS_HID_1f5e4] = 2538,
+	[BNXT_ULP_CLASS_HID_1d6a4] = 2539,
+	[BNXT_ULP_CLASS_HID_1f864] = 2540,
+	[BNXT_ULP_CLASS_HID_1d7d0] = 2541,
+	[BNXT_ULP_CLASS_HID_1f890] = 2542,
+	[BNXT_ULP_CLASS_HID_1da50] = 2543,
+	[BNXT_ULP_CLASS_HID_1ff10] = 2544,
+	[BNXT_ULP_CLASS_HID_c244] = 2545,
+	[BNXT_ULP_CLASS_HID_e704] = 2546,
+	[BNXT_ULP_CLASS_HID_c8c4] = 2547,
+	[BNXT_ULP_CLASS_HID_ed84] = 2548,
+	[BNXT_ULP_CLASS_HID_de88] = 2549,
+	[BNXT_ULP_CLASS_HID_e048] = 2550,
+	[BNXT_ULP_CLASS_HID_c508] = 2551,
+	[BNXT_ULP_CLASS_HID_e6c8] = 2552,
+	[BNXT_ULP_CLASS_HID_199dc] = 2553,
+	[BNXT_ULP_CLASS_HID_1ba9c] = 2554,
+	[BNXT_ULP_CLASS_HID_1dc5c] = 2555,
+	[BNXT_ULP_CLASS_HID_1e11c] = 2556,
+	[BNXT_ULP_CLASS_HID_19c88] = 2557,
+	[BNXT_ULP_CLASS_HID_1be48] = 2558,
+	[BNXT_ULP_CLASS_HID_1c308] = 2559,
+	[BNXT_ULP_CLASS_HID_1e4c8] = 2560,
+	[BNXT_ULP_CLASS_HID_8b7c] = 2561,
+	[BNXT_ULP_CLASS_HID_ac3c] = 2562,
+	[BNXT_ULP_CLASS_HID_f1fc] = 2563,
+	[BNXT_ULP_CLASS_HID_f2bc] = 2564,
+	[BNXT_ULP_CLASS_HID_8440] = 2565,
+	[BNXT_ULP_CLASS_HID_a900] = 2566,
+	[BNXT_ULP_CLASS_HID_cac0] = 2567,
+	[BNXT_ULP_CLASS_HID_ef80] = 2568,
+	[BNXT_ULP_CLASS_HID_1ba40] = 2569,
+	[BNXT_ULP_CLASS_HID_1bf00] = 2570,
+	[BNXT_ULP_CLASS_HID_1e0c0] = 2571,
+	[BNXT_ULP_CLASS_HID_1e580] = 2572,
+	[BNXT_ULP_CLASS_HID_1a17c] = 2573,
+	[BNXT_ULP_CLASS_HID_1a23c] = 2574,
+	[BNXT_ULP_CLASS_HID_1e7fc] = 2575,
+	[BNXT_ULP_CLASS_HID_1e8bc] = 2576,
+	[BNXT_ULP_CLASS_HID_afe0] = 2577,
+	[BNXT_ULP_CLASS_HID_f0a0] = 2578,
+	[BNXT_ULP_CLASS_HID_d260] = 2579,
+	[BNXT_ULP_CLASS_HID_f720] = 2580,
+	[BNXT_ULP_CLASS_HID_a834] = 2581,
+	[BNXT_ULP_CLASS_HID_adf4] = 2582,
+	[BNXT_ULP_CLASS_HID_eeb4] = 2583,
+	[BNXT_ULP_CLASS_HID_f074] = 2584,
+	[BNXT_ULP_CLASS_HID_1de34] = 2585,
+	[BNXT_ULP_CLASS_HID_1e3f4] = 2586,
+	[BNXT_ULP_CLASS_HID_1c4b4] = 2587,
+	[BNXT_ULP_CLASS_HID_1e674] = 2588,
+	[BNXT_ULP_CLASS_HID_1c5e0] = 2589,
+	[BNXT_ULP_CLASS_HID_1e6a0] = 2590,
+	[BNXT_ULP_CLASS_HID_1c860] = 2591,
+	[BNXT_ULP_CLASS_HID_1ed20] = 2592,
+	[BNXT_ULP_CLASS_HID_8c0c] = 2593,
+	[BNXT_ULP_CLASS_HID_b1cc] = 2594,
+	[BNXT_ULP_CLASS_HID_f28c] = 2595,
+	[BNXT_ULP_CLASS_HID_f44c] = 2596,
+	[BNXT_ULP_CLASS_HID_8950] = 2597,
+	[BNXT_ULP_CLASS_HID_aa10] = 2598,
+	[BNXT_ULP_CLASS_HID_cfd0] = 2599,
+	[BNXT_ULP_CLASS_HID_f090] = 2600,
+	[BNXT_ULP_CLASS_HID_1bf50] = 2601,
+	[BNXT_ULP_CLASS_HID_1a010] = 2602,
+	[BNXT_ULP_CLASS_HID_1e5d0] = 2603,
+	[BNXT_ULP_CLASS_HID_1e690] = 2604,
+	[BNXT_ULP_CLASS_HID_1a20c] = 2605,
+	[BNXT_ULP_CLASS_HID_1a7cc] = 2606,
+	[BNXT_ULP_CLASS_HID_1e88c] = 2607,
+	[BNXT_ULP_CLASS_HID_1ea4c] = 2608,
+	[BNXT_ULP_CLASS_HID_d0f0] = 2609,
+	[BNXT_ULP_CLASS_HID_f5b0] = 2610,
+	[BNXT_ULP_CLASS_HID_d770] = 2611,
+	[BNXT_ULP_CLASS_HID_f830] = 2612,
+	[BNXT_ULP_CLASS_HID_adc4] = 2613,
+	[BNXT_ULP_CLASS_HID_ae84] = 2614,
+	[BNXT_ULP_CLASS_HID_d044] = 2615,
+	[BNXT_ULP_CLASS_HID_f504] = 2616,
+	[BNXT_ULP_CLASS_HID_1c3c4] = 2617,
+	[BNXT_ULP_CLASS_HID_1e484] = 2618,
+	[BNXT_ULP_CLASS_HID_1c644] = 2619,
+	[BNXT_ULP_CLASS_HID_1eb04] = 2620,
+	[BNXT_ULP_CLASS_HID_1c6f0] = 2621,
+	[BNXT_ULP_CLASS_HID_1ebb0] = 2622,
+	[BNXT_ULP_CLASS_HID_1cd70] = 2623,
+	[BNXT_ULP_CLASS_HID_1f304] = 2624,
+	[BNXT_ULP_CLASS_HID_99a8] = 2625,
+	[BNXT_ULP_CLASS_HID_bb68] = 2626,
+	[BNXT_ULP_CLASS_HID_dc28] = 2627,
+	[BNXT_ULP_CLASS_HID_e1e8] = 2628,
+	[BNXT_ULP_CLASS_HID_92fc] = 2629,
+	[BNXT_ULP_CLASS_HID_b7bc] = 2630,
+	[BNXT_ULP_CLASS_HID_d97c] = 2631,
+	[BNXT_ULP_CLASS_HID_fa3c] = 2632,
+	[BNXT_ULP_CLASS_HID_188fc] = 2633,
+	[BNXT_ULP_CLASS_HID_1adbc] = 2634,
+	[BNXT_ULP_CLASS_HID_1cf7c] = 2635,
+	[BNXT_ULP_CLASS_HID_1f03c] = 2636,
+	[BNXT_ULP_CLASS_HID_18fa8] = 2637,
+	[BNXT_ULP_CLASS_HID_1b168] = 2638,
+	[BNXT_ULP_CLASS_HID_1f228] = 2639,
+	[BNXT_ULP_CLASS_HID_1f7e8] = 2640,
+	[BNXT_ULP_CLASS_HID_ba1c] = 2641,
+	[BNXT_ULP_CLASS_HID_bfdc] = 2642,
+	[BNXT_ULP_CLASS_HID_e09c] = 2643,
+	[BNXT_ULP_CLASS_HID_e25c] = 2644,
+	[BNXT_ULP_CLASS_HID_b760] = 2645,
+	[BNXT_ULP_CLASS_HID_b820] = 2646,
+	[BNXT_ULP_CLASS_HID_fde0] = 2647,
+	[BNXT_ULP_CLASS_HID_fea0] = 2648,
+	[BNXT_ULP_CLASS_HID_1ad60] = 2649,
+	[BNXT_ULP_CLASS_HID_1ae20] = 2650,
+	[BNXT_ULP_CLASS_HID_1d3e0] = 2651,
+	[BNXT_ULP_CLASS_HID_1f4a0] = 2652,
+	[BNXT_ULP_CLASS_HID_1d01c] = 2653,
+	[BNXT_ULP_CLASS_HID_1f5dc] = 2654,
+	[BNXT_ULP_CLASS_HID_1d69c] = 2655,
+	[BNXT_ULP_CLASS_HID_1f85c] = 2656,
+	[BNXT_ULP_CLASS_HID_86c0] = 2657,
+	[BNXT_ULP_CLASS_HID_ab80] = 2658,
+	[BNXT_ULP_CLASS_HID_cd40] = 2659,
+	[BNXT_ULP_CLASS_HID_ee00] = 2660,
+	[BNXT_ULP_CLASS_HID_8314] = 2661,
+	[BNXT_ULP_CLASS_HID_a4d4] = 2662,
+	[BNXT_ULP_CLASS_HID_c994] = 2663,
+	[BNXT_ULP_CLASS_HID_eb54] = 2664,
+	[BNXT_ULP_CLASS_HID_1b914] = 2665,
+	[BNXT_ULP_CLASS_HID_1bad4] = 2666,
+	[BNXT_ULP_CLASS_HID_1ff94] = 2667,
+	[BNXT_ULP_CLASS_HID_1e154] = 2668,
+	[BNXT_ULP_CLASS_HID_1bcc0] = 2669,
+	[BNXT_ULP_CLASS_HID_1a180] = 2670,
+	[BNXT_ULP_CLASS_HID_1e340] = 2671,
+	[BNXT_ULP_CLASS_HID_1e400] = 2672,
+	[BNXT_ULP_CLASS_HID_aab4] = 2673,
+	[BNXT_ULP_CLASS_HID_ac74] = 2674,
+	[BNXT_ULP_CLASS_HID_d134] = 2675,
+	[BNXT_ULP_CLASS_HID_f2f4] = 2676,
+	[BNXT_ULP_CLASS_HID_a7f8] = 2677,
+	[BNXT_ULP_CLASS_HID_a8b8] = 2678,
+	[BNXT_ULP_CLASS_HID_ea78] = 2679,
+	[BNXT_ULP_CLASS_HID_ef38] = 2680,
+	[BNXT_ULP_CLASS_HID_1ddf8] = 2681,
+	[BNXT_ULP_CLASS_HID_1feb8] = 2682,
+	[BNXT_ULP_CLASS_HID_1c078] = 2683,
+	[BNXT_ULP_CLASS_HID_1e538] = 2684,
+	[BNXT_ULP_CLASS_HID_1c0b4] = 2685,
+	[BNXT_ULP_CLASS_HID_1e274] = 2686,
+	[BNXT_ULP_CLASS_HID_1c734] = 2687,
+	[BNXT_ULP_CLASS_HID_1e8f4] = 2688,
+	[BNXT_ULP_CLASS_HID_906c] = 2689,
+	[BNXT_ULP_CLASS_HID_b52c] = 2690,
+	[BNXT_ULP_CLASS_HID_d6ec] = 2691,
+	[BNXT_ULP_CLASS_HID_fbac] = 2692,
+	[BNXT_ULP_CLASS_HID_c86c] = 2693,
+	[BNXT_ULP_CLASS_HID_ed2c] = 2694,
+	[BNXT_ULP_CLASS_HID_d330] = 2695,
+	[BNXT_ULP_CLASS_HID_f4f0] = 2696,
+	[BNXT_ULP_CLASS_HID_182b0] = 2697,
+	[BNXT_ULP_CLASS_HID_1a470] = 2698,
+	[BNXT_ULP_CLASS_HID_1c930] = 2699,
+	[BNXT_ULP_CLASS_HID_1eaf0] = 2700,
+	[BNXT_ULP_CLASS_HID_1866c] = 2701,
+	[BNXT_ULP_CLASS_HID_1ab2c] = 2702,
+	[BNXT_ULP_CLASS_HID_1ccec] = 2703,
+	[BNXT_ULP_CLASS_HID_1f1ac] = 2704,
+	[BNXT_ULP_CLASS_HID_b4d0] = 2705,
+	[BNXT_ULP_CLASS_HID_b990] = 2706,
+	[BNXT_ULP_CLASS_HID_fb50] = 2707,
+	[BNXT_ULP_CLASS_HID_fc10] = 2708,
+	[BNXT_ULP_CLASS_HID_b124] = 2709,
+	[BNXT_ULP_CLASS_HID_b2e4] = 2710,
+	[BNXT_ULP_CLASS_HID_f7a4] = 2711,
+	[BNXT_ULP_CLASS_HID_f964] = 2712,
+	[BNXT_ULP_CLASS_HID_1a724] = 2713,
+	[BNXT_ULP_CLASS_HID_1a8e4] = 2714,
+	[BNXT_ULP_CLASS_HID_1eda4] = 2715,
+	[BNXT_ULP_CLASS_HID_1ef64] = 2716,
+	[BNXT_ULP_CLASS_HID_1aad0] = 2717,
+	[BNXT_ULP_CLASS_HID_1af90] = 2718,
+	[BNXT_ULP_CLASS_HID_1d150] = 2719,
+	[BNXT_ULP_CLASS_HID_1f210] = 2720,
+	[BNXT_ULP_CLASS_HID_8084] = 2721,
+	[BNXT_ULP_CLASS_HID_a244] = 2722,
+	[BNXT_ULP_CLASS_HID_c704] = 2723,
+	[BNXT_ULP_CLASS_HID_e8c4] = 2724,
+	[BNXT_ULP_CLASS_HID_9dc8] = 2725,
+	[BNXT_ULP_CLASS_HID_be88] = 2726,
+	[BNXT_ULP_CLASS_HID_c048] = 2727,
+	[BNXT_ULP_CLASS_HID_e508] = 2728,
+	[BNXT_ULP_CLASS_HID_1b3c8] = 2729,
+	[BNXT_ULP_CLASS_HID_1b488] = 2730,
+	[BNXT_ULP_CLASS_HID_1f648] = 2731,
+	[BNXT_ULP_CLASS_HID_1fb08] = 2732,
+	[BNXT_ULP_CLASS_HID_1b684] = 2733,
+	[BNXT_ULP_CLASS_HID_1b844] = 2734,
+	[BNXT_ULP_CLASS_HID_1fd04] = 2735,
+	[BNXT_ULP_CLASS_HID_1fec4] = 2736,
+	[BNXT_ULP_CLASS_HID_a568] = 2737,
+	[BNXT_ULP_CLASS_HID_a628] = 2738,
+	[BNXT_ULP_CLASS_HID_ebe8] = 2739,
+	[BNXT_ULP_CLASS_HID_eca8] = 2740,
+	[BNXT_ULP_CLASS_HID_a1bc] = 2741,
+	[BNXT_ULP_CLASS_HID_a37c] = 2742,
+	[BNXT_ULP_CLASS_HID_e43c] = 2743,
+	[BNXT_ULP_CLASS_HID_e9fc] = 2744,
+	[BNXT_ULP_CLASS_HID_1d7bc] = 2745,
+	[BNXT_ULP_CLASS_HID_1f97c] = 2746,
+	[BNXT_ULP_CLASS_HID_1da3c] = 2747,
+	[BNXT_ULP_CLASS_HID_1fffc] = 2748,
+	[BNXT_ULP_CLASS_HID_1db68] = 2749,
+	[BNXT_ULP_CLASS_HID_1fc28] = 2750,
+	[BNXT_ULP_CLASS_HID_1c1e8] = 2751,
+	[BNXT_ULP_CLASS_HID_1e2a8] = 2752,
+	[BNXT_ULP_CLASS_HID_9ab8] = 2753,
+	[BNXT_ULP_CLASS_HID_bc78] = 2754,
+	[BNXT_ULP_CLASS_HID_c138] = 2755,
+	[BNXT_ULP_CLASS_HID_e2f8] = 2756,
+	[BNXT_ULP_CLASS_HID_978c] = 2757,
+	[BNXT_ULP_CLASS_HID_b94c] = 2758,
+	[BNXT_ULP_CLASS_HID_da0c] = 2759,
+	[BNXT_ULP_CLASS_HID_ffcc] = 2760,
+	[BNXT_ULP_CLASS_HID_18d8c] = 2761,
+	[BNXT_ULP_CLASS_HID_1af4c] = 2762,
+	[BNXT_ULP_CLASS_HID_1f00c] = 2763,
+	[BNXT_ULP_CLASS_HID_1f5cc] = 2764,
+	[BNXT_ULP_CLASS_HID_1b0b8] = 2765,
+	[BNXT_ULP_CLASS_HID_1b278] = 2766,
+	[BNXT_ULP_CLASS_HID_1f738] = 2767,
+	[BNXT_ULP_CLASS_HID_1f8f8] = 2768,
+	[BNXT_ULP_CLASS_HID_bf2c] = 2769,
+	[BNXT_ULP_CLASS_HID_a0ec] = 2770,
+	[BNXT_ULP_CLASS_HID_e5ac] = 2771,
+	[BNXT_ULP_CLASS_HID_e76c] = 2772,
+	[BNXT_ULP_CLASS_HID_b870] = 2773,
+	[BNXT_ULP_CLASS_HID_bd30] = 2774,
+	[BNXT_ULP_CLASS_HID_fef0] = 2775,
+	[BNXT_ULP_CLASS_HID_e3b0] = 2776,
+	[BNXT_ULP_CLASS_HID_1ae70] = 2777,
+	[BNXT_ULP_CLASS_HID_1f330] = 2778,
+	[BNXT_ULP_CLASS_HID_1d4f0] = 2779,
+	[BNXT_ULP_CLASS_HID_1f9b0] = 2780,
+	[BNXT_ULP_CLASS_HID_1d52c] = 2781,
+	[BNXT_ULP_CLASS_HID_1f6ec] = 2782,
+	[BNXT_ULP_CLASS_HID_1dbac] = 2783,
+	[BNXT_ULP_CLASS_HID_1fd6c] = 2784,
+	[BNXT_ULP_CLASS_HID_34d0] = 2785,
+	[BNXT_ULP_CLASS_HID_3a1c] = 2786,
+	[BNXT_ULP_CLASS_HID_5e80] = 2787,
+	[BNXT_ULP_CLASS_HID_07b8] = 2788,
+	[BNXT_ULP_CLASS_HID_282c] = 2789,
+	[BNXT_ULP_CLASS_HID_5944] = 2790,
+	[BNXT_ULP_CLASS_HID_1e7c] = 2791,
+	[BNXT_ULP_CLASS_HID_22e0] = 2792,
+	[BNXT_ULP_CLASS_HID_a77c] = 2793,
+	[BNXT_ULP_CLASS_HID_a8bc] = 2794,
+	[BNXT_ULP_CLASS_HID_edfc] = 2795,
+	[BNXT_ULP_CLASS_HID_ef3c] = 2796,
+	[BNXT_ULP_CLASS_HID_a000] = 2797,
+	[BNXT_ULP_CLASS_HID_a540] = 2798,
+	[BNXT_ULP_CLASS_HID_e680] = 2799,
+	[BNXT_ULP_CLASS_HID_ebc0] = 2800,
+	[BNXT_ULP_CLASS_HID_1d600] = 2801,
+	[BNXT_ULP_CLASS_HID_1fb40] = 2802,
+	[BNXT_ULP_CLASS_HID_1dc80] = 2803,
+	[BNXT_ULP_CLASS_HID_1e1c0] = 2804,
+	[BNXT_ULP_CLASS_HID_1dd7c] = 2805,
+	[BNXT_ULP_CLASS_HID_1febc] = 2806,
+	[BNXT_ULP_CLASS_HID_1c3fc] = 2807,
+	[BNXT_ULP_CLASS_HID_1e53c] = 2808,
+	[BNXT_ULP_CLASS_HID_cbe0] = 2809,
+	[BNXT_ULP_CLASS_HID_b1f4] = 2810,
+	[BNXT_ULP_CLASS_HID_d334] = 2811,
+	[BNXT_ULP_CLASS_HID_f474] = 2812,
+	[BNXT_ULP_CLASS_HID_c4b4] = 2813,
+	[BNXT_ULP_CLASS_HID_e9f4] = 2814,
+	[BNXT_ULP_CLASS_HID_cb34] = 2815,
+	[BNXT_ULP_CLASS_HID_f138] = 2816,
+	[BNXT_ULP_CLASS_HID_19f78] = 2817,
+	[BNXT_ULP_CLASS_HID_1a0b8] = 2818,
+	[BNXT_ULP_CLASS_HID_1c5f8] = 2819,
+	[BNXT_ULP_CLASS_HID_1e738] = 2820,
+	[BNXT_ULP_CLASS_HID_182b4] = 2821,
+	[BNXT_ULP_CLASS_HID_1a7f4] = 2822,
+	[BNXT_ULP_CLASS_HID_1c934] = 2823,
+	[BNXT_ULP_CLASS_HID_1ea74] = 2824,
+	[BNXT_ULP_CLASS_HID_b0d8] = 2825,
+	[BNXT_ULP_CLASS_HID_b218] = 2826,
+	[BNXT_ULP_CLASS_HID_f758] = 2827,
+	[BNXT_ULP_CLASS_HID_f898] = 2828,
+	[BNXT_ULP_CLASS_HID_8dec] = 2829,
+	[BNXT_ULP_CLASS_HID_af2c] = 2830,
+	[BNXT_ULP_CLASS_HID_f06c] = 2831,
+	[BNXT_ULP_CLASS_HID_f5ac] = 2832,
+	[BNXT_ULP_CLASS_HID_1a3ec] = 2833,
+	[BNXT_ULP_CLASS_HID_1a52c] = 2834,
+	[BNXT_ULP_CLASS_HID_1e66c] = 2835,
+	[BNXT_ULP_CLASS_HID_1ebac] = 2836,
+	[BNXT_ULP_CLASS_HID_1a6d8] = 2837,
+	[BNXT_ULP_CLASS_HID_1a818] = 2838,
+	[BNXT_ULP_CLASS_HID_1ed58] = 2839,
+	[BNXT_ULP_CLASS_HID_1ee98] = 2840,
+	[BNXT_ULP_CLASS_HID_d54c] = 2841,
+	[BNXT_ULP_CLASS_HID_f68c] = 2842,
+	[BNXT_ULP_CLASS_HID_dbcc] = 2843,
+	[BNXT_ULP_CLASS_HID_fd0c] = 2844,
+	[BNXT_ULP_CLASS_HID_ae10] = 2845,
+	[BNXT_ULP_CLASS_HID_f350] = 2846,
+	[BNXT_ULP_CLASS_HID_d490] = 2847,
+	[BNXT_ULP_CLASS_HID_f9d0] = 2848,
+	[BNXT_ULP_CLASS_HID_1c410] = 2849,
+	[BNXT_ULP_CLASS_HID_1e950] = 2850,
+	[BNXT_ULP_CLASS_HID_1ca90] = 2851,
+	[BNXT_ULP_CLASS_HID_1f0e4] = 2852,
+	[BNXT_ULP_CLASS_HID_1cb4c] = 2853,
+	[BNXT_ULP_CLASS_HID_1b150] = 2854,
+	[BNXT_ULP_CLASS_HID_1d290] = 2855,
+	[BNXT_ULP_CLASS_HID_1f7d0] = 2856,
+	[BNXT_ULP_CLASS_HID_a1b0] = 2857,
+	[BNXT_ULP_CLASS_HID_a2f0] = 2858,
+	[BNXT_ULP_CLASS_HID_e430] = 2859,
+	[BNXT_ULP_CLASS_HID_e970] = 2860,
+	[BNXT_ULP_CLASS_HID_ba44] = 2861,
+	[BNXT_ULP_CLASS_HID_bf84] = 2862,
+	[BNXT_ULP_CLASS_HID_e0c4] = 2863,
+	[BNXT_ULP_CLASS_HID_e204] = 2864,
+	[BNXT_ULP_CLASS_HID_1d044] = 2865,
+	[BNXT_ULP_CLASS_HID_1f584] = 2866,
+	[BNXT_ULP_CLASS_HID_1d6c4] = 2867,
+	[BNXT_ULP_CLASS_HID_1f804] = 2868,
+	[BNXT_ULP_CLASS_HID_1d7b0] = 2869,
+	[BNXT_ULP_CLASS_HID_1f8f0] = 2870,
+	[BNXT_ULP_CLASS_HID_1da30] = 2871,
+	[BNXT_ULP_CLASS_HID_1ff70] = 2872,
+	[BNXT_ULP_CLASS_HID_c224] = 2873,
+	[BNXT_ULP_CLASS_HID_e764] = 2874,
+	[BNXT_ULP_CLASS_HID_c8a4] = 2875,
+	[BNXT_ULP_CLASS_HID_ede4] = 2876,
+	[BNXT_ULP_CLASS_HID_dee8] = 2877,
+	[BNXT_ULP_CLASS_HID_e028] = 2878,
+	[BNXT_ULP_CLASS_HID_c568] = 2879,
+	[BNXT_ULP_CLASS_HID_e6a8] = 2880,
+	[BNXT_ULP_CLASS_HID_199bc] = 2881,
+	[BNXT_ULP_CLASS_HID_1bafc] = 2882,
+	[BNXT_ULP_CLASS_HID_1dc3c] = 2883,
+	[BNXT_ULP_CLASS_HID_1e17c] = 2884,
+	[BNXT_ULP_CLASS_HID_19ce8] = 2885,
+	[BNXT_ULP_CLASS_HID_1be28] = 2886,
+	[BNXT_ULP_CLASS_HID_1c368] = 2887,
+	[BNXT_ULP_CLASS_HID_1e4a8] = 2888,
+	[BNXT_ULP_CLASS_HID_8b1c] = 2889,
+	[BNXT_ULP_CLASS_HID_ac5c] = 2890,
+	[BNXT_ULP_CLASS_HID_f19c] = 2891,
+	[BNXT_ULP_CLASS_HID_f2dc] = 2892,
+	[BNXT_ULP_CLASS_HID_8420] = 2893,
+	[BNXT_ULP_CLASS_HID_a960] = 2894,
+	[BNXT_ULP_CLASS_HID_caa0] = 2895,
+	[BNXT_ULP_CLASS_HID_efe0] = 2896,
+	[BNXT_ULP_CLASS_HID_1ba20] = 2897,
+	[BNXT_ULP_CLASS_HID_1bf60] = 2898,
+	[BNXT_ULP_CLASS_HID_1e0a0] = 2899,
+	[BNXT_ULP_CLASS_HID_1e5e0] = 2900,
+	[BNXT_ULP_CLASS_HID_1a11c] = 2901,
+	[BNXT_ULP_CLASS_HID_1a25c] = 2902,
+	[BNXT_ULP_CLASS_HID_1e79c] = 2903,
+	[BNXT_ULP_CLASS_HID_1e8dc] = 2904,
+	[BNXT_ULP_CLASS_HID_af80] = 2905,
+	[BNXT_ULP_CLASS_HID_f0c0] = 2906,
+	[BNXT_ULP_CLASS_HID_d200] = 2907,
+	[BNXT_ULP_CLASS_HID_f740] = 2908,
+	[BNXT_ULP_CLASS_HID_a854] = 2909,
+	[BNXT_ULP_CLASS_HID_ad94] = 2910,
+	[BNXT_ULP_CLASS_HID_eed4] = 2911,
+	[BNXT_ULP_CLASS_HID_f014] = 2912,
+	[BNXT_ULP_CLASS_HID_1de54] = 2913,
+	[BNXT_ULP_CLASS_HID_1e394] = 2914,
+	[BNXT_ULP_CLASS_HID_1c4d4] = 2915,
+	[BNXT_ULP_CLASS_HID_1e614] = 2916,
+	[BNXT_ULP_CLASS_HID_1c580] = 2917,
+	[BNXT_ULP_CLASS_HID_1e6c0] = 2918,
+	[BNXT_ULP_CLASS_HID_1c800] = 2919,
+	[BNXT_ULP_CLASS_HID_1ed40] = 2920,
+	[BNXT_ULP_CLASS_HID_8c6c] = 2921,
+	[BNXT_ULP_CLASS_HID_b1ac] = 2922,
+	[BNXT_ULP_CLASS_HID_f2ec] = 2923,
+	[BNXT_ULP_CLASS_HID_f42c] = 2924,
+	[BNXT_ULP_CLASS_HID_8930] = 2925,
+	[BNXT_ULP_CLASS_HID_aa70] = 2926,
+	[BNXT_ULP_CLASS_HID_cfb0] = 2927,
+	[BNXT_ULP_CLASS_HID_f0f0] = 2928,
+	[BNXT_ULP_CLASS_HID_1bf30] = 2929,
+	[BNXT_ULP_CLASS_HID_1a070] = 2930,
+	[BNXT_ULP_CLASS_HID_1e5b0] = 2931,
+	[BNXT_ULP_CLASS_HID_1e6f0] = 2932,
+	[BNXT_ULP_CLASS_HID_1a26c] = 2933,
+	[BNXT_ULP_CLASS_HID_1a7ac] = 2934,
+	[BNXT_ULP_CLASS_HID_1e8ec] = 2935,
+	[BNXT_ULP_CLASS_HID_1ea2c] = 2936,
+	[BNXT_ULP_CLASS_HID_d090] = 2937,
+	[BNXT_ULP_CLASS_HID_f5d0] = 2938,
+	[BNXT_ULP_CLASS_HID_d710] = 2939,
+	[BNXT_ULP_CLASS_HID_f850] = 2940,
+	[BNXT_ULP_CLASS_HID_ada4] = 2941,
+	[BNXT_ULP_CLASS_HID_aee4] = 2942,
+	[BNXT_ULP_CLASS_HID_d024] = 2943,
+	[BNXT_ULP_CLASS_HID_f564] = 2944,
+	[BNXT_ULP_CLASS_HID_1c3a4] = 2945,
+	[BNXT_ULP_CLASS_HID_1e4e4] = 2946,
+	[BNXT_ULP_CLASS_HID_1c624] = 2947,
+	[BNXT_ULP_CLASS_HID_1eb64] = 2948,
+	[BNXT_ULP_CLASS_HID_1c690] = 2949,
+	[BNXT_ULP_CLASS_HID_1ebd0] = 2950,
+	[BNXT_ULP_CLASS_HID_1cd10] = 2951,
+	[BNXT_ULP_CLASS_HID_1f364] = 2952,
+	[BNXT_ULP_CLASS_HID_99c8] = 2953,
+	[BNXT_ULP_CLASS_HID_bb08] = 2954,
+	[BNXT_ULP_CLASS_HID_dc48] = 2955,
+	[BNXT_ULP_CLASS_HID_e188] = 2956,
+	[BNXT_ULP_CLASS_HID_929c] = 2957,
+	[BNXT_ULP_CLASS_HID_b7dc] = 2958,
+	[BNXT_ULP_CLASS_HID_d91c] = 2959,
+	[BNXT_ULP_CLASS_HID_fa5c] = 2960,
+	[BNXT_ULP_CLASS_HID_1889c] = 2961,
+	[BNXT_ULP_CLASS_HID_1addc] = 2962,
+	[BNXT_ULP_CLASS_HID_1cf1c] = 2963,
+	[BNXT_ULP_CLASS_HID_1f05c] = 2964,
+	[BNXT_ULP_CLASS_HID_18fc8] = 2965,
+	[BNXT_ULP_CLASS_HID_1b108] = 2966,
+	[BNXT_ULP_CLASS_HID_1f248] = 2967,
+	[BNXT_ULP_CLASS_HID_1f788] = 2968,
+	[BNXT_ULP_CLASS_HID_ba7c] = 2969,
+	[BNXT_ULP_CLASS_HID_bfbc] = 2970,
+	[BNXT_ULP_CLASS_HID_e0fc] = 2971,
+	[BNXT_ULP_CLASS_HID_e23c] = 2972,
+	[BNXT_ULP_CLASS_HID_b700] = 2973,
+	[BNXT_ULP_CLASS_HID_b840] = 2974,
+	[BNXT_ULP_CLASS_HID_fd80] = 2975,
+	[BNXT_ULP_CLASS_HID_fec0] = 2976,
+	[BNXT_ULP_CLASS_HID_1ad00] = 2977,
+	[BNXT_ULP_CLASS_HID_1ae40] = 2978,
+	[BNXT_ULP_CLASS_HID_1d380] = 2979,
+	[BNXT_ULP_CLASS_HID_1f4c0] = 2980,
+	[BNXT_ULP_CLASS_HID_1d07c] = 2981,
+	[BNXT_ULP_CLASS_HID_1f5bc] = 2982,
+	[BNXT_ULP_CLASS_HID_1d6fc] = 2983,
+	[BNXT_ULP_CLASS_HID_1f83c] = 2984,
+	[BNXT_ULP_CLASS_HID_86a0] = 2985,
+	[BNXT_ULP_CLASS_HID_abe0] = 2986,
+	[BNXT_ULP_CLASS_HID_cd20] = 2987,
+	[BNXT_ULP_CLASS_HID_ee60] = 2988,
+	[BNXT_ULP_CLASS_HID_8374] = 2989,
+	[BNXT_ULP_CLASS_HID_a4b4] = 2990,
+	[BNXT_ULP_CLASS_HID_c9f4] = 2991,
+	[BNXT_ULP_CLASS_HID_eb34] = 2992,
+	[BNXT_ULP_CLASS_HID_1b974] = 2993,
+	[BNXT_ULP_CLASS_HID_1bab4] = 2994,
+	[BNXT_ULP_CLASS_HID_1fff4] = 2995,
+	[BNXT_ULP_CLASS_HID_1e134] = 2996,
+	[BNXT_ULP_CLASS_HID_1bca0] = 2997,
+	[BNXT_ULP_CLASS_HID_1a1e0] = 2998,
+	[BNXT_ULP_CLASS_HID_1e320] = 2999,
+	[BNXT_ULP_CLASS_HID_1e460] = 3000,
+	[BNXT_ULP_CLASS_HID_aad4] = 3001,
+	[BNXT_ULP_CLASS_HID_ac14] = 3002,
+	[BNXT_ULP_CLASS_HID_d154] = 3003,
+	[BNXT_ULP_CLASS_HID_f294] = 3004,
+	[BNXT_ULP_CLASS_HID_a798] = 3005,
+	[BNXT_ULP_CLASS_HID_a8d8] = 3006,
+	[BNXT_ULP_CLASS_HID_ea18] = 3007,
+	[BNXT_ULP_CLASS_HID_ef58] = 3008,
+	[BNXT_ULP_CLASS_HID_1dd98] = 3009,
+	[BNXT_ULP_CLASS_HID_1fed8] = 3010,
+	[BNXT_ULP_CLASS_HID_1c018] = 3011,
+	[BNXT_ULP_CLASS_HID_1e558] = 3012,
+	[BNXT_ULP_CLASS_HID_1c0d4] = 3013,
+	[BNXT_ULP_CLASS_HID_1e214] = 3014,
+	[BNXT_ULP_CLASS_HID_1c754] = 3015,
+	[BNXT_ULP_CLASS_HID_1e894] = 3016,
+	[BNXT_ULP_CLASS_HID_900c] = 3017,
+	[BNXT_ULP_CLASS_HID_b54c] = 3018,
+	[BNXT_ULP_CLASS_HID_d68c] = 3019,
+	[BNXT_ULP_CLASS_HID_fbcc] = 3020,
+	[BNXT_ULP_CLASS_HID_c80c] = 3021,
+	[BNXT_ULP_CLASS_HID_ed4c] = 3022,
+	[BNXT_ULP_CLASS_HID_d350] = 3023,
+	[BNXT_ULP_CLASS_HID_f490] = 3024,
+	[BNXT_ULP_CLASS_HID_182d0] = 3025,
+	[BNXT_ULP_CLASS_HID_1a410] = 3026,
+	[BNXT_ULP_CLASS_HID_1c950] = 3027,
+	[BNXT_ULP_CLASS_HID_1ea90] = 3028,
+	[BNXT_ULP_CLASS_HID_1860c] = 3029,
+	[BNXT_ULP_CLASS_HID_1ab4c] = 3030,
+	[BNXT_ULP_CLASS_HID_1cc8c] = 3031,
+	[BNXT_ULP_CLASS_HID_1f1cc] = 3032,
+	[BNXT_ULP_CLASS_HID_b4b0] = 3033,
+	[BNXT_ULP_CLASS_HID_b9f0] = 3034,
+	[BNXT_ULP_CLASS_HID_fb30] = 3035,
+	[BNXT_ULP_CLASS_HID_fc70] = 3036,
+	[BNXT_ULP_CLASS_HID_b144] = 3037,
+	[BNXT_ULP_CLASS_HID_b284] = 3038,
+	[BNXT_ULP_CLASS_HID_f7c4] = 3039,
+	[BNXT_ULP_CLASS_HID_f904] = 3040,
+	[BNXT_ULP_CLASS_HID_1a744] = 3041,
+	[BNXT_ULP_CLASS_HID_1a884] = 3042,
+	[BNXT_ULP_CLASS_HID_1edc4] = 3043,
+	[BNXT_ULP_CLASS_HID_1ef04] = 3044,
+	[BNXT_ULP_CLASS_HID_1aab0] = 3045,
+	[BNXT_ULP_CLASS_HID_1aff0] = 3046,
+	[BNXT_ULP_CLASS_HID_1d130] = 3047,
+	[BNXT_ULP_CLASS_HID_1f270] = 3048,
+	[BNXT_ULP_CLASS_HID_80e4] = 3049,
+	[BNXT_ULP_CLASS_HID_a224] = 3050,
+	[BNXT_ULP_CLASS_HID_c764] = 3051,
+	[BNXT_ULP_CLASS_HID_e8a4] = 3052,
+	[BNXT_ULP_CLASS_HID_9da8] = 3053,
+	[BNXT_ULP_CLASS_HID_bee8] = 3054,
+	[BNXT_ULP_CLASS_HID_c028] = 3055,
+	[BNXT_ULP_CLASS_HID_e568] = 3056,
+	[BNXT_ULP_CLASS_HID_1b3a8] = 3057,
+	[BNXT_ULP_CLASS_HID_1b4e8] = 3058,
+	[BNXT_ULP_CLASS_HID_1f628] = 3059,
+	[BNXT_ULP_CLASS_HID_1fb68] = 3060,
+	[BNXT_ULP_CLASS_HID_1b6e4] = 3061,
+	[BNXT_ULP_CLASS_HID_1b824] = 3062,
+	[BNXT_ULP_CLASS_HID_1fd64] = 3063,
+	[BNXT_ULP_CLASS_HID_1fea4] = 3064,
+	[BNXT_ULP_CLASS_HID_a508] = 3065,
+	[BNXT_ULP_CLASS_HID_a648] = 3066,
+	[BNXT_ULP_CLASS_HID_eb88] = 3067,
+	[BNXT_ULP_CLASS_HID_ecc8] = 3068,
+	[BNXT_ULP_CLASS_HID_a1dc] = 3069,
+	[BNXT_ULP_CLASS_HID_a31c] = 3070,
+	[BNXT_ULP_CLASS_HID_e45c] = 3071,
+	[BNXT_ULP_CLASS_HID_e99c] = 3072,
+	[BNXT_ULP_CLASS_HID_1d7dc] = 3073,
+	[BNXT_ULP_CLASS_HID_1f91c] = 3074,
+	[BNXT_ULP_CLASS_HID_1da5c] = 3075,
+	[BNXT_ULP_CLASS_HID_1ff9c] = 3076,
+	[BNXT_ULP_CLASS_HID_1db08] = 3077,
+	[BNXT_ULP_CLASS_HID_1fc48] = 3078,
+	[BNXT_ULP_CLASS_HID_1c188] = 3079,
+	[BNXT_ULP_CLASS_HID_1e2c8] = 3080,
+	[BNXT_ULP_CLASS_HID_9ad8] = 3081,
+	[BNXT_ULP_CLASS_HID_bc18] = 3082,
+	[BNXT_ULP_CLASS_HID_c158] = 3083,
+	[BNXT_ULP_CLASS_HID_e298] = 3084,
+	[BNXT_ULP_CLASS_HID_97ec] = 3085,
+	[BNXT_ULP_CLASS_HID_b92c] = 3086,
+	[BNXT_ULP_CLASS_HID_da6c] = 3087,
+	[BNXT_ULP_CLASS_HID_ffac] = 3088,
+	[BNXT_ULP_CLASS_HID_18dec] = 3089,
+	[BNXT_ULP_CLASS_HID_1af2c] = 3090,
+	[BNXT_ULP_CLASS_HID_1f06c] = 3091,
+	[BNXT_ULP_CLASS_HID_1f5ac] = 3092,
+	[BNXT_ULP_CLASS_HID_1b0d8] = 3093,
+	[BNXT_ULP_CLASS_HID_1b218] = 3094,
+	[BNXT_ULP_CLASS_HID_1f758] = 3095,
+	[BNXT_ULP_CLASS_HID_1f898] = 3096,
+	[BNXT_ULP_CLASS_HID_bf4c] = 3097,
+	[BNXT_ULP_CLASS_HID_a08c] = 3098,
+	[BNXT_ULP_CLASS_HID_e5cc] = 3099,
+	[BNXT_ULP_CLASS_HID_e70c] = 3100,
+	[BNXT_ULP_CLASS_HID_b810] = 3101,
+	[BNXT_ULP_CLASS_HID_bd50] = 3102,
+	[BNXT_ULP_CLASS_HID_fe90] = 3103,
+	[BNXT_ULP_CLASS_HID_e3d0] = 3104,
+	[BNXT_ULP_CLASS_HID_1ae10] = 3105,
+	[BNXT_ULP_CLASS_HID_1f350] = 3106,
+	[BNXT_ULP_CLASS_HID_1d490] = 3107,
+	[BNXT_ULP_CLASS_HID_1f9d0] = 3108,
+	[BNXT_ULP_CLASS_HID_1d54c] = 3109,
+	[BNXT_ULP_CLASS_HID_1f68c] = 3110,
+	[BNXT_ULP_CLASS_HID_1dbcc] = 3111,
+	[BNXT_ULP_CLASS_HID_1fd0c] = 3112,
+	[BNXT_ULP_CLASS_HID_34b0] = 3113,
+	[BNXT_ULP_CLASS_HID_3a7c] = 3114,
+	[BNXT_ULP_CLASS_HID_5ee0] = 3115,
+	[BNXT_ULP_CLASS_HID_07d8] = 3116,
+	[BNXT_ULP_CLASS_HID_284c] = 3117,
+	[BNXT_ULP_CLASS_HID_5924] = 3118,
+	[BNXT_ULP_CLASS_HID_1e1c] = 3119,
+	[BNXT_ULP_CLASS_HID_2280] = 3120,
+	[BNXT_ULP_CLASS_HID_24604] = 3121,
+	[BNXT_ULP_CLASS_HID_255d4] = 3122,
+	[BNXT_ULP_CLASS_HID_22e08] = 3123,
+	[BNXT_ULP_CLASS_HID_24378] = 3124,
+	[BNXT_ULP_CLASS_HID_20fcc] = 3125,
+	[BNXT_ULP_CLASS_HID_21a9c] = 3126,
+	[BNXT_ULP_CLASS_HID_217d0] = 3127,
+	[BNXT_ULP_CLASS_HID_20800] = 3128,
+	[BNXT_ULP_CLASS_HID_253a0] = 3129,
+	[BNXT_ULP_CLASS_HID_23f70] = 3130,
+	[BNXT_ULP_CLASS_HID_23ba4] = 3131,
+	[BNXT_ULP_CLASS_HID_22c94] = 3132,
+	[BNXT_ULP_CLASS_HID_21968] = 3133,
+	[BNXT_ULP_CLASS_HID_243c4] = 3134,
+	[BNXT_ULP_CLASS_HID_25c38] = 3135,
+	[BNXT_ULP_CLASS_HID_2125c] = 3136,
+	[BNXT_ULP_CLASS_HID_240c8] = 3137,
+	[BNXT_ULP_CLASS_HID_22f98] = 3138,
+	[BNXT_ULP_CLASS_HID_228cc] = 3139,
+	[BNXT_ULP_CLASS_HID_25d3c] = 3140,
+	[BNXT_ULP_CLASS_HID_20990] = 3141,
+	[BNXT_ULP_CLASS_HID_214a0] = 3142,
+	[BNXT_ULP_CLASS_HID_21194] = 3143,
+	[BNXT_ULP_CLASS_HID_202c4] = 3144,
+	[BNXT_ULP_CLASS_HID_22a64] = 3145,
+	[BNXT_ULP_CLASS_HID_23934] = 3146,
+	[BNXT_ULP_CLASS_HID_23268] = 3147,
+	[BNXT_ULP_CLASS_HID_22758] = 3148,
+	[BNXT_ULP_CLASS_HID_2132c] = 3149,
+	[BNXT_ULP_CLASS_HID_25d88] = 3150,
+	[BNXT_ULP_CLASS_HID_256fc] = 3151,
+	[BNXT_ULP_CLASS_HID_24b2c] = 3152,
+	[BNXT_ULP_CLASS_HID_22f14] = 3153,
+	[BNXT_ULP_CLASS_HID_23a24] = 3154,
+	[BNXT_ULP_CLASS_HID_23718] = 3155,
+	[BNXT_ULP_CLASS_HID_22848] = 3156,
+	[BNXT_ULP_CLASS_HID_214dc] = 3157,
+	[BNXT_ULP_CLASS_HID_25eb8] = 3158,
+	[BNXT_ULP_CLASS_HID_25bec] = 3159,
+	[BNXT_ULP_CLASS_HID_21110] = 3160,
+	[BNXT_ULP_CLASS_HID_238b0] = 3161,
+	[BNXT_ULP_CLASS_HID_20440] = 3162,
+	[BNXT_ULP_CLASS_HID_200b4] = 3163,
+	[BNXT_ULP_CLASS_HID_235e4] = 3164,
+	[BNXT_ULP_CLASS_HID_25d04] = 3165,
+	[BNXT_ULP_CLASS_HID_228d4] = 3166,
+	[BNXT_ULP_CLASS_HID_22508] = 3167,
+	[BNXT_ULP_CLASS_HID_25678] = 3168,
+	[BNXT_ULP_CLASS_HID_229d8] = 3169,
+	[BNXT_ULP_CLASS_HID_234e8] = 3170,
+	[BNXT_ULP_CLASS_HID_231dc] = 3171,
+	[BNXT_ULP_CLASS_HID_2220c] = 3172,
+	[BNXT_ULP_CLASS_HID_24dac] = 3173,
+	[BNXT_ULP_CLASS_HID_2597c] = 3174,
+	[BNXT_ULP_CLASS_HID_255b0] = 3175,
+	[BNXT_ULP_CLASS_HID_246e0] = 3176,
+	[BNXT_ULP_CLASS_HID_23374] = 3177,
+	[BNXT_ULP_CLASS_HID_21e04] = 3178,
+	[BNXT_ULP_CLASS_HID_21b78] = 3179,
+	[BNXT_ULP_CLASS_HID_20fa8] = 3180,
+	[BNXT_ULP_CLASS_HID_257c8] = 3181,
+	[BNXT_ULP_CLASS_HID_22298] = 3182,
+	[BNXT_ULP_CLASS_HID_23fcc] = 3183,
+	[BNXT_ULP_CLASS_HID_2503c] = 3184,
+	[BNXT_ULP_CLASS_HID_2239c] = 3185,
+	[BNXT_ULP_CLASS_HID_20eac] = 3186,
+	[BNXT_ULP_CLASS_HID_20be0] = 3187,
+	[BNXT_ULP_CLASS_HID_23cd0] = 3188,
+	[BNXT_ULP_CLASS_HID_24470] = 3189,
+	[BNXT_ULP_CLASS_HID_25300] = 3190,
+	[BNXT_ULP_CLASS_HID_22c74] = 3191,
+	[BNXT_ULP_CLASS_HID_240a4] = 3192,
+	[BNXT_ULP_CLASS_HID_23da0] = 3193,
+	[BNXT_ULP_CLASS_HID_20970] = 3194,
+	[BNXT_ULP_CLASS_HID_205a4] = 3195,
+	[BNXT_ULP_CLASS_HID_23694] = 3196,
+	[BNXT_ULP_CLASS_HID_25e34] = 3197,
+	[BNXT_ULP_CLASS_HID_22dc4] = 3198,
+	[BNXT_ULP_CLASS_HID_22638] = 3199,
+	[BNXT_ULP_CLASS_HID_25b68] = 3200,
+	[BNXT_ULP_CLASS_HID_34c8] = 3201,
+	[BNXT_ULP_CLASS_HID_3a04] = 3202,
+	[BNXT_ULP_CLASS_HID_5e98] = 3203,
+	[BNXT_ULP_CLASS_HID_07a0] = 3204,
+	[BNXT_ULP_CLASS_HID_2834] = 3205,
+	[BNXT_ULP_CLASS_HID_595c] = 3206,
+	[BNXT_ULP_CLASS_HID_1e64] = 3207,
+	[BNXT_ULP_CLASS_HID_22f8] = 3208,
+	[BNXT_ULP_CLASS_HID_24664] = 3209,
+	[BNXT_ULP_CLASS_HID_29418] = 3210,
+	[BNXT_ULP_CLASS_HID_30118] = 3211,
+	[BNXT_ULP_CLASS_HID_38a18] = 3212,
+	[BNXT_ULP_CLASS_HID_255b4] = 3213,
+	[BNXT_ULP_CLASS_HID_2deb4] = 3214,
+	[BNXT_ULP_CLASS_HID_34bb4] = 3215,
+	[BNXT_ULP_CLASS_HID_39968] = 3216,
+	[BNXT_ULP_CLASS_HID_22e68] = 3217,
+	[BNXT_ULP_CLASS_HID_2db68] = 3218,
+	[BNXT_ULP_CLASS_HID_34468] = 3219,
+	[BNXT_ULP_CLASS_HID_3921c] = 3220,
+	[BNXT_ULP_CLASS_HID_24318] = 3221,
+	[BNXT_ULP_CLASS_HID_290cc] = 3222,
+	[BNXT_ULP_CLASS_HID_31dcc] = 3223,
+	[BNXT_ULP_CLASS_HID_386cc] = 3224,
+	[BNXT_ULP_CLASS_HID_20fac] = 3225,
+	[BNXT_ULP_CLASS_HID_2b8ac] = 3226,
+	[BNXT_ULP_CLASS_HID_325ac] = 3227,
+	[BNXT_ULP_CLASS_HID_3aeac] = 3228,
+	[BNXT_ULP_CLASS_HID_21afc] = 3229,
+	[BNXT_ULP_CLASS_HID_287fc] = 3230,
+	[BNXT_ULP_CLASS_HID_330fc] = 3231,
+	[BNXT_ULP_CLASS_HID_3bdfc] = 3232,
+	[BNXT_ULP_CLASS_HID_217b0] = 3233,
+	[BNXT_ULP_CLASS_HID_280b0] = 3234,
+	[BNXT_ULP_CLASS_HID_30db0] = 3235,
+	[BNXT_ULP_CLASS_HID_3b6b0] = 3236,
+	[BNXT_ULP_CLASS_HID_20860] = 3237,
+	[BNXT_ULP_CLASS_HID_2b560] = 3238,
+	[BNXT_ULP_CLASS_HID_33e60] = 3239,
+	[BNXT_ULP_CLASS_HID_3ab60] = 3240,
+	[BNXT_ULP_CLASS_HID_253c0] = 3241,
+	[BNXT_ULP_CLASS_HID_2dcc0] = 3242,
+	[BNXT_ULP_CLASS_HID_349c0] = 3243,
+	[BNXT_ULP_CLASS_HID_397f4] = 3244,
+	[BNXT_ULP_CLASS_HID_23f10] = 3245,
+	[BNXT_ULP_CLASS_HID_2a810] = 3246,
+	[BNXT_ULP_CLASS_HID_35510] = 3247,
+	[BNXT_ULP_CLASS_HID_3de10] = 3248,
+	[BNXT_ULP_CLASS_HID_23bc4] = 3249,
+	[BNXT_ULP_CLASS_HID_2a4c4] = 3250,
+	[BNXT_ULP_CLASS_HID_351c4] = 3251,
+	[BNXT_ULP_CLASS_HID_3dac4] = 3252,
+	[BNXT_ULP_CLASS_HID_22cf4] = 3253,
+	[BNXT_ULP_CLASS_HID_2d9f4] = 3254,
+	[BNXT_ULP_CLASS_HID_342f4] = 3255,
+	[BNXT_ULP_CLASS_HID_390a8] = 3256,
+	[BNXT_ULP_CLASS_HID_21908] = 3257,
+	[BNXT_ULP_CLASS_HID_28208] = 3258,
+	[BNXT_ULP_CLASS_HID_30f08] = 3259,
+	[BNXT_ULP_CLASS_HID_3b808] = 3260,
+	[BNXT_ULP_CLASS_HID_243a4] = 3261,
+	[BNXT_ULP_CLASS_HID_29158] = 3262,
+	[BNXT_ULP_CLASS_HID_31a58] = 3263,
+	[BNXT_ULP_CLASS_HID_38758] = 3264,
+	[BNXT_ULP_CLASS_HID_25c58] = 3265,
+	[BNXT_ULP_CLASS_HID_2c958] = 3266,
+	[BNXT_ULP_CLASS_HID_3170c] = 3267,
+	[BNXT_ULP_CLASS_HID_3800c] = 3268,
+	[BNXT_ULP_CLASS_HID_2123c] = 3269,
+	[BNXT_ULP_CLASS_HID_29f3c] = 3270,
+	[BNXT_ULP_CLASS_HID_3083c] = 3271,
+	[BNXT_ULP_CLASS_HID_3b53c] = 3272,
+	[BNXT_ULP_CLASS_HID_240a8] = 3273,
+	[BNXT_ULP_CLASS_HID_2cda8] = 3274,
+	[BNXT_ULP_CLASS_HID_31b5c] = 3275,
+	[BNXT_ULP_CLASS_HID_3845c] = 3276,
+	[BNXT_ULP_CLASS_HID_22ff8] = 3277,
+	[BNXT_ULP_CLASS_HID_2d8f8] = 3278,
+	[BNXT_ULP_CLASS_HID_345f8] = 3279,
+	[BNXT_ULP_CLASS_HID_393ac] = 3280,
+	[BNXT_ULP_CLASS_HID_228ac] = 3281,
+	[BNXT_ULP_CLASS_HID_2d5ac] = 3282,
+	[BNXT_ULP_CLASS_HID_35eac] = 3283,
+	[BNXT_ULP_CLASS_HID_3cbac] = 3284,
+	[BNXT_ULP_CLASS_HID_25d5c] = 3285,
+	[BNXT_ULP_CLASS_HID_2c65c] = 3286,
+	[BNXT_ULP_CLASS_HID_31410] = 3287,
+	[BNXT_ULP_CLASS_HID_38110] = 3288,
+	[BNXT_ULP_CLASS_HID_209f0] = 3289,
+	[BNXT_ULP_CLASS_HID_2b2f0] = 3290,
+	[BNXT_ULP_CLASS_HID_33ff0] = 3291,
+	[BNXT_ULP_CLASS_HID_3a8f0] = 3292,
+	[BNXT_ULP_CLASS_HID_214c0] = 3293,
+	[BNXT_ULP_CLASS_HID_281c0] = 3294,
+	[BNXT_ULP_CLASS_HID_30ac0] = 3295,
+	[BNXT_ULP_CLASS_HID_3b7c0] = 3296,
+	[BNXT_ULP_CLASS_HID_211f4] = 3297,
+	[BNXT_ULP_CLASS_HID_29af4] = 3298,
+	[BNXT_ULP_CLASS_HID_307f4] = 3299,
+	[BNXT_ULP_CLASS_HID_3b0f4] = 3300,
+	[BNXT_ULP_CLASS_HID_202a4] = 3301,
+	[BNXT_ULP_CLASS_HID_28fa4] = 3302,
+	[BNXT_ULP_CLASS_HID_338a4] = 3303,
+	[BNXT_ULP_CLASS_HID_3a5a4] = 3304,
+	[BNXT_ULP_CLASS_HID_22a04] = 3305,
+	[BNXT_ULP_CLASS_HID_2d704] = 3306,
+	[BNXT_ULP_CLASS_HID_34004] = 3307,
+	[BNXT_ULP_CLASS_HID_3cd04] = 3308,
+	[BNXT_ULP_CLASS_HID_23954] = 3309,
+	[BNXT_ULP_CLASS_HID_2a254] = 3310,
+	[BNXT_ULP_CLASS_HID_32f54] = 3311,
+	[BNXT_ULP_CLASS_HID_3d854] = 3312,
+	[BNXT_ULP_CLASS_HID_23208] = 3313,
+	[BNXT_ULP_CLASS_HID_2bf08] = 3314,
+	[BNXT_ULP_CLASS_HID_32808] = 3315,
+	[BNXT_ULP_CLASS_HID_3d508] = 3316,
+	[BNXT_ULP_CLASS_HID_22738] = 3317,
+	[BNXT_ULP_CLASS_HID_2d038] = 3318,
+	[BNXT_ULP_CLASS_HID_35d38] = 3319,
+	[BNXT_ULP_CLASS_HID_3c638] = 3320,
+	[BNXT_ULP_CLASS_HID_2134c] = 3321,
+	[BNXT_ULP_CLASS_HID_29c4c] = 3322,
+	[BNXT_ULP_CLASS_HID_3094c] = 3323,
+	[BNXT_ULP_CLASS_HID_3b24c] = 3324,
+	[BNXT_ULP_CLASS_HID_25de8] = 3325,
+	[BNXT_ULP_CLASS_HID_2c6e8] = 3326,
+	[BNXT_ULP_CLASS_HID_3149c] = 3327,
+	[BNXT_ULP_CLASS_HID_3819c] = 3328,
+	[BNXT_ULP_CLASS_HID_2569c] = 3329,
+	[BNXT_ULP_CLASS_HID_2c39c] = 3330,
+	[BNXT_ULP_CLASS_HID_31150] = 3331,
+	[BNXT_ULP_CLASS_HID_39a50] = 3332,
+	[BNXT_ULP_CLASS_HID_24b4c] = 3333,
+	[BNXT_ULP_CLASS_HID_29900] = 3334,
+	[BNXT_ULP_CLASS_HID_30200] = 3335,
+	[BNXT_ULP_CLASS_HID_38f00] = 3336,
+	[BNXT_ULP_CLASS_HID_22f74] = 3337,
+	[BNXT_ULP_CLASS_HID_2d874] = 3338,
+	[BNXT_ULP_CLASS_HID_34574] = 3339,
+	[BNXT_ULP_CLASS_HID_39328] = 3340,
+	[BNXT_ULP_CLASS_HID_23a44] = 3341,
+	[BNXT_ULP_CLASS_HID_2a744] = 3342,
+	[BNXT_ULP_CLASS_HID_35044] = 3343,
+	[BNXT_ULP_CLASS_HID_3dd44] = 3344,
+	[BNXT_ULP_CLASS_HID_23778] = 3345,
+	[BNXT_ULP_CLASS_HID_2a078] = 3346,
+	[BNXT_ULP_CLASS_HID_32d78] = 3347,
+	[BNXT_ULP_CLASS_HID_3d678] = 3348,
+	[BNXT_ULP_CLASS_HID_22828] = 3349,
+	[BNXT_ULP_CLASS_HID_2d528] = 3350,
+	[BNXT_ULP_CLASS_HID_35e28] = 3351,
+	[BNXT_ULP_CLASS_HID_3cb28] = 3352,
+	[BNXT_ULP_CLASS_HID_214bc] = 3353,
+	[BNXT_ULP_CLASS_HID_281bc] = 3354,
+	[BNXT_ULP_CLASS_HID_30abc] = 3355,
+	[BNXT_ULP_CLASS_HID_3b7bc] = 3356,
+	[BNXT_ULP_CLASS_HID_25ed8] = 3357,
+	[BNXT_ULP_CLASS_HID_2cbd8] = 3358,
+	[BNXT_ULP_CLASS_HID_3198c] = 3359,
+	[BNXT_ULP_CLASS_HID_3828c] = 3360,
+	[BNXT_ULP_CLASS_HID_25b8c] = 3361,
+	[BNXT_ULP_CLASS_HID_2c48c] = 3362,
+	[BNXT_ULP_CLASS_HID_31240] = 3363,
+	[BNXT_ULP_CLASS_HID_39f40] = 3364,
+	[BNXT_ULP_CLASS_HID_21170] = 3365,
+	[BNXT_ULP_CLASS_HID_29a70] = 3366,
+	[BNXT_ULP_CLASS_HID_30770] = 3367,
+	[BNXT_ULP_CLASS_HID_3b070] = 3368,
+	[BNXT_ULP_CLASS_HID_238d0] = 3369,
+	[BNXT_ULP_CLASS_HID_2a5d0] = 3370,
+	[BNXT_ULP_CLASS_HID_32ed0] = 3371,
+	[BNXT_ULP_CLASS_HID_3dbd0] = 3372,
+	[BNXT_ULP_CLASS_HID_20420] = 3373,
+	[BNXT_ULP_CLASS_HID_2b120] = 3374,
+	[BNXT_ULP_CLASS_HID_33a20] = 3375,
+	[BNXT_ULP_CLASS_HID_3a720] = 3376,
+	[BNXT_ULP_CLASS_HID_200d4] = 3377,
+	[BNXT_ULP_CLASS_HID_28dd4] = 3378,
+	[BNXT_ULP_CLASS_HID_336d4] = 3379,
+	[BNXT_ULP_CLASS_HID_3a3d4] = 3380,
+	[BNXT_ULP_CLASS_HID_23584] = 3381,
+	[BNXT_ULP_CLASS_HID_2be84] = 3382,
+	[BNXT_ULP_CLASS_HID_32b84] = 3383,
+	[BNXT_ULP_CLASS_HID_3d484] = 3384,
+	[BNXT_ULP_CLASS_HID_25d64] = 3385,
+	[BNXT_ULP_CLASS_HID_2c664] = 3386,
+	[BNXT_ULP_CLASS_HID_31418] = 3387,
+	[BNXT_ULP_CLASS_HID_38118] = 3388,
+	[BNXT_ULP_CLASS_HID_228b4] = 3389,
+	[BNXT_ULP_CLASS_HID_2d5b4] = 3390,
+	[BNXT_ULP_CLASS_HID_35eb4] = 3391,
+	[BNXT_ULP_CLASS_HID_3cbb4] = 3392,
+	[BNXT_ULP_CLASS_HID_22568] = 3393,
+	[BNXT_ULP_CLASS_HID_2ae68] = 3394,
+	[BNXT_ULP_CLASS_HID_35b68] = 3395,
+	[BNXT_ULP_CLASS_HID_3c468] = 3396,
+	[BNXT_ULP_CLASS_HID_25618] = 3397,
+	[BNXT_ULP_CLASS_HID_2c318] = 3398,
+	[BNXT_ULP_CLASS_HID_310cc] = 3399,
+	[BNXT_ULP_CLASS_HID_39dcc] = 3400,
+	[BNXT_ULP_CLASS_HID_229b8] = 3401,
+	[BNXT_ULP_CLASS_HID_2d2b8] = 3402,
+	[BNXT_ULP_CLASS_HID_35fb8] = 3403,
+	[BNXT_ULP_CLASS_HID_3c8b8] = 3404,
+	[BNXT_ULP_CLASS_HID_23488] = 3405,
+	[BNXT_ULP_CLASS_HID_2a188] = 3406,
+	[BNXT_ULP_CLASS_HID_32a88] = 3407,
+	[BNXT_ULP_CLASS_HID_3d788] = 3408,
+	[BNXT_ULP_CLASS_HID_231bc] = 3409,
+	[BNXT_ULP_CLASS_HID_2babc] = 3410,
+	[BNXT_ULP_CLASS_HID_327bc] = 3411,
+	[BNXT_ULP_CLASS_HID_3d0bc] = 3412,
+	[BNXT_ULP_CLASS_HID_2226c] = 3413,
+	[BNXT_ULP_CLASS_HID_2af6c] = 3414,
+	[BNXT_ULP_CLASS_HID_3586c] = 3415,
+	[BNXT_ULP_CLASS_HID_3c56c] = 3416,
+	[BNXT_ULP_CLASS_HID_24dcc] = 3417,
+	[BNXT_ULP_CLASS_HID_29b80] = 3418,
+	[BNXT_ULP_CLASS_HID_30480] = 3419,
+	[BNXT_ULP_CLASS_HID_3b180] = 3420,
+	[BNXT_ULP_CLASS_HID_2591c] = 3421,
+	[BNXT_ULP_CLASS_HID_2c21c] = 3422,
+	[BNXT_ULP_CLASS_HID_313d0] = 3423,
+	[BNXT_ULP_CLASS_HID_39cd0] = 3424,
+	[BNXT_ULP_CLASS_HID_255d0] = 3425,
+	[BNXT_ULP_CLASS_HID_2ded0] = 3426,
+	[BNXT_ULP_CLASS_HID_34bd0] = 3427,
+	[BNXT_ULP_CLASS_HID_39984] = 3428,
+	[BNXT_ULP_CLASS_HID_24680] = 3429,
+	[BNXT_ULP_CLASS_HID_294b4] = 3430,
+	[BNXT_ULP_CLASS_HID_301b4] = 3431,
+	[BNXT_ULP_CLASS_HID_38ab4] = 3432,
+	[BNXT_ULP_CLASS_HID_23314] = 3433,
+	[BNXT_ULP_CLASS_HID_2bc14] = 3434,
+	[BNXT_ULP_CLASS_HID_32914] = 3435,
+	[BNXT_ULP_CLASS_HID_3d214] = 3436,
+	[BNXT_ULP_CLASS_HID_21e64] = 3437,
+	[BNXT_ULP_CLASS_HID_28b64] = 3438,
+	[BNXT_ULP_CLASS_HID_33464] = 3439,
+	[BNXT_ULP_CLASS_HID_3a164] = 3440,
+	[BNXT_ULP_CLASS_HID_21b18] = 3441,
+	[BNXT_ULP_CLASS_HID_28418] = 3442,
+	[BNXT_ULP_CLASS_HID_33118] = 3443,
+	[BNXT_ULP_CLASS_HID_3ba18] = 3444,
+	[BNXT_ULP_CLASS_HID_20fc8] = 3445,
+	[BNXT_ULP_CLASS_HID_2b8c8] = 3446,
+	[BNXT_ULP_CLASS_HID_325c8] = 3447,
+	[BNXT_ULP_CLASS_HID_3aec8] = 3448,
+	[BNXT_ULP_CLASS_HID_257a8] = 3449,
+	[BNXT_ULP_CLASS_HID_2c0a8] = 3450,
+	[BNXT_ULP_CLASS_HID_34da8] = 3451,
+	[BNXT_ULP_CLASS_HID_39b5c] = 3452,
+	[BNXT_ULP_CLASS_HID_222f8] = 3453,
+	[BNXT_ULP_CLASS_HID_2aff8] = 3454,
+	[BNXT_ULP_CLASS_HID_358f8] = 3455,
+	[BNXT_ULP_CLASS_HID_3c5f8] = 3456,
+	[BNXT_ULP_CLASS_HID_23fac] = 3457,
+	[BNXT_ULP_CLASS_HID_2a8ac] = 3458,
+	[BNXT_ULP_CLASS_HID_355ac] = 3459,
+	[BNXT_ULP_CLASS_HID_3deac] = 3460,
+	[BNXT_ULP_CLASS_HID_2505c] = 3461,
+	[BNXT_ULP_CLASS_HID_2dd5c] = 3462,
+	[BNXT_ULP_CLASS_HID_3465c] = 3463,
+	[BNXT_ULP_CLASS_HID_39410] = 3464,
+	[BNXT_ULP_CLASS_HID_223fc] = 3465,
+	[BNXT_ULP_CLASS_HID_2acfc] = 3466,
+	[BNXT_ULP_CLASS_HID_359fc] = 3467,
+	[BNXT_ULP_CLASS_HID_3c2fc] = 3468,
+	[BNXT_ULP_CLASS_HID_20ecc] = 3469,
+	[BNXT_ULP_CLASS_HID_2bbcc] = 3470,
+	[BNXT_ULP_CLASS_HID_324cc] = 3471,
+	[BNXT_ULP_CLASS_HID_3d1cc] = 3472,
+	[BNXT_ULP_CLASS_HID_20b80] = 3473,
+	[BNXT_ULP_CLASS_HID_2b480] = 3474,
+	[BNXT_ULP_CLASS_HID_32180] = 3475,
+	[BNXT_ULP_CLASS_HID_3aa80] = 3476,
+	[BNXT_ULP_CLASS_HID_23cb0] = 3477,
+	[BNXT_ULP_CLASS_HID_2a9b0] = 3478,
+	[BNXT_ULP_CLASS_HID_352b0] = 3479,
+	[BNXT_ULP_CLASS_HID_3dfb0] = 3480,
+	[BNXT_ULP_CLASS_HID_24410] = 3481,
+	[BNXT_ULP_CLASS_HID_295c4] = 3482,
+	[BNXT_ULP_CLASS_HID_31ec4] = 3483,
+	[BNXT_ULP_CLASS_HID_38bc4] = 3484,
+	[BNXT_ULP_CLASS_HID_25360] = 3485,
+	[BNXT_ULP_CLASS_HID_2dc60] = 3486,
+	[BNXT_ULP_CLASS_HID_34960] = 3487,
+	[BNXT_ULP_CLASS_HID_39714] = 3488,
+	[BNXT_ULP_CLASS_HID_22c14] = 3489,
+	[BNXT_ULP_CLASS_HID_2d914] = 3490,
+	[BNXT_ULP_CLASS_HID_34214] = 3491,
+	[BNXT_ULP_CLASS_HID_393c8] = 3492,
+	[BNXT_ULP_CLASS_HID_240c4] = 3493,
+	[BNXT_ULP_CLASS_HID_2cdc4] = 3494,
+	[BNXT_ULP_CLASS_HID_31bf8] = 3495,
+	[BNXT_ULP_CLASS_HID_384f8] = 3496,
+	[BNXT_ULP_CLASS_HID_23dc0] = 3497,
+	[BNXT_ULP_CLASS_HID_2a6c0] = 3498,
+	[BNXT_ULP_CLASS_HID_353c0] = 3499,
+	[BNXT_ULP_CLASS_HID_3dcc0] = 3500,
+	[BNXT_ULP_CLASS_HID_20910] = 3501,
+	[BNXT_ULP_CLASS_HID_2b210] = 3502,
+	[BNXT_ULP_CLASS_HID_33f10] = 3503,
+	[BNXT_ULP_CLASS_HID_3a810] = 3504,
+	[BNXT_ULP_CLASS_HID_205c4] = 3505,
+	[BNXT_ULP_CLASS_HID_28ec4] = 3506,
+	[BNXT_ULP_CLASS_HID_33bc4] = 3507,
+	[BNXT_ULP_CLASS_HID_3a4c4] = 3508,
+	[BNXT_ULP_CLASS_HID_236f4] = 3509,
+	[BNXT_ULP_CLASS_HID_2a3f4] = 3510,
+	[BNXT_ULP_CLASS_HID_32cf4] = 3511,
+	[BNXT_ULP_CLASS_HID_3d9f4] = 3512,
+	[BNXT_ULP_CLASS_HID_25e54] = 3513,
+	[BNXT_ULP_CLASS_HID_2cb54] = 3514,
+	[BNXT_ULP_CLASS_HID_31908] = 3515,
+	[BNXT_ULP_CLASS_HID_38208] = 3516,
+	[BNXT_ULP_CLASS_HID_22da4] = 3517,
+	[BNXT_ULP_CLASS_HID_2d6a4] = 3518,
+	[BNXT_ULP_CLASS_HID_343a4] = 3519,
+	[BNXT_ULP_CLASS_HID_39158] = 3520,
+	[BNXT_ULP_CLASS_HID_22658] = 3521,
+	[BNXT_ULP_CLASS_HID_2d358] = 3522,
+	[BNXT_ULP_CLASS_HID_35c58] = 3523,
+	[BNXT_ULP_CLASS_HID_3c958] = 3524,
+	[BNXT_ULP_CLASS_HID_25b08] = 3525,
+	[BNXT_ULP_CLASS_HID_2c408] = 3526,
+	[BNXT_ULP_CLASS_HID_3123c] = 3527,
+	[BNXT_ULP_CLASS_HID_39f3c] = 3528,
+	[BNXT_ULP_CLASS_HID_34a8] = 3529,
+	[BNXT_ULP_CLASS_HID_3a64] = 3530,
+	[BNXT_ULP_CLASS_HID_5ef8] = 3531,
+	[BNXT_ULP_CLASS_HID_07c0] = 3532,
+	[BNXT_ULP_CLASS_HID_2854] = 3533,
+	[BNXT_ULP_CLASS_HID_593c] = 3534,
+	[BNXT_ULP_CLASS_HID_1e04] = 3535,
+	[BNXT_ULP_CLASS_HID_2298] = 3536,
+	[BNXT_ULP_CLASS_HID_24644] = 3537,
+	[BNXT_ULP_CLASS_HID_29438] = 3538,
+	[BNXT_ULP_CLASS_HID_30138] = 3539,
+	[BNXT_ULP_CLASS_HID_38a38] = 3540,
+	[BNXT_ULP_CLASS_HID_25594] = 3541,
+	[BNXT_ULP_CLASS_HID_2de94] = 3542,
+	[BNXT_ULP_CLASS_HID_34b94] = 3543,
+	[BNXT_ULP_CLASS_HID_39948] = 3544,
+	[BNXT_ULP_CLASS_HID_22e48] = 3545,
+	[BNXT_ULP_CLASS_HID_2db48] = 3546,
+	[BNXT_ULP_CLASS_HID_34448] = 3547,
+	[BNXT_ULP_CLASS_HID_3923c] = 3548,
+	[BNXT_ULP_CLASS_HID_24338] = 3549,
+	[BNXT_ULP_CLASS_HID_290ec] = 3550,
+	[BNXT_ULP_CLASS_HID_31dec] = 3551,
+	[BNXT_ULP_CLASS_HID_386ec] = 3552,
+	[BNXT_ULP_CLASS_HID_20f8c] = 3553,
+	[BNXT_ULP_CLASS_HID_2b88c] = 3554,
+	[BNXT_ULP_CLASS_HID_3258c] = 3555,
+	[BNXT_ULP_CLASS_HID_3ae8c] = 3556,
+	[BNXT_ULP_CLASS_HID_21adc] = 3557,
+	[BNXT_ULP_CLASS_HID_287dc] = 3558,
+	[BNXT_ULP_CLASS_HID_330dc] = 3559,
+	[BNXT_ULP_CLASS_HID_3bddc] = 3560,
+	[BNXT_ULP_CLASS_HID_21790] = 3561,
+	[BNXT_ULP_CLASS_HID_28090] = 3562,
+	[BNXT_ULP_CLASS_HID_30d90] = 3563,
+	[BNXT_ULP_CLASS_HID_3b690] = 3564,
+	[BNXT_ULP_CLASS_HID_20840] = 3565,
+	[BNXT_ULP_CLASS_HID_2b540] = 3566,
+	[BNXT_ULP_CLASS_HID_33e40] = 3567,
+	[BNXT_ULP_CLASS_HID_3ab40] = 3568,
+	[BNXT_ULP_CLASS_HID_253e0] = 3569,
+	[BNXT_ULP_CLASS_HID_2dce0] = 3570,
+	[BNXT_ULP_CLASS_HID_349e0] = 3571,
+	[BNXT_ULP_CLASS_HID_397d4] = 3572,
+	[BNXT_ULP_CLASS_HID_23f30] = 3573,
+	[BNXT_ULP_CLASS_HID_2a830] = 3574,
+	[BNXT_ULP_CLASS_HID_35530] = 3575,
+	[BNXT_ULP_CLASS_HID_3de30] = 3576,
+	[BNXT_ULP_CLASS_HID_23be4] = 3577,
+	[BNXT_ULP_CLASS_HID_2a4e4] = 3578,
+	[BNXT_ULP_CLASS_HID_351e4] = 3579,
+	[BNXT_ULP_CLASS_HID_3dae4] = 3580,
+	[BNXT_ULP_CLASS_HID_22cd4] = 3581,
+	[BNXT_ULP_CLASS_HID_2d9d4] = 3582,
+	[BNXT_ULP_CLASS_HID_342d4] = 3583,
+	[BNXT_ULP_CLASS_HID_39088] = 3584,
+	[BNXT_ULP_CLASS_HID_21928] = 3585,
+	[BNXT_ULP_CLASS_HID_28228] = 3586,
+	[BNXT_ULP_CLASS_HID_30f28] = 3587,
+	[BNXT_ULP_CLASS_HID_3b828] = 3588,
+	[BNXT_ULP_CLASS_HID_24384] = 3589,
+	[BNXT_ULP_CLASS_HID_29178] = 3590,
+	[BNXT_ULP_CLASS_HID_31a78] = 3591,
+	[BNXT_ULP_CLASS_HID_38778] = 3592,
+	[BNXT_ULP_CLASS_HID_25c78] = 3593,
+	[BNXT_ULP_CLASS_HID_2c978] = 3594,
+	[BNXT_ULP_CLASS_HID_3172c] = 3595,
+	[BNXT_ULP_CLASS_HID_3802c] = 3596,
+	[BNXT_ULP_CLASS_HID_2121c] = 3597,
+	[BNXT_ULP_CLASS_HID_29f1c] = 3598,
+	[BNXT_ULP_CLASS_HID_3081c] = 3599,
+	[BNXT_ULP_CLASS_HID_3b51c] = 3600,
+	[BNXT_ULP_CLASS_HID_24088] = 3601,
+	[BNXT_ULP_CLASS_HID_2cd88] = 3602,
+	[BNXT_ULP_CLASS_HID_31b7c] = 3603,
+	[BNXT_ULP_CLASS_HID_3847c] = 3604,
+	[BNXT_ULP_CLASS_HID_22fd8] = 3605,
+	[BNXT_ULP_CLASS_HID_2d8d8] = 3606,
+	[BNXT_ULP_CLASS_HID_345d8] = 3607,
+	[BNXT_ULP_CLASS_HID_3938c] = 3608,
+	[BNXT_ULP_CLASS_HID_2288c] = 3609,
+	[BNXT_ULP_CLASS_HID_2d58c] = 3610,
+	[BNXT_ULP_CLASS_HID_35e8c] = 3611,
+	[BNXT_ULP_CLASS_HID_3cb8c] = 3612,
+	[BNXT_ULP_CLASS_HID_25d7c] = 3613,
+	[BNXT_ULP_CLASS_HID_2c67c] = 3614,
+	[BNXT_ULP_CLASS_HID_31430] = 3615,
+	[BNXT_ULP_CLASS_HID_38130] = 3616,
+	[BNXT_ULP_CLASS_HID_209d0] = 3617,
+	[BNXT_ULP_CLASS_HID_2b2d0] = 3618,
+	[BNXT_ULP_CLASS_HID_33fd0] = 3619,
+	[BNXT_ULP_CLASS_HID_3a8d0] = 3620,
+	[BNXT_ULP_CLASS_HID_214e0] = 3621,
+	[BNXT_ULP_CLASS_HID_281e0] = 3622,
+	[BNXT_ULP_CLASS_HID_30ae0] = 3623,
+	[BNXT_ULP_CLASS_HID_3b7e0] = 3624,
+	[BNXT_ULP_CLASS_HID_211d4] = 3625,
+	[BNXT_ULP_CLASS_HID_29ad4] = 3626,
+	[BNXT_ULP_CLASS_HID_307d4] = 3627,
+	[BNXT_ULP_CLASS_HID_3b0d4] = 3628,
+	[BNXT_ULP_CLASS_HID_20284] = 3629,
+	[BNXT_ULP_CLASS_HID_28f84] = 3630,
+	[BNXT_ULP_CLASS_HID_33884] = 3631,
+	[BNXT_ULP_CLASS_HID_3a584] = 3632,
+	[BNXT_ULP_CLASS_HID_22a24] = 3633,
+	[BNXT_ULP_CLASS_HID_2d724] = 3634,
+	[BNXT_ULP_CLASS_HID_34024] = 3635,
+	[BNXT_ULP_CLASS_HID_3cd24] = 3636,
+	[BNXT_ULP_CLASS_HID_23974] = 3637,
+	[BNXT_ULP_CLASS_HID_2a274] = 3638,
+	[BNXT_ULP_CLASS_HID_32f74] = 3639,
+	[BNXT_ULP_CLASS_HID_3d874] = 3640,
+	[BNXT_ULP_CLASS_HID_23228] = 3641,
+	[BNXT_ULP_CLASS_HID_2bf28] = 3642,
+	[BNXT_ULP_CLASS_HID_32828] = 3643,
+	[BNXT_ULP_CLASS_HID_3d528] = 3644,
+	[BNXT_ULP_CLASS_HID_22718] = 3645,
+	[BNXT_ULP_CLASS_HID_2d018] = 3646,
+	[BNXT_ULP_CLASS_HID_35d18] = 3647,
+	[BNXT_ULP_CLASS_HID_3c618] = 3648,
+	[BNXT_ULP_CLASS_HID_2136c] = 3649,
+	[BNXT_ULP_CLASS_HID_29c6c] = 3650,
+	[BNXT_ULP_CLASS_HID_3096c] = 3651,
+	[BNXT_ULP_CLASS_HID_3b26c] = 3652,
+	[BNXT_ULP_CLASS_HID_25dc8] = 3653,
+	[BNXT_ULP_CLASS_HID_2c6c8] = 3654,
+	[BNXT_ULP_CLASS_HID_314bc] = 3655,
+	[BNXT_ULP_CLASS_HID_381bc] = 3656,
+	[BNXT_ULP_CLASS_HID_256bc] = 3657,
+	[BNXT_ULP_CLASS_HID_2c3bc] = 3658,
+	[BNXT_ULP_CLASS_HID_31170] = 3659,
+	[BNXT_ULP_CLASS_HID_39a70] = 3660,
+	[BNXT_ULP_CLASS_HID_24b6c] = 3661,
+	[BNXT_ULP_CLASS_HID_29920] = 3662,
+	[BNXT_ULP_CLASS_HID_30220] = 3663,
+	[BNXT_ULP_CLASS_HID_38f20] = 3664,
+	[BNXT_ULP_CLASS_HID_22f54] = 3665,
+	[BNXT_ULP_CLASS_HID_2d854] = 3666,
+	[BNXT_ULP_CLASS_HID_34554] = 3667,
+	[BNXT_ULP_CLASS_HID_39308] = 3668,
+	[BNXT_ULP_CLASS_HID_23a64] = 3669,
+	[BNXT_ULP_CLASS_HID_2a764] = 3670,
+	[BNXT_ULP_CLASS_HID_35064] = 3671,
+	[BNXT_ULP_CLASS_HID_3dd64] = 3672,
+	[BNXT_ULP_CLASS_HID_23758] = 3673,
+	[BNXT_ULP_CLASS_HID_2a058] = 3674,
+	[BNXT_ULP_CLASS_HID_32d58] = 3675,
+	[BNXT_ULP_CLASS_HID_3d658] = 3676,
+	[BNXT_ULP_CLASS_HID_22808] = 3677,
+	[BNXT_ULP_CLASS_HID_2d508] = 3678,
+	[BNXT_ULP_CLASS_HID_35e08] = 3679,
+	[BNXT_ULP_CLASS_HID_3cb08] = 3680,
+	[BNXT_ULP_CLASS_HID_2149c] = 3681,
+	[BNXT_ULP_CLASS_HID_2819c] = 3682,
+	[BNXT_ULP_CLASS_HID_30a9c] = 3683,
+	[BNXT_ULP_CLASS_HID_3b79c] = 3684,
+	[BNXT_ULP_CLASS_HID_25ef8] = 3685,
+	[BNXT_ULP_CLASS_HID_2cbf8] = 3686,
+	[BNXT_ULP_CLASS_HID_319ac] = 3687,
+	[BNXT_ULP_CLASS_HID_382ac] = 3688,
+	[BNXT_ULP_CLASS_HID_25bac] = 3689,
+	[BNXT_ULP_CLASS_HID_2c4ac] = 3690,
+	[BNXT_ULP_CLASS_HID_31260] = 3691,
+	[BNXT_ULP_CLASS_HID_39f60] = 3692,
+	[BNXT_ULP_CLASS_HID_21150] = 3693,
+	[BNXT_ULP_CLASS_HID_29a50] = 3694,
+	[BNXT_ULP_CLASS_HID_30750] = 3695,
+	[BNXT_ULP_CLASS_HID_3b050] = 3696,
+	[BNXT_ULP_CLASS_HID_238f0] = 3697,
+	[BNXT_ULP_CLASS_HID_2a5f0] = 3698,
+	[BNXT_ULP_CLASS_HID_32ef0] = 3699,
+	[BNXT_ULP_CLASS_HID_3dbf0] = 3700,
+	[BNXT_ULP_CLASS_HID_20400] = 3701,
+	[BNXT_ULP_CLASS_HID_2b100] = 3702,
+	[BNXT_ULP_CLASS_HID_33a00] = 3703,
+	[BNXT_ULP_CLASS_HID_3a700] = 3704,
+	[BNXT_ULP_CLASS_HID_200f4] = 3705,
+	[BNXT_ULP_CLASS_HID_28df4] = 3706,
+	[BNXT_ULP_CLASS_HID_336f4] = 3707,
+	[BNXT_ULP_CLASS_HID_3a3f4] = 3708,
+	[BNXT_ULP_CLASS_HID_235a4] = 3709,
+	[BNXT_ULP_CLASS_HID_2bea4] = 3710,
+	[BNXT_ULP_CLASS_HID_32ba4] = 3711,
+	[BNXT_ULP_CLASS_HID_3d4a4] = 3712,
+	[BNXT_ULP_CLASS_HID_25d44] = 3713,
+	[BNXT_ULP_CLASS_HID_2c644] = 3714,
+	[BNXT_ULP_CLASS_HID_31438] = 3715,
+	[BNXT_ULP_CLASS_HID_38138] = 3716,
+	[BNXT_ULP_CLASS_HID_22894] = 3717,
+	[BNXT_ULP_CLASS_HID_2d594] = 3718,
+	[BNXT_ULP_CLASS_HID_35e94] = 3719,
+	[BNXT_ULP_CLASS_HID_3cb94] = 3720,
+	[BNXT_ULP_CLASS_HID_22548] = 3721,
+	[BNXT_ULP_CLASS_HID_2ae48] = 3722,
+	[BNXT_ULP_CLASS_HID_35b48] = 3723,
+	[BNXT_ULP_CLASS_HID_3c448] = 3724,
+	[BNXT_ULP_CLASS_HID_25638] = 3725,
+	[BNXT_ULP_CLASS_HID_2c338] = 3726,
+	[BNXT_ULP_CLASS_HID_310ec] = 3727,
+	[BNXT_ULP_CLASS_HID_39dec] = 3728,
+	[BNXT_ULP_CLASS_HID_22998] = 3729,
+	[BNXT_ULP_CLASS_HID_2d298] = 3730,
+	[BNXT_ULP_CLASS_HID_35f98] = 3731,
+	[BNXT_ULP_CLASS_HID_3c898] = 3732,
+	[BNXT_ULP_CLASS_HID_234a8] = 3733,
+	[BNXT_ULP_CLASS_HID_2a1a8] = 3734,
+	[BNXT_ULP_CLASS_HID_32aa8] = 3735,
+	[BNXT_ULP_CLASS_HID_3d7a8] = 3736,
+	[BNXT_ULP_CLASS_HID_2319c] = 3737,
+	[BNXT_ULP_CLASS_HID_2ba9c] = 3738,
+	[BNXT_ULP_CLASS_HID_3279c] = 3739,
+	[BNXT_ULP_CLASS_HID_3d09c] = 3740,
+	[BNXT_ULP_CLASS_HID_2224c] = 3741,
+	[BNXT_ULP_CLASS_HID_2af4c] = 3742,
+	[BNXT_ULP_CLASS_HID_3584c] = 3743,
+	[BNXT_ULP_CLASS_HID_3c54c] = 3744,
+	[BNXT_ULP_CLASS_HID_24dec] = 3745,
+	[BNXT_ULP_CLASS_HID_29ba0] = 3746,
+	[BNXT_ULP_CLASS_HID_304a0] = 3747,
+	[BNXT_ULP_CLASS_HID_3b1a0] = 3748,
+	[BNXT_ULP_CLASS_HID_2593c] = 3749,
+	[BNXT_ULP_CLASS_HID_2c23c] = 3750,
+	[BNXT_ULP_CLASS_HID_313f0] = 3751,
+	[BNXT_ULP_CLASS_HID_39cf0] = 3752,
+	[BNXT_ULP_CLASS_HID_255f0] = 3753,
+	[BNXT_ULP_CLASS_HID_2def0] = 3754,
+	[BNXT_ULP_CLASS_HID_34bf0] = 3755,
+	[BNXT_ULP_CLASS_HID_399a4] = 3756,
+	[BNXT_ULP_CLASS_HID_246a0] = 3757,
+	[BNXT_ULP_CLASS_HID_29494] = 3758,
+	[BNXT_ULP_CLASS_HID_30194] = 3759,
+	[BNXT_ULP_CLASS_HID_38a94] = 3760,
+	[BNXT_ULP_CLASS_HID_23334] = 3761,
+	[BNXT_ULP_CLASS_HID_2bc34] = 3762,
+	[BNXT_ULP_CLASS_HID_32934] = 3763,
+	[BNXT_ULP_CLASS_HID_3d234] = 3764,
+	[BNXT_ULP_CLASS_HID_21e44] = 3765,
+	[BNXT_ULP_CLASS_HID_28b44] = 3766,
+	[BNXT_ULP_CLASS_HID_33444] = 3767,
+	[BNXT_ULP_CLASS_HID_3a144] = 3768,
+	[BNXT_ULP_CLASS_HID_21b38] = 3769,
+	[BNXT_ULP_CLASS_HID_28438] = 3770,
+	[BNXT_ULP_CLASS_HID_33138] = 3771,
+	[BNXT_ULP_CLASS_HID_3ba38] = 3772,
+	[BNXT_ULP_CLASS_HID_20fe8] = 3773,
+	[BNXT_ULP_CLASS_HID_2b8e8] = 3774,
+	[BNXT_ULP_CLASS_HID_325e8] = 3775,
+	[BNXT_ULP_CLASS_HID_3aee8] = 3776,
+	[BNXT_ULP_CLASS_HID_25788] = 3777,
+	[BNXT_ULP_CLASS_HID_2c088] = 3778,
+	[BNXT_ULP_CLASS_HID_34d88] = 3779,
+	[BNXT_ULP_CLASS_HID_39b7c] = 3780,
+	[BNXT_ULP_CLASS_HID_222d8] = 3781,
+	[BNXT_ULP_CLASS_HID_2afd8] = 3782,
+	[BNXT_ULP_CLASS_HID_358d8] = 3783,
+	[BNXT_ULP_CLASS_HID_3c5d8] = 3784,
+	[BNXT_ULP_CLASS_HID_23f8c] = 3785,
+	[BNXT_ULP_CLASS_HID_2a88c] = 3786,
+	[BNXT_ULP_CLASS_HID_3558c] = 3787,
+	[BNXT_ULP_CLASS_HID_3de8c] = 3788,
+	[BNXT_ULP_CLASS_HID_2507c] = 3789,
+	[BNXT_ULP_CLASS_HID_2dd7c] = 3790,
+	[BNXT_ULP_CLASS_HID_3467c] = 3791,
+	[BNXT_ULP_CLASS_HID_39430] = 3792,
+	[BNXT_ULP_CLASS_HID_223dc] = 3793,
+	[BNXT_ULP_CLASS_HID_2acdc] = 3794,
+	[BNXT_ULP_CLASS_HID_359dc] = 3795,
+	[BNXT_ULP_CLASS_HID_3c2dc] = 3796,
+	[BNXT_ULP_CLASS_HID_20eec] = 3797,
+	[BNXT_ULP_CLASS_HID_2bbec] = 3798,
+	[BNXT_ULP_CLASS_HID_324ec] = 3799,
+	[BNXT_ULP_CLASS_HID_3d1ec] = 3800,
+	[BNXT_ULP_CLASS_HID_20ba0] = 3801,
+	[BNXT_ULP_CLASS_HID_2b4a0] = 3802,
+	[BNXT_ULP_CLASS_HID_321a0] = 3803,
+	[BNXT_ULP_CLASS_HID_3aaa0] = 3804,
+	[BNXT_ULP_CLASS_HID_23c90] = 3805,
+	[BNXT_ULP_CLASS_HID_2a990] = 3806,
+	[BNXT_ULP_CLASS_HID_35290] = 3807,
+	[BNXT_ULP_CLASS_HID_3df90] = 3808,
+	[BNXT_ULP_CLASS_HID_24430] = 3809,
+	[BNXT_ULP_CLASS_HID_295e4] = 3810,
+	[BNXT_ULP_CLASS_HID_31ee4] = 3811,
+	[BNXT_ULP_CLASS_HID_38be4] = 3812,
+	[BNXT_ULP_CLASS_HID_25340] = 3813,
+	[BNXT_ULP_CLASS_HID_2dc40] = 3814,
+	[BNXT_ULP_CLASS_HID_34940] = 3815,
+	[BNXT_ULP_CLASS_HID_39734] = 3816,
+	[BNXT_ULP_CLASS_HID_22c34] = 3817,
+	[BNXT_ULP_CLASS_HID_2d934] = 3818,
+	[BNXT_ULP_CLASS_HID_34234] = 3819,
+	[BNXT_ULP_CLASS_HID_393e8] = 3820,
+	[BNXT_ULP_CLASS_HID_240e4] = 3821,
+	[BNXT_ULP_CLASS_HID_2cde4] = 3822,
+	[BNXT_ULP_CLASS_HID_31bd8] = 3823,
+	[BNXT_ULP_CLASS_HID_384d8] = 3824,
+	[BNXT_ULP_CLASS_HID_23de0] = 3825,
+	[BNXT_ULP_CLASS_HID_2a6e0] = 3826,
+	[BNXT_ULP_CLASS_HID_353e0] = 3827,
+	[BNXT_ULP_CLASS_HID_3dce0] = 3828,
+	[BNXT_ULP_CLASS_HID_20930] = 3829,
+	[BNXT_ULP_CLASS_HID_2b230] = 3830,
+	[BNXT_ULP_CLASS_HID_33f30] = 3831,
+	[BNXT_ULP_CLASS_HID_3a830] = 3832,
+	[BNXT_ULP_CLASS_HID_205e4] = 3833,
+	[BNXT_ULP_CLASS_HID_28ee4] = 3834,
+	[BNXT_ULP_CLASS_HID_33be4] = 3835,
+	[BNXT_ULP_CLASS_HID_3a4e4] = 3836,
+	[BNXT_ULP_CLASS_HID_236d4] = 3837,
+	[BNXT_ULP_CLASS_HID_2a3d4] = 3838,
+	[BNXT_ULP_CLASS_HID_32cd4] = 3839,
+	[BNXT_ULP_CLASS_HID_3d9d4] = 3840,
+	[BNXT_ULP_CLASS_HID_25e74] = 3841,
+	[BNXT_ULP_CLASS_HID_2cb74] = 3842,
+	[BNXT_ULP_CLASS_HID_31928] = 3843,
+	[BNXT_ULP_CLASS_HID_38228] = 3844,
+	[BNXT_ULP_CLASS_HID_22d84] = 3845,
+	[BNXT_ULP_CLASS_HID_2d684] = 3846,
+	[BNXT_ULP_CLASS_HID_34384] = 3847,
+	[BNXT_ULP_CLASS_HID_39178] = 3848,
+	[BNXT_ULP_CLASS_HID_22678] = 3849,
+	[BNXT_ULP_CLASS_HID_2d378] = 3850,
+	[BNXT_ULP_CLASS_HID_35c78] = 3851,
+	[BNXT_ULP_CLASS_HID_3c978] = 3852,
+	[BNXT_ULP_CLASS_HID_25b28] = 3853,
+	[BNXT_ULP_CLASS_HID_2c428] = 3854,
+	[BNXT_ULP_CLASS_HID_3121c] = 3855,
+	[BNXT_ULP_CLASS_HID_39f1c] = 3856,
+	[BNXT_ULP_CLASS_HID_3488] = 3857,
+	[BNXT_ULP_CLASS_HID_3a44] = 3858,
+	[BNXT_ULP_CLASS_HID_5ed8] = 3859,
+	[BNXT_ULP_CLASS_HID_07e0] = 3860,
+	[BNXT_ULP_CLASS_HID_2874] = 3861,
+	[BNXT_ULP_CLASS_HID_591c] = 3862,
+	[BNXT_ULP_CLASS_HID_1e24] = 3863,
+	[BNXT_ULP_CLASS_HID_22b8] = 3864
 };
 
 /* Array for the proto matcher list */
 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 	[1] = {
-	.class_hid = BNXT_ULP_CLASS_HID_005c,
+	.class_hid = BNXT_ULP_CLASS_HID_26d1,
 	.class_tid = 1,
 	.hdr_sig_id = 0,
 	.flow_sig_id = 0,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
 		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
 		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
 		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[2] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0003,
+	.class_hid = BNXT_ULP_CLASS_HID_0071,
 	.class_tid = 1,
 	.hdr_sig_id = 0,
 	.flow_sig_id = 1,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
 		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
 		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
 		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[3] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0132,
+	.class_hid = BNXT_ULP_CLASS_HID_53a5,
 	.class_tid = 1,
 	.hdr_sig_id = 0,
 	.flow_sig_id = 1,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
 		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
 		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
 		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
 		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[4] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00e1,
+	.class_hid = BNXT_ULP_CLASS_HID_1d49,
 	.class_tid = 1,
 	.hdr_sig_id = 0,
-	.flow_sig_id = 1,
+	.flow_sig_id = 2,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
 		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
 		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
 		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[5] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0044,
+	.class_hid = BNXT_ULP_CLASS_HID_2095,
 	.class_tid = 1,
-	.hdr_sig_id = 1,
-	.flow_sig_id = 1,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 2,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[6] = {
-	.class_hid = BNXT_ULP_CLASS_HID_001b,
+	.class_hid = BNXT_ULP_CLASS_HID_5701,
 	.class_tid = 1,
-	.hdr_sig_id = 1,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 2,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[7] = {
-	.class_hid = BNXT_ULP_CLASS_HID_012a,
+	.class_hid = BNXT_ULP_CLASS_HID_4d79,
 	.class_tid = 1,
-	.hdr_sig_id = 1,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 2,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[8] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00f9,
+	.class_hid = BNXT_ULP_CLASS_HID_170d,
 	.class_tid = 1,
-	.hdr_sig_id = 1,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 2,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[9] = {
-	.class_hid = BNXT_ULP_CLASS_HID_018d,
+	.class_hid = BNXT_ULP_CLASS_HID_1a69,
 	.class_tid = 1,
-	.hdr_sig_id = 2,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 2,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[10] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00a7,
+	.class_hid = BNXT_ULP_CLASS_HID_50c5,
 	.class_tid = 1,
-	.hdr_sig_id = 2,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 3,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[11] = {
-	.class_hid = BNXT_ULP_CLASS_HID_006f,
+	.class_hid = BNXT_ULP_CLASS_HID_473d,
 	.class_tid = 1,
-	.hdr_sig_id = 2,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 3,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[12] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0181,
+	.class_hid = BNXT_ULP_CLASS_HID_10c1,
 	.class_tid = 1,
-	.hdr_sig_id = 2,
-	.flow_sig_id = 3,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 4,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[13] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0195,
+	.class_hid = BNXT_ULP_CLASS_HID_142d,
 	.class_tid = 1,
-	.hdr_sig_id = 3,
-	.flow_sig_id = 3,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 4,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[14] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00bf,
+	.class_hid = BNXT_ULP_CLASS_HID_4a99,
 	.class_tid = 1,
-	.hdr_sig_id = 3,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 4,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[15] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0077,
+	.class_hid = BNXT_ULP_CLASS_HID_40f1,
 	.class_tid = 1,
-	.hdr_sig_id = 3,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 4,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[16] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0199,
+	.class_hid = BNXT_ULP_CLASS_HID_0a85,
 	.class_tid = 1,
-	.hdr_sig_id = 3,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 4,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[17] = {
-	.class_hid = BNXT_ULP_CLASS_HID_009a,
+	.class_hid = BNXT_ULP_CLASS_HID_0179,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
+	.hdr_sig_id = 0,
 	.flow_sig_id = 4,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[18] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0192,
+	.class_hid = BNXT_ULP_CLASS_HID_37d5,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 4,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 5,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[19] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01e2,
+	.class_hid = BNXT_ULP_CLASS_HID_2e4d,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 4,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 5,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[20] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00fa,
+	.class_hid = BNXT_ULP_CLASS_HID_54ad,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 4,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 6,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[21] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0165,
+	.class_hid = BNXT_ULP_CLASS_HID_5809,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 4,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 6,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[22] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0042,
+	.class_hid = BNXT_ULP_CLASS_HID_31a9,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 6,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[23] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00cd,
+	.class_hid = BNXT_ULP_CLASS_HID_2801,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 6,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[24] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01aa,
+	.class_hid = BNXT_ULP_CLASS_HID_4e61,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 6,
+	.flow_pattern_id = 1,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[25] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0178,
+	.class_hid = BNXT_ULP_CLASS_HID_2561,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 6,
+	.flow_pattern_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[26] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0070,
+	.class_hid = BNXT_ULP_CLASS_HID_2bad,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 0,
+	.flow_sig_id = 7,
+	.flow_pattern_id = 2,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[27] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00f3,
+	.class_hid = BNXT_ULP_CLASS_HID_26f1,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 7,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[28] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01d8,
+	.class_hid = BNXT_ULP_CLASS_HID_13cf1,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 7,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[29] = {
-	.class_hid = BNXT_ULP_CLASS_HID_005b,
+	.class_hid = BNXT_ULP_CLASS_HID_252f1,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 8,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[30] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0153,
+	.class_hid = BNXT_ULP_CLASS_HID_30c25,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 9,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[31] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01a3,
+	.class_hid = BNXT_ULP_CLASS_HID_0051,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 10,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[32] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00bb,
+	.class_hid = BNXT_ULP_CLASS_HID_11651,
 	.class_tid = 1,
-	.hdr_sig_id = 4,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 10,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[33] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0082,
+	.class_hid = BNXT_ULP_CLASS_HID_22c51,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 10,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[34] = {
-	.class_hid = BNXT_ULP_CLASS_HID_018a,
+	.class_hid = BNXT_ULP_CLASS_HID_34251,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 10,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[35] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01fa,
+	.class_hid = BNXT_ULP_CLASS_HID_5385,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 10,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[36] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00e2,
+	.class_hid = BNXT_ULP_CLASS_HID_10cc9,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 10,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[37] = {
-	.class_hid = BNXT_ULP_CLASS_HID_017d,
+	.class_hid = BNXT_ULP_CLASS_HID_222c9,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 5,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 11,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[38] = {
-	.class_hid = BNXT_ULP_CLASS_HID_005a,
+	.class_hid = BNXT_ULP_CLASS_HID_338c9,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 12,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[39] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00d5,
+	.class_hid = BNXT_ULP_CLASS_HID_1d69,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[40] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01b2,
+	.class_hid = BNXT_ULP_CLASS_HID_13369,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[41] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0160,
+	.class_hid = BNXT_ULP_CLASS_HID_24969,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[42] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0068,
+	.class_hid = BNXT_ULP_CLASS_HID_3025d,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[43] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00eb,
+	.class_hid = BNXT_ULP_CLASS_HID_20b5,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[44] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01c0,
+	.class_hid = BNXT_ULP_CLASS_HID_136b5,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[45] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0043,
+	.class_hid = BNXT_ULP_CLASS_HID_24cb5,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[46] = {
-	.class_hid = BNXT_ULP_CLASS_HID_014b,
+	.class_hid = BNXT_ULP_CLASS_HID_305f9,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[47] = {
-	.class_hid = BNXT_ULP_CLASS_HID_01bb,
+	.class_hid = BNXT_ULP_CLASS_HID_5721,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[48] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00a3,
+	.class_hid = BNXT_ULP_CLASS_HID_11015,
 	.class_tid = 1,
-	.hdr_sig_id = 5,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
-		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
-		BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
-		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[49] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00cb,
+	.class_hid = BNXT_ULP_CLASS_HID_22615,
 	.class_tid = 1,
-	.hdr_sig_id = 6,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
-		BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
 		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 	},
 	[50] = {
-	.class_hid = BNXT_ULP_CLASS_HID_00b4,
+	.class_hid = BNXT_ULP_CLASS_HID_33c15,
 	.class_tid = 1,
-	.hdr_sig_id = 6,
-	.flow_sig_id = 6,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
-		BNXT_ULP_HDR_BIT_OO_VLAN |
-		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
 		BNXT_ULP_HDR_BIT_O_TCP |
 		BNXT_ULP_FLOW_DIR_BITMASK_ING },
 	.field_sig = { .bits =
-		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
-		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
-		BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
-		BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
-		BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
-		BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[51] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4d59,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[52] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1068d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[53] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21c8d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[54] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3328d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[55] = {
+	.class_hid = BNXT_ULP_CLASS_HID_172d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[56] = {
+	.class_hid = BNXT_ULP_CLASS_HID_12d2d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[57] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2432d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[58] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3592d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[59] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a49,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[60] = {
+	.class_hid = BNXT_ULP_CLASS_HID_13049,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 13,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[61] = {
+	.class_hid = BNXT_ULP_CLASS_HID_24649,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 14,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[62] = {
+	.class_hid = BNXT_ULP_CLASS_HID_35c49,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 15,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[63] = {
+	.class_hid = BNXT_ULP_CLASS_HID_50e5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 16,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[64] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10a29,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 16,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[65] = {
+	.class_hid = BNXT_ULP_CLASS_HID_22029,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 16,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[66] = {
+	.class_hid = BNXT_ULP_CLASS_HID_33629,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 16,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[67] = {
+	.class_hid = BNXT_ULP_CLASS_HID_471d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 16,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[68] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10041,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 16,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[69] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21641,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 17,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[70] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32c41,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 18,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[71] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10e1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[72] = {
+	.class_hid = BNXT_ULP_CLASS_HID_126e1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[73] = {
+	.class_hid = BNXT_ULP_CLASS_HID_23ce1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[74] = {
+	.class_hid = BNXT_ULP_CLASS_HID_352e1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[75] = {
+	.class_hid = BNXT_ULP_CLASS_HID_140d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[76] = {
+	.class_hid = BNXT_ULP_CLASS_HID_12a0d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[77] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2400d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[78] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3560d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[79] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4ab9,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[80] = {
+	.class_hid = BNXT_ULP_CLASS_HID_103ed,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[81] = {
+	.class_hid = BNXT_ULP_CLASS_HID_219ed,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[82] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32fed,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[83] = {
+	.class_hid = BNXT_ULP_CLASS_HID_40d1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[84] = {
+	.class_hid = BNXT_ULP_CLASS_HID_156d1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[85] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21005,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[86] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32605,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[87] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0aa5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[88] = {
+	.class_hid = BNXT_ULP_CLASS_HID_120a5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[89] = {
+	.class_hid = BNXT_ULP_CLASS_HID_236a5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[90] = {
+	.class_hid = BNXT_ULP_CLASS_HID_34ca5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[91] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0159,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[92] = {
+	.class_hid = BNXT_ULP_CLASS_HID_11759,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 19,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[93] = {
+	.class_hid = BNXT_ULP_CLASS_HID_22d59,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 20,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[94] = {
+	.class_hid = BNXT_ULP_CLASS_HID_34359,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 21,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[95] = {
+	.class_hid = BNXT_ULP_CLASS_HID_37f5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 22,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[96] = {
+	.class_hid = BNXT_ULP_CLASS_HID_14df5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 22,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[97] = {
+	.class_hid = BNXT_ULP_CLASS_HID_20739,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 22,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[98] = {
+	.class_hid = BNXT_ULP_CLASS_HID_31d39,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 22,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[99] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2e6d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 22,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[100] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1446d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 22,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[101] = {
+	.class_hid = BNXT_ULP_CLASS_HID_25a6d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 23,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[102] = {
+	.class_hid = BNXT_ULP_CLASS_HID_31351,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 24,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[103] = {
+	.class_hid = BNXT_ULP_CLASS_HID_548d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[104] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10df1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[105] = {
+	.class_hid = BNXT_ULP_CLASS_HID_223f1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[106] = {
+	.class_hid = BNXT_ULP_CLASS_HID_339f1,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[107] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5829,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[108] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1111d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[109] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2271d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[110] = {
+	.class_hid = BNXT_ULP_CLASS_HID_33d1d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[111] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3189,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[112] = {
+	.class_hid = BNXT_ULP_CLASS_HID_14789,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[113] = {
+	.class_hid = BNXT_ULP_CLASS_HID_200fd,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[114] = {
+	.class_hid = BNXT_ULP_CLASS_HID_316fd,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[115] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2821,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[116] = {
+	.class_hid = BNXT_ULP_CLASS_HID_13e21,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[117] = {
+	.class_hid = BNXT_ULP_CLASS_HID_25421,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[118] = {
+	.class_hid = BNXT_ULP_CLASS_HID_30d15,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[119] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4e41,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[120] = {
+	.class_hid = BNXT_ULP_CLASS_HID_107b5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[121] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21db5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[122] = {
+	.class_hid = BNXT_ULP_CLASS_HID_333b5,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[123] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2541,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[124] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2b8d,
+	.class_tid = 1,
+	.hdr_sig_id = 1,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[125] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2691,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[126] = {
+	.class_hid = BNXT_ULP_CLASS_HID_13c91,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 25,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[127] = {
+	.class_hid = BNXT_ULP_CLASS_HID_25291,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 26,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[128] = {
+	.class_hid = BNXT_ULP_CLASS_HID_30c45,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 27,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[129] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0031,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 28,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[130] = {
+	.class_hid = BNXT_ULP_CLASS_HID_11631,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 28,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[131] = {
+	.class_hid = BNXT_ULP_CLASS_HID_22c31,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 28,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[132] = {
+	.class_hid = BNXT_ULP_CLASS_HID_34231,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 28,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[133] = {
+	.class_hid = BNXT_ULP_CLASS_HID_53e5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 28,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[134] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10ca9,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 28,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[135] = {
+	.class_hid = BNXT_ULP_CLASS_HID_222a9,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 29,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[136] = {
+	.class_hid = BNXT_ULP_CLASS_HID_338a9,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 30,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[137] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d09,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[138] = {
+	.class_hid = BNXT_ULP_CLASS_HID_13309,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[139] = {
+	.class_hid = BNXT_ULP_CLASS_HID_24909,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[140] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3023d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[141] = {
+	.class_hid = BNXT_ULP_CLASS_HID_20d5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[142] = {
+	.class_hid = BNXT_ULP_CLASS_HID_136d5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[143] = {
+	.class_hid = BNXT_ULP_CLASS_HID_24cd5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[144] = {
+	.class_hid = BNXT_ULP_CLASS_HID_30599,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[145] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5741,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[146] = {
+	.class_hid = BNXT_ULP_CLASS_HID_11075,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[147] = {
+	.class_hid = BNXT_ULP_CLASS_HID_22675,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[148] = {
+	.class_hid = BNXT_ULP_CLASS_HID_33c75,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[149] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4d39,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[150] = {
+	.class_hid = BNXT_ULP_CLASS_HID_106ed,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[151] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21ced,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[152] = {
+	.class_hid = BNXT_ULP_CLASS_HID_332ed,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[153] = {
+	.class_hid = BNXT_ULP_CLASS_HID_174d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[154] = {
+	.class_hid = BNXT_ULP_CLASS_HID_12d4d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[155] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2434d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[156] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3594d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[157] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a29,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[158] = {
+	.class_hid = BNXT_ULP_CLASS_HID_13029,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 31,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[159] = {
+	.class_hid = BNXT_ULP_CLASS_HID_24629,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 32,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[160] = {
+	.class_hid = BNXT_ULP_CLASS_HID_35c29,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 33,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[161] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5085,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 34,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[162] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10a49,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 34,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[163] = {
+	.class_hid = BNXT_ULP_CLASS_HID_22049,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 34,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[164] = {
+	.class_hid = BNXT_ULP_CLASS_HID_33649,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 34,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[165] = {
+	.class_hid = BNXT_ULP_CLASS_HID_477d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 34,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[166] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10021,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 34,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[167] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21621,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 35,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[168] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32c21,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 36,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[169] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1081,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[170] = {
+	.class_hid = BNXT_ULP_CLASS_HID_12681,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[171] = {
+	.class_hid = BNXT_ULP_CLASS_HID_23c81,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[172] = {
+	.class_hid = BNXT_ULP_CLASS_HID_35281,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[173] = {
+	.class_hid = BNXT_ULP_CLASS_HID_146d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[174] = {
+	.class_hid = BNXT_ULP_CLASS_HID_12a6d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[175] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2406d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[176] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3566d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[177] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4ad9,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[178] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1038d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[179] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2198d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[180] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32f8d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[181] = {
+	.class_hid = BNXT_ULP_CLASS_HID_40b1,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[182] = {
+	.class_hid = BNXT_ULP_CLASS_HID_156b1,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[183] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21065,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[184] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32665,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[185] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0ac5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[186] = {
+	.class_hid = BNXT_ULP_CLASS_HID_120c5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[187] = {
+	.class_hid = BNXT_ULP_CLASS_HID_236c5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[188] = {
+	.class_hid = BNXT_ULP_CLASS_HID_34cc5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[189] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0139,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[190] = {
+	.class_hid = BNXT_ULP_CLASS_HID_11739,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 37,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[191] = {
+	.class_hid = BNXT_ULP_CLASS_HID_22d39,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 38,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[192] = {
+	.class_hid = BNXT_ULP_CLASS_HID_34339,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 39,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[193] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3795,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 40,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[194] = {
+	.class_hid = BNXT_ULP_CLASS_HID_14d95,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 40,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[195] = {
+	.class_hid = BNXT_ULP_CLASS_HID_20759,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 40,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[196] = {
+	.class_hid = BNXT_ULP_CLASS_HID_31d59,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 40,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[197] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2e0d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 40,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[198] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1440d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 40,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[199] = {
+	.class_hid = BNXT_ULP_CLASS_HID_25a0d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 41,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[200] = {
+	.class_hid = BNXT_ULP_CLASS_HID_31331,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 42,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[201] = {
+	.class_hid = BNXT_ULP_CLASS_HID_54ed,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[202] = {
+	.class_hid = BNXT_ULP_CLASS_HID_10d91,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[203] = {
+	.class_hid = BNXT_ULP_CLASS_HID_22391,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[204] = {
+	.class_hid = BNXT_ULP_CLASS_HID_33991,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[205] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5849,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[206] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1117d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[207] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2277d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[208] = {
+	.class_hid = BNXT_ULP_CLASS_HID_33d7d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[209] = {
+	.class_hid = BNXT_ULP_CLASS_HID_31e9,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[210] = {
+	.class_hid = BNXT_ULP_CLASS_HID_147e9,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[211] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2009d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[212] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3169d,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[213] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2841,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[214] = {
+	.class_hid = BNXT_ULP_CLASS_HID_13e41,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[215] = {
+	.class_hid = BNXT_ULP_CLASS_HID_25441,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[216] = {
+	.class_hid = BNXT_ULP_CLASS_HID_30d75,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[217] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4e21,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[218] = {
+	.class_hid = BNXT_ULP_CLASS_HID_107d5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[219] = {
+	.class_hid = BNXT_ULP_CLASS_HID_21dd5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[220] = {
+	.class_hid = BNXT_ULP_CLASS_HID_333d5,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_2_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[221] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2521,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[222] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2bed,
+	.class_tid = 1,
+	.hdr_sig_id = 2,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[223] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1865,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 43,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[224] = {
+	.class_hid = BNXT_ULP_CLASS_HID_389d,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 44,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[225] = {
+	.class_hid = BNXT_ULP_CLASS_HID_123d,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 44,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[226] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4ef1,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 45,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[227] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1229,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 45,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[228] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3241,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 45,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[229] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0be1,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 45,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[230] = {
+	.class_hid = BNXT_ULP_CLASS_HID_48b5,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 45,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[231] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0bed,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 45,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[232] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2c05,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 46,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[233] = {
+	.class_hid = BNXT_ULP_CLASS_HID_05a5,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 46,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[234] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4279,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 47,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[235] = {
+	.class_hid = BNXT_ULP_CLASS_HID_05d1,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 47,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[236] = {
+	.class_hid = BNXT_ULP_CLASS_HID_25c9,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 47,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[237] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5c55,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 47,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[238] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3c3d,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 47,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[239] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4fc9,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 47,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[240] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1335,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 48,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[241] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4981,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 48,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[242] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2969,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[243] = {
+	.class_hid = BNXT_ULP_CLASS_HID_498d,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[244] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0cf9,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[245] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4345,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[246] = {
+	.class_hid = BNXT_ULP_CLASS_HID_232d,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[247] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2579,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[248] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2bb5,
+	.class_tid = 1,
+	.hdr_sig_id = 3,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[249] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1845,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[250] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1399,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 49,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[251] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0eed,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 50,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[252] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0a21,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 51,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[253] = {
+	.class_hid = BNXT_ULP_CLASS_HID_38bd,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 52,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[254] = {
+	.class_hid = BNXT_ULP_CLASS_HID_33f1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 52,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[255] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2ec5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 52,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[256] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2a19,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 52,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[257] = {
+	.class_hid = BNXT_ULP_CLASS_HID_121d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 52,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[258] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0d51,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 52,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[259] = {
+	.class_hid = BNXT_ULP_CLASS_HID_08a5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 53,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[260] = {
+	.class_hid = BNXT_ULP_CLASS_HID_03f9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 54,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[261] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4ed1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[262] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4a25,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[263] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4579,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[264] = {
+	.class_hid = BNXT_ULP_CLASS_HID_404d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[265] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1209,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[266] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0d5d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[267] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0891,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[268] = {
+	.class_hid = BNXT_ULP_CLASS_HID_03e5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[269] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3261,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[270] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2db5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[271] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2889,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[272] = {
+	.class_hid = BNXT_ULP_CLASS_HID_23dd,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[273] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0bc1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[274] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0715,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[275] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0269,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[276] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5a69,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[277] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4895,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[278] = {
+	.class_hid = BNXT_ULP_CLASS_HID_43e9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[279] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3f3d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[280] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3a71,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[281] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0bcd,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[282] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0701,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 55,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[283] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0255,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 56,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[284] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5a55,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 57,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[285] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2c25,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 58,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[286] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2779,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 58,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[287] = {
+	.class_hid = BNXT_ULP_CLASS_HID_224d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 58,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[288] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d81,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 58,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[289] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0585,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 58,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[290] = {
+	.class_hid = BNXT_ULP_CLASS_HID_00d9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 58,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[291] = {
+	.class_hid = BNXT_ULP_CLASS_HID_58d9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 59,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[292] = {
+	.class_hid = BNXT_ULP_CLASS_HID_542d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 60,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[293] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4259,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[294] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3dad,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[295] = {
+	.class_hid = BNXT_ULP_CLASS_HID_38e1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[296] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3435,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[297] = {
+	.class_hid = BNXT_ULP_CLASS_HID_05f1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[298] = {
+	.class_hid = BNXT_ULP_CLASS_HID_00c5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[299] = {
+	.class_hid = BNXT_ULP_CLASS_HID_58c5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[300] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5419,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[301] = {
+	.class_hid = BNXT_ULP_CLASS_HID_25e9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[302] = {
+	.class_hid = BNXT_ULP_CLASS_HID_213d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[303] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c71,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[304] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1745,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[305] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5c75,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[306] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5749,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[307] = {
+	.class_hid = BNXT_ULP_CLASS_HID_529d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[308] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4dd1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[309] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3c1d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[310] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3751,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[311] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32a5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[312] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2df9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[313] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4fe9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[314] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4b3d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 61,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[315] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4671,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 62,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[316] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4145,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 63,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[317] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1315,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 64,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[318] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0e69,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 64,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[319] = {
+	.class_hid = BNXT_ULP_CLASS_HID_09bd,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 64,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[320] = {
+	.class_hid = BNXT_ULP_CLASS_HID_04f1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 64,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[321] = {
+	.class_hid = BNXT_ULP_CLASS_HID_49a1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 64,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[322] = {
+	.class_hid = BNXT_ULP_CLASS_HID_44f5,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 64,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[323] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3fc9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 65,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[324] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3b1d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 66,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[325] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2949,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[326] = {
+	.class_hid = BNXT_ULP_CLASS_HID_249d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[327] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1fd1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[328] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b25,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[329] = {
+	.class_hid = BNXT_ULP_CLASS_HID_49ad,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[330] = {
+	.class_hid = BNXT_ULP_CLASS_HID_44e1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[331] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4035,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[332] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3b09,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[333] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0cd9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[334] = {
+	.class_hid = BNXT_ULP_CLASS_HID_082d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[335] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0361,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[336] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5b61,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[337] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4365,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[338] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3eb9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[339] = {
+	.class_hid = BNXT_ULP_CLASS_HID_398d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[340] = {
+	.class_hid = BNXT_ULP_CLASS_HID_34c1,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[341] = {
+	.class_hid = BNXT_ULP_CLASS_HID_230d,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[342] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1e41,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[343] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1995,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[344] = {
+	.class_hid = BNXT_ULP_CLASS_HID_14e9,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[345] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2559,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[346] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2b95,
+	.class_tid = 1,
+	.hdr_sig_id = 4,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[347] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1825,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[348] = {
+	.class_hid = BNXT_ULP_CLASS_HID_13f9,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 67,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[349] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0e8d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 68,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[350] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0a41,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 69,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[351] = {
+	.class_hid = BNXT_ULP_CLASS_HID_38dd,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 70,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[352] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3391,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 70,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[353] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2ea5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 70,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[354] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2a79,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 70,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[355] = {
+	.class_hid = BNXT_ULP_CLASS_HID_127d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 70,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[356] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0d31,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 70,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[357] = {
+	.class_hid = BNXT_ULP_CLASS_HID_08c5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 71,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[358] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0399,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 72,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[359] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4eb1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[360] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4a45,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[361] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4519,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[362] = {
+	.class_hid = BNXT_ULP_CLASS_HID_402d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[363] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1269,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[364] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0d3d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[365] = {
+	.class_hid = BNXT_ULP_CLASS_HID_08f1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[366] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0385,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[367] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3201,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[368] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2dd5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[369] = {
+	.class_hid = BNXT_ULP_CLASS_HID_28e9,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[370] = {
+	.class_hid = BNXT_ULP_CLASS_HID_23bd,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[371] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0ba1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[372] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0775,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[373] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0209,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[374] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5a09,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[375] = {
+	.class_hid = BNXT_ULP_CLASS_HID_48f5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[376] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4389,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[377] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3f5d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[378] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3a11,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[379] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0bad,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[380] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0761,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 73,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[381] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0235,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 74,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[382] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5a35,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 75,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[383] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2c45,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 76,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[384] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2719,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 76,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[385] = {
+	.class_hid = BNXT_ULP_CLASS_HID_222d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 76,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[386] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1de1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 76,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[387] = {
+	.class_hid = BNXT_ULP_CLASS_HID_05e5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 76,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[388] = {
+	.class_hid = BNXT_ULP_CLASS_HID_00b9,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 76,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[389] = {
+	.class_hid = BNXT_ULP_CLASS_HID_58b9,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 77,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[390] = {
+	.class_hid = BNXT_ULP_CLASS_HID_544d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 78,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[391] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4239,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[392] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3dcd,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[393] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3881,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[394] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3455,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[395] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0591,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[396] = {
+	.class_hid = BNXT_ULP_CLASS_HID_00a5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[397] = {
+	.class_hid = BNXT_ULP_CLASS_HID_58a5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[398] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5479,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[399] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2589,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[400] = {
+	.class_hid = BNXT_ULP_CLASS_HID_215d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[401] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c11,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[402] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1725,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[403] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5c15,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[404] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5729,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[405] = {
+	.class_hid = BNXT_ULP_CLASS_HID_52fd,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[406] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4db1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[407] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3c7d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[408] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3731,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[409] = {
+	.class_hid = BNXT_ULP_CLASS_HID_32c5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[410] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2d99,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[411] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4f89,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[412] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4b5d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 79,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[413] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4611,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 80,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[414] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4125,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 81,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[415] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1375,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 82,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[416] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0e09,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 82,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[417] = {
+	.class_hid = BNXT_ULP_CLASS_HID_09dd,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 82,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[418] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0491,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 82,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[419] = {
+	.class_hid = BNXT_ULP_CLASS_HID_49c1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 82,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[420] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4495,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 82,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[421] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3fa9,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 83,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[422] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3b7d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 84,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[423] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2929,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[424] = {
+	.class_hid = BNXT_ULP_CLASS_HID_24fd,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[425] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1fb1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[426] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b45,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[427] = {
+	.class_hid = BNXT_ULP_CLASS_HID_49cd,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[428] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4481,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[429] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4055,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[430] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3b69,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[431] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0cb9,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[432] = {
+	.class_hid = BNXT_ULP_CLASS_HID_084d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[433] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0301,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[434] = {
+	.class_hid = BNXT_ULP_CLASS_HID_5b01,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[435] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4305,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[436] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3ed9,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[437] = {
+	.class_hid = BNXT_ULP_CLASS_HID_39ed,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[438] = {
+	.class_hid = BNXT_ULP_CLASS_HID_34a1,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[439] = {
+	.class_hid = BNXT_ULP_CLASS_HID_236d,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[440] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1e21,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[441] = {
+	.class_hid = BNXT_ULP_CLASS_HID_19f5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[442] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1489,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
+		BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[443] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2539,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[444] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2bf5,
+	.class_tid = 1,
+	.hdr_sig_id = 5,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_O_IPV6 |
+		BNXT_ULP_HDR_BIT_O_UDP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[445] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b6af,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[446] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b1d3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[447] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c7d3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[448] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1ccaf,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[449] = {
+	.class_hid = BNXT_ULP_CLASS_HID_da33,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[450] = {
+	.class_hid = BNXT_ULP_CLASS_HID_d567,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[451] = {
+	.class_hid = BNXT_ULP_CLASS_HID_18eab,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[452] = {
+	.class_hid = BNXT_ULP_CLASS_HID_19367,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[453] = {
+	.class_hid = BNXT_ULP_CLASS_HID_a10b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 85,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[454] = {
+	.class_hid = BNXT_ULP_CLASS_HID_9c3f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 86,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[455] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b23f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 86,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[456] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b70b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[457] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c49f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[458] = {
+	.class_hid = BNXT_ULP_CLASS_HID_bfc3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[459] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d5c3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[460] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1da9f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[461] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b063,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[462] = {
+	.class_hid = BNXT_ULP_CLASS_HID_ab97,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[463] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c197,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[464] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c663,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[465] = {
+	.class_hid = BNXT_ULP_CLASS_HID_d3f7,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[466] = {
+	.class_hid = BNXT_ULP_CLASS_HID_cf3b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[467] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1886f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[468] = {
+	.class_hid = BNXT_ULP_CLASS_HID_18d3b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[469] = {
+	.class_hid = BNXT_ULP_CLASS_HID_9acf,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[470] = {
+	.class_hid = BNXT_ULP_CLASS_HID_95f3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[471] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1abf3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[472] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b0cf,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[473] = {
+	.class_hid = BNXT_ULP_CLASS_HID_be53,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[474] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b987,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[475] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1cf87,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[476] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d453,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[477] = {
+	.class_hid = BNXT_ULP_CLASS_HID_aa27,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[478] = {
+	.class_hid = BNXT_ULP_CLASS_HID_a56b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[479] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1bb6b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[480] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c027,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[481] = {
+	.class_hid = BNXT_ULP_CLASS_HID_cdcb,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[482] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c8ff,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[483] = {
+	.class_hid = BNXT_ULP_CLASS_HID_18223,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[484] = {
+	.class_hid = BNXT_ULP_CLASS_HID_186ff,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[485] = {
+	.class_hid = BNXT_ULP_CLASS_HID_9483,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 87,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[486] = {
+	.class_hid = BNXT_ULP_CLASS_HID_8fb7,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 88,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[487] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a5b7,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 88,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[488] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1aa83,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[489] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b817,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[490] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b35b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[491] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c95b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[492] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1ce17,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[493] = {
+	.class_hid = BNXT_ULP_CLASS_HID_a3fb,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[494] = {
+	.class_hid = BNXT_ULP_CLASS_HID_9f2f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[495] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b52f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[496] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b9fb,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[497] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c78f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[498] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c2b3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[499] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d8b3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[500] = {
+	.class_hid = BNXT_ULP_CLASS_HID_180b3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[501] = {
+	.class_hid = BNXT_ULP_CLASS_HID_8e47,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[502] = {
+	.class_hid = BNXT_ULP_CLASS_HID_898b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[503] = {
+	.class_hid = BNXT_ULP_CLASS_HID_19f8b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[504] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a447,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[505] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b1eb,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[506] = {
+	.class_hid = BNXT_ULP_CLASS_HID_ad1f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[507] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c31f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[508] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c7eb,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[509] = {
+	.class_hid = BNXT_ULP_CLASS_HID_9137,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[510] = {
+	.class_hid = BNXT_ULP_CLASS_HID_8c7b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[511] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a27b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[512] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a737,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[513] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b4db,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[514] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b00f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[515] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c60f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[516] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1cadb,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[517] = {
+	.class_hid = BNXT_ULP_CLASS_HID_8b0b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[518] = {
+	.class_hid = BNXT_ULP_CLASS_HID_863f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[519] = {
+	.class_hid = BNXT_ULP_CLASS_HID_19c3f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[520] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a10b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[521] = {
+	.class_hid = BNXT_ULP_CLASS_HID_ae9f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[522] = {
+	.class_hid = BNXT_ULP_CLASS_HID_a9c3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[523] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1bfc3,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[524] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c49f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 1,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[525] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2563,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[526] = {
+	.class_hid = BNXT_ULP_CLASS_HID_2baf,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[527] = {
+	.class_hid = BNXT_ULP_CLASS_HID_4f33,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[528] = {
+	.class_hid = BNXT_ULP_CLASS_HID_160b,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 89,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[529] = {
+	.class_hid = BNXT_ULP_CLASS_HID_399f,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[530] = {
+	.class_hid = BNXT_ULP_CLASS_HID_48f7,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[531] = {
+	.class_hid = BNXT_ULP_CLASS_HID_0fcf,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[532] = {
+	.class_hid = BNXT_ULP_CLASS_HID_3353,
+	.class_tid = 1,
+	.hdr_sig_id = 6,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 2,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[533] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b68f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[534] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b94f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[535] = {
+	.class_hid = BNXT_ULP_CLASS_HID_fc0f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[536] = {
+	.class_hid = BNXT_ULP_CLASS_HID_fecf,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[537] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b1f3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[538] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b4b3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[539] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f773,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[540] = {
+	.class_hid = BNXT_ULP_CLASS_HID_fa33,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[541] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c7f3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[542] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1eab3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[543] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1cd73,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[544] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f033,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[545] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1cc8f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[546] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1ef4f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[547] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d20f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[548] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f4cf,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[549] = {
+	.class_hid = BNXT_ULP_CLASS_HID_da13,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[550] = {
+	.class_hid = BNXT_ULP_CLASS_HID_a007,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[551] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c2c7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[552] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e587,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[553] = {
+	.class_hid = BNXT_ULP_CLASS_HID_d547,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[554] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f807,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[555] = {
+	.class_hid = BNXT_ULP_CLASS_HID_dac7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[556] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e0cb,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[557] = {
+	.class_hid = BNXT_ULP_CLASS_HID_18e8b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[558] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b14b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[559] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d40b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[560] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f6cb,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[561] = {
+	.class_hid = BNXT_ULP_CLASS_HID_19347,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[562] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b607,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[563] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d8c7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[564] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1fb87,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[565] = {
+	.class_hid = BNXT_ULP_CLASS_HID_a12b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[566] = {
+	.class_hid = BNXT_ULP_CLASS_HID_a3eb,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 90,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[567] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e6ab,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 91,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[568] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e96b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 92,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[569] = {
+	.class_hid = BNXT_ULP_CLASS_HID_9c1f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 93,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[570] = {
+	.class_hid = BNXT_ULP_CLASS_HID_bedf,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 93,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[571] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e19f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 93,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[572] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e45f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 93,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[573] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b21f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 93,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[574] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b4df,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 93,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[575] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f79f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 94,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[576] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1fa5f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 95,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[577] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b72b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[578] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b9eb,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[579] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1fcab,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[580] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1ff6b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[581] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c4bf,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[582] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e77f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[583] = {
+	.class_hid = BNXT_ULP_CLASS_HID_ca3f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[584] = {
+	.class_hid = BNXT_ULP_CLASS_HID_ecff,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[585] = {
+	.class_hid = BNXT_ULP_CLASS_HID_bfe3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[586] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e2a3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[587] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c563,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[588] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e823,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[589] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d5e3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[590] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f8a3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[591] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1db63,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[592] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1e117,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[593] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1dabf,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[594] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1a0a3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[595] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c363,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[596] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1e623,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[597] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b043,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[598] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b303,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[599] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f5c3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[600] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f883,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[601] = {
+	.class_hid = BNXT_ULP_CLASS_HID_abb7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[602] = {
+	.class_hid = BNXT_ULP_CLASS_HID_ae77,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[603] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f137,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[604] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f3f7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[605] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c1b7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[606] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1e477,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[607] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c737,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[608] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1e9f7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[609] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1c643,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[610] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1e903,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[611] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1cbc3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[612] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1ee83,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[613] = {
+	.class_hid = BNXT_ULP_CLASS_HID_d3d7,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[614] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f697,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[615] = {
+	.class_hid = BNXT_ULP_CLASS_HID_d957,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[616] = {
+	.class_hid = BNXT_ULP_CLASS_HID_fc17,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[617] = {
+	.class_hid = BNXT_ULP_CLASS_HID_cf1b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[618] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f1db,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[619] = {
+	.class_hid = BNXT_ULP_CLASS_HID_d49b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[620] = {
+	.class_hid = BNXT_ULP_CLASS_HID_f75b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[621] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1884f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[622] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1ab0f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[623] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1cdcf,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[624] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f08f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[625] = {
+	.class_hid = BNXT_ULP_CLASS_HID_18d1b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[626] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1afdb,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[627] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1d29b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[628] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f55b,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[629] = {
+	.class_hid = BNXT_ULP_CLASS_HID_9aef,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[630] = {
+	.class_hid = BNXT_ULP_CLASS_HID_bdaf,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[631] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e06f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[632] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e32f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[633] = {
+	.class_hid = BNXT_ULP_CLASS_HID_95d3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[634] = {
+	.class_hid = BNXT_ULP_CLASS_HID_b893,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[635] = {
+	.class_hid = BNXT_ULP_CLASS_HID_db53,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[636] = {
+	.class_hid = BNXT_ULP_CLASS_HID_fe13,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[637] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1abd3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[638] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1ae93,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[639] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f153,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[640] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f413,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[641] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b0ef,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[642] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1b3af,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[643] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f66f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[644] = {
+	.class_hid = BNXT_ULP_CLASS_HID_1f92f,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_SRC_PORT |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[645] = {
+	.class_hid = BNXT_ULP_CLASS_HID_be73,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[646] = {
+	.class_hid = BNXT_ULP_CLASS_HID_e133,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMASK_ING },
+	.field_sig = { .bits =
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+		BNXT_ULP_HF1_7_BITMASK_O_ETH_SMAC |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
+		BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+		BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+		BNXT_ULP_HF1_7_BITMASK_O_TCP_DST_PORT |
+		BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+	},
+	[647] = {
+	.class_hid = BNXT_ULP_CLASS_HID_c3f3,
+	.class_tid = 1,
+	.hdr_sig_id = 7,
+	.flow_sig_id = 96,
+	.flow_pattern_id = 0,
+	.hdr_sig = { .bits =
+		BNXT_ULP_HDR_BIT_O_ETH |
+		BNXT_ULP_HDR_BIT_OO_VLAN |
+		BNXT_ULP_HDR_BIT_O_IPV4 |
+		BNXT_ULP_HDR_BIT_O_TCP |
+		BNXT_ULP_FLOW_DIR_BITMAS