@@ -220,9 +220,36 @@ struct tf_dev_ops {
*/
int (*tf_dev_search_ident)(struct tf *tfp,
struct tf_ident_search_parms *parms);
+ /**
+ * Get SRAM table information.
+ *
+ * Converts an internal RM allocated element offset to
+ * a user address and vice versa.
+ *
+ * [in] tfp
+ * Pointer to TF handle
+ *
+ * [in] type
+ * Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD
+ *
+ * [in/out] base
+ * Pointer to the base address of the associated table type.
+ *
+ * [in/out] shift
+ * Pointer to any shift required for the associated table type.
+ *
+ * Returns
+ * - (0) if successful.
+ * - (-EINVAL) on failure.
+ */
+ int (*tf_dev_get_tbl_info)(struct tf *tfp,
+ void *tbl_db,
+ enum tf_tbl_type type,
+ uint16_t *base,
+ uint16_t *shift);
/**
- * Allocation of a table type element.
+ * Allocation of an index table type element.
*
* This API allocates the specified table type element from a
* device specific table type DB. The allocated element is
@@ -206,6 +206,7 @@ const struct tf_dev_ops tf_dev_ops_p4_init = {
.tf_dev_alloc_ident = NULL,
.tf_dev_free_ident = NULL,
.tf_dev_search_ident = NULL,
+ .tf_dev_get_tbl_info = NULL,
.tf_dev_alloc_ext_tbl = NULL,
.tf_dev_alloc_tbl = NULL,
.tf_dev_free_ext_tbl = NULL,
@@ -246,6 +247,7 @@ const struct tf_dev_ops tf_dev_ops_p4 = {
.tf_dev_alloc_ident = tf_ident_alloc,
.tf_dev_free_ident = tf_ident_free,
.tf_dev_search_ident = tf_ident_search,
+ .tf_dev_get_tbl_info = NULL,
.tf_dev_alloc_tbl = tf_tbl_alloc,
.tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
.tf_dev_free_tbl = tf_tbl_free,
@@ -148,6 +148,75 @@ static int tf_dev_p58_word_align(uint16_t size)
return ((((size) + 63) >> 6) * 8);
}
+
+#define TF_DEV_P58_BANK_SZ_64B 2048
+/**
+ * Get SRAM table information.
+ *
+ * Converts an internal RM allocated element offset to
+ * a user address and vice versa.
+ *
+ * [in] tfp
+ * Pointer to TF handle
+ *
+ * [in] type
+ * Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD
+ *
+ * [in/out] base
+ * Pointer to the Base address of the associated SRAM bank used for
+ * the type of record allocated.
+ *
+ * [in/out] shift
+ * Pointer to the factor to be used as a multiplier to translate
+ * between the RM units to the user address. SRAM manages 64B entries
+ * Addresses must be shifted to an 8B address.
+ *
+ * Returns
+ * - (0) if successful.
+ * - (-EINVAL) on failure.
+ */
+static int tf_dev_p58_get_sram_tbl_info(struct tf *tfp __rte_unused,
+ void *db,
+ enum tf_tbl_type type,
+ uint16_t *base,
+ uint16_t *shift)
+{
+ uint16_t hcapi_type;
+ struct tf_rm_get_hcapi_parms parms;
+ int rc;
+
+ parms.rm_db = db;
+ parms.subtype = type;
+ parms.hcapi_type = &hcapi_type;
+
+ rc = tf_rm_get_hcapi_type(&parms);
+ if (rc)
+ return rc;
+
+ switch (hcapi_type) {
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_0:
+ *base = 0;
+ *shift = 3;
+ break;
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_1:
+ *base = TF_DEV_P58_BANK_SZ_64B;
+ *shift = 3;
+ break;
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_2:
+ *base = TF_DEV_P58_BANK_SZ_64B * 2;
+ *shift = 3;
+ break;
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_3:
+ *base = TF_DEV_P58_BANK_SZ_64B * 3;
+ *shift = 3;
+ break;
+ default:
+ *base = 0;
+ *shift = 0;
+ break;
+ }
+ return 0;
+}
/**
* Truflow P58 device specific functions
*/
@@ -158,6 +227,7 @@ const struct tf_dev_ops tf_dev_ops_p58_init = {
.tf_dev_alloc_ident = NULL,
.tf_dev_free_ident = NULL,
.tf_dev_search_ident = NULL,
+ .tf_dev_get_tbl_info = NULL,
.tf_dev_alloc_ext_tbl = NULL,
.tf_dev_alloc_tbl = NULL,
.tf_dev_free_ext_tbl = NULL,
@@ -198,6 +268,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = {
.tf_dev_alloc_ident = tf_ident_alloc,
.tf_dev_free_ident = tf_ident_free,
.tf_dev_search_ident = tf_ident_search,
+ .tf_dev_get_tbl_info = tf_dev_p58_get_sram_tbl_info,
.tf_dev_alloc_tbl = tf_tbl_alloc,
.tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
.tf_dev_free_tbl = tf_tbl_free,
@@ -68,35 +68,35 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = {
[TF_TBL_TYPE_FULL_ACT_RECORD] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1,
- .slices = 4,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_COMPACT_ACT_RECORD] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_FULL_ACT_RECORD,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1,
- .slices = 8,
+ .slices = 1,
.divider = 8,
},
/* Policy - Encaps in bank 2 */
[TF_TBL_TYPE_ACT_ENCAP_8B] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,
- .slices = 8,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_ENCAP_16B] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,
- .slices = 4,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_ENCAP_32B] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,
- .slices = 2,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_ENCAP_64B] = {
@@ -111,21 +111,21 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,
- .slices = 8,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_MODIFY_16B] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,
- .slices = 4,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_MODIFY_32B] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,
- .slices = 2,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_MODIFY_64B] = {
@@ -139,28 +139,28 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = {
[TF_TBL_TYPE_ACT_SP_SMAC] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0,
- .slices = 8,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0,
- .slices = 4,
+ .slices = 1,
.divider = 8,
},
[TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,
.parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0,
- .slices = 2,
+ .slices = 1,
.divider = 8,
},
/* Policy - Stats in bank 3 */
[TF_TBL_TYPE_ACT_STATS_64] = {
.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,
.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_3,
- .slices = 8,
+ .slices = 1,
.divider = 8,
},
};
@@ -138,6 +138,7 @@ struct tf_rm_element_cfg {
* resource pool chunk size.
*/
uint8_t slices;
+
/**
* Pool element divider count
* If 0 or 1, there is 1:1 correspondence between the RM
@@ -146,7 +147,6 @@ struct tf_rm_element_cfg {
* correspondence to the HCAPI RM firmware resource.
*/
uint8_t divider;
-
};
/**
@@ -16,6 +16,14 @@
#include "tf_session.h"
#include "tf_device.h"
+#define TF_TBL_RM_TO_PTR(new_idx, idx, base, shift) { \
+ *(new_idx) = (((idx) + (base)) << (shift)); \
+}
+
+#define TF_TBL_PTR_TO_RM(new_idx, idx, base, shift) { \
+ *(new_idx) = (((idx) >> (shift)) - (base)); \
+}
+
struct tf;
/**
@@ -118,6 +126,9 @@ tf_tbl_alloc(struct tf *tfp __rte_unused,
int rc;
uint32_t idx;
struct tf_rm_allocate_parms aparms = { 0 };
+ struct tf_session *tfs;
+ struct tf_dev_info *dev;
+ uint16_t base = 0, shift = 0;
TF_CHECK_PARMS2(tfp, parms);
@@ -128,6 +139,29 @@ tf_tbl_alloc(struct tf *tfp __rte_unused,
return -EINVAL;
}
+ /* Retrieve the session information */
+ rc = tf_session_get_session_internal(tfp, &tfs);
+ if (rc)
+ return rc;
+
+ /* Retrieve the device information */
+ rc = tf_session_get_device(tfs, &dev);
+ if (rc)
+ return rc;
+
+ /* Only get table info if required for the device */
+ if (dev->ops->tf_dev_get_tbl_info) {
+ rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir],
+ parms->type, &base, &shift);
+ if (rc) {
+ TFP_DRV_LOG(ERR,
+ "%s: Failed to get table info:%d\n",
+ tf_dir_2_str(parms->dir),
+ parms->type);
+ return rc;
+ }
+ }
+
/* Allocate requested element */
aparms.rm_db = tbl_db[parms->dir];
aparms.subtype = parms->type;
@@ -141,6 +175,7 @@ tf_tbl_alloc(struct tf *tfp __rte_unused,
return rc;
}
+ TF_TBL_RM_TO_PTR(&idx, idx, base, shift);
*parms->idx = idx;
return 0;
@@ -154,6 +189,9 @@ tf_tbl_free(struct tf *tfp __rte_unused,
struct tf_rm_is_allocated_parms aparms = { 0 };
struct tf_rm_free_parms fparms = { 0 };
int allocated = 0;
+ struct tf_session *tfs;
+ struct tf_dev_info *dev;
+ uint16_t base = 0, shift = 0;
TF_CHECK_PARMS2(tfp, parms);
@@ -163,11 +201,35 @@ tf_tbl_free(struct tf *tfp __rte_unused,
tf_dir_2_str(parms->dir));
return -EINVAL;
}
+ /* Retrieve the session information */
+ rc = tf_session_get_session_internal(tfp, &tfs);
+ if (rc)
+ return rc;
+
+ /* Retrieve the device information */
+ rc = tf_session_get_device(tfs, &dev);
+ if (rc)
+ return rc;
+
+ /* Only get table info if required for the device */
+ if (dev->ops->tf_dev_get_tbl_info) {
+ rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir],
+ parms->type, &base, &shift);
+ if (rc) {
+ TFP_DRV_LOG(ERR,
+ "%s: Failed to get table info:%d\n",
+ tf_dir_2_str(parms->dir),
+ parms->type);
+ return rc;
+ }
+ }
/* Check if element is in use */
aparms.rm_db = tbl_db[parms->dir];
aparms.subtype = parms->type;
- aparms.index = parms->idx;
+
+ TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift);
+
aparms.allocated = &allocated;
rc = tf_rm_is_allocated(&aparms);
if (rc)
@@ -184,7 +246,9 @@ tf_tbl_free(struct tf *tfp __rte_unused,
/* Free requested element */
fparms.rm_db = tbl_db[parms->dir];
fparms.subtype = parms->type;
- fparms.index = parms->idx;
+
+ TF_TBL_PTR_TO_RM(&fparms.index, parms->idx, base, shift);
+
rc = tf_rm_free(&fparms);
if (rc) {
TFP_DRV_LOG(ERR,
@@ -223,6 +287,9 @@ tf_tbl_set(struct tf *tfp,
uint16_t hcapi_type;
struct tf_rm_is_allocated_parms aparms = { 0 };
struct tf_rm_get_hcapi_parms hparms = { 0 };
+ struct tf_session *tfs;
+ struct tf_dev_info *dev;
+ uint16_t base = 0, shift = 0;
TF_CHECK_PARMS3(tfp, parms, parms->data);
@@ -233,10 +300,34 @@ tf_tbl_set(struct tf *tfp,
return -EINVAL;
}
+ /* Retrieve the session information */
+ rc = tf_session_get_session_internal(tfp, &tfs);
+ if (rc)
+ return rc;
+
+ /* Retrieve the device information */
+ rc = tf_session_get_device(tfs, &dev);
+ if (rc)
+ return rc;
+
+ /* Only get table info if required for the device */
+ if (dev->ops->tf_dev_get_tbl_info) {
+ rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir],
+ parms->type, &base, &shift);
+ if (rc) {
+ TFP_DRV_LOG(ERR,
+ "%s: Failed to get table info:%d\n",
+ tf_dir_2_str(parms->dir),
+ parms->type);
+ return rc;
+ }
+ }
+
/* Verify that the entry has been previously allocated */
aparms.rm_db = tbl_db[parms->dir];
aparms.subtype = parms->type;
- aparms.index = parms->idx;
+ TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift);
+
aparms.allocated = &allocated;
rc = tf_rm_is_allocated(&aparms);
if (rc)
@@ -292,6 +383,9 @@ tf_tbl_get(struct tf *tfp,
int allocated = 0;
struct tf_rm_is_allocated_parms aparms = { 0 };
struct tf_rm_get_hcapi_parms hparms = { 0 };
+ struct tf_session *tfs;
+ struct tf_dev_info *dev;
+ uint16_t base = 0, shift = 0;
TF_CHECK_PARMS3(tfp, parms, parms->data);
@@ -302,10 +396,35 @@ tf_tbl_get(struct tf *tfp,
return -EINVAL;
}
+
+ /* Retrieve the session information */
+ rc = tf_session_get_session_internal(tfp, &tfs);
+ if (rc)
+ return rc;
+
+ /* Retrieve the device information */
+ rc = tf_session_get_device(tfs, &dev);
+ if (rc)
+ return rc;
+
+ /* Only get table info if required for the device */
+ if (dev->ops->tf_dev_get_tbl_info) {
+ rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir],
+ parms->type, &base, &shift);
+ if (rc) {
+ TFP_DRV_LOG(ERR,
+ "%s: Failed to get table info:%d\n",
+ tf_dir_2_str(parms->dir),
+ parms->type);
+ return rc;
+ }
+ }
+
/* Verify that the entry has been previously allocated */
aparms.rm_db = tbl_db[parms->dir];
aparms.subtype = parms->type;
- aparms.index = parms->idx;
+ TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift);
+
aparms.allocated = &allocated;
rc = tf_rm_is_allocated(&aparms);
if (rc)
@@ -361,6 +480,9 @@ tf_tbl_bulk_get(struct tf *tfp,
uint16_t hcapi_type;
struct tf_rm_get_hcapi_parms hparms = { 0 };
struct tf_rm_check_indexes_in_range_parms cparms = { 0 };
+ struct tf_session *tfs;
+ struct tf_dev_info *dev;
+ uint16_t base = 0, shift = 0;
TF_CHECK_PARMS2(tfp, parms);
@@ -372,10 +494,36 @@ tf_tbl_bulk_get(struct tf *tfp,
return -EINVAL;
}
+ /* Retrieve the session information */
+ rc = tf_session_get_session_internal(tfp, &tfs);
+ if (rc)
+ return rc;
+
+ /* Retrieve the device information */
+ rc = tf_session_get_device(tfs, &dev);
+ if (rc)
+ return rc;
+
+ /* Only get table info if required for the device */
+ if (dev->ops->tf_dev_get_tbl_info) {
+ rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir],
+ parms->type, &base, &shift);
+ if (rc) {
+ TFP_DRV_LOG(ERR,
+ "%s: Failed to get table info:%d\n",
+ tf_dir_2_str(parms->dir),
+ parms->type);
+ return rc;
+ }
+ }
+
/* Verify that the entries are in the range of reserved resources. */
cparms.rm_db = tbl_db[parms->dir];
cparms.subtype = parms->type;
- cparms.starting_index = parms->starting_idx;
+
+ TF_TBL_PTR_TO_RM(&cparms.starting_index, parms->starting_idx,
+ base, shift);
+
cparms.num_entries = parms->num_entries;
rc = tf_rm_check_indexes_in_range(&cparms);