[RFC] Add selection between vector and scalar mode in ixgbe
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Commit Message
The selection between scalar mode and vector mode was removed for
ixgbe driver in DPDK 20.02. The code base still has code
for scalar mode but it cannot be selected at compile time. The
vector mode is adequate for applications which require high
throughput which is the case most of the time, but scalar mode has
a use case in ultra-low-latency fintech applications for algorithmic
trading. This use case was also presented at the DPDK userspace
summit in September 2020.
This patch enables the ability to select between scalar and vector
modes for ixgbe drivers in the config.
In the future we can introduce API in ehtdev, which allow user to
select between latency and throughput mode.
Signed-off-by: Muhammad Ahmad <muhammad.ahmad@emumba.com>
---
config/rte_config.h | 3 +++
drivers/net/ixgbe/ixgbe_ethdev.c | 9 ++++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
RTE_LOG_REGISTER(ixgbe_logtype_tx_free, pmd.net.ixgbe.tx_free, DEBUG);
#endif
+
Comments
On Tue, May 25, 2021 at 11:58:18AM +0500, Muhammad Ahmad wrote:
>
> The selection between scalar mode and vector mode was removed for
> ixgbe driver in DPDK 20.02. The code base still has code
> for scalar mode but it cannot be selected at compile time. The
> vector mode is adequate for applications which require high
> throughput which is the case most of the time, but scalar mode has
> a use case in ultra-low-latency fintech applications for algorithmic
> trading. This use case was also presented at the DPDK userspace
> summit in September 2020.
> This patch enables the ability to select between scalar and vector
> modes for ixgbe drivers in the config.
> In the future we can introduce API in ehtdev, which allow user to
> select between latency and throughput mode.
>
> Signed-off-by: Muhammad Ahmad <muhammad.ahmad@emumba.com>
> ---
Rather than having compile-time selection, this should be supported via
runtime selection, using the force-max-simd-bitwidth flag. Setting the flag
to 64 should force scalar paths.
Regards,
/Bruce
@@ -121,6 +121,9 @@
/* hns3 defines */
#define RTE_LIBRTE_HNS3_MAX_TQP_NUM_PER_PF 256
+/*ixgbe defines*/
+#define RTE_IXGBE_SCALAR_ENABLE 0
+
/* i40e defines */
#define RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC 1
#undef RTE_LIBRTE_I40E_16BYTE_RX_DESC
@@ -84,7 +84,7 @@
#define IXGBE_DEFAULT_RX_WTHRESH 0
#define IXGBE_DEFAULT_TX_FREE_THRESH 32
#define IXGBE_DEFAULT_TX_PTHRESH 32
#define IXGBE_DEFAULT_TX_HTHRESH 0
#define IXGBE_DEFAULT_TX_WTHRESH 0
#define IXGBE_DEFAULT_TX_RSBIT_THRESH 32
@@ -2415,6 +2415,12 @@ ixgbe_dev_configure(struct rte_eth_dev *dev)
*/
adapter->rx_bulk_alloc_allowed = true;
adapter->rx_vec_allowed = true;
+
+ #if RTE_IXGBE_SCALAR_ENABLE == 1
+ adapter->rx_vec_allowed = false;
+ #endif
return 0;
}
@@ -9121,3 +9127,4 @@ RTE_LOG_REGISTER(ixgbe_logtype_tx, pmd.net.ixgbe.tx, DEBUG);
#ifdef RTE_LIBRTE_IXGBE_DEBUG_TX_FREE