[v3,1/2] net/mlx4: remove unnecessary wmb for Memory Region cache
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Commit Message
'dev_gen' is a variable to trigger all cores to flush their local caches
once the global MR cache has been rebuilt.
This is due to MR cache's R/W lock can maintain synchronization between
threads:
1. dev_gen and global cache updating ordering inside the lock protected
section does not matter. Because other threads cannot take the lock
until global cache has been updated. Thus, in out of order platform,
even if other agents firstly observe updated dev_gen but global does
not update, they still have to wait the lock. As a result, it is
unnecessary to add a wmb between global cache rebuilding and updating
the dev_gen to keep the memory store order.
2. Store-Release of unlock provides the implicit wmb at the level
visible by software. This makes 'rebuilding global cache' and 'updating
dev_gen' be observed before local_cache starts to be updated by other
agents. Thus, wmb after 'updating dev_gen' can be removed.
Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
drivers/net/mlx4/mlx4_mr.c | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
Comments
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Feifei Wang
> Sent: Tuesday, May 18, 2021 11:51
> To: Matan Azrad <matan@nvidia.com>; Shahaf Shuler
> <shahafs@nvidia.com>
> Cc: dev@dpdk.org; nd@arm.com; Feifei Wang <feifei.wang2@arm.com>;
> Ruifeng Wang <ruifeng.wang@arm.com>
> Subject: [dpdk-dev] [PATCH v3 1/2] net/mlx4: remove unnecessary wmb for
> Memory Region cache
>
> 'dev_gen' is a variable to trigger all cores to flush their local caches once the
> global MR cache has been rebuilt.
>
> This is due to MR cache's R/W lock can maintain synchronization between
> threads:
>
> 1. dev_gen and global cache updating ordering inside the lock protected
> section does not matter. Because other threads cannot take the lock until
> global cache has been updated. Thus, in out of order platform, even if other
> agents firstly observe updated dev_gen but global does not update, they still
> have to wait the lock. As a result, it is unnecessary to add a wmb between
> global cache rebuilding and updating the dev_gen to keep the memory store
> order.
>
> 2. Store-Release of unlock provides the implicit wmb at the level visible by
> software. This makes 'rebuilding global cache' and 'updating dev_gen' be
> observed before local_cache starts to be updated by other agents. Thus,
> wmb after 'updating dev_gen' can be removed.
>
> Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
@@ -948,18 +948,13 @@ mlx4_mr_mem_event_free_cb(struct rte_eth_dev *dev, const void *addr, size_t len)
if (rebuild) {
mr_rebuild_dev_cache(dev);
/*
- * Flush local caches by propagating invalidation across cores.
- * rte_smp_wmb() is enough to synchronize this event. If one of
- * freed memsegs is seen by other core, that means the memseg
- * has been allocated by allocator, which will come after this
- * free call. Therefore, this store instruction (incrementing
- * generation below) will be guaranteed to be seen by other core
- * before the core sees the newly allocated memory.
+ * No explicit wmb is needed after updating dev_gen due to
+ * store-release ordering in unlock that provides the
+ * implicit barrier at the software visible level.
*/
++priv->mr.dev_gen;
DEBUG("broadcasting local cache flush, gen=%d",
priv->mr.dev_gen);
- rte_smp_wmb();
}
rte_rwlock_write_unlock(&priv->mr.rwlock);
#ifdef RTE_LIBRTE_MLX4_DEBUG