From patchwork Wed May 12 07:16:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alvin Zhang X-Patchwork-Id: 93188 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 19876A0C42; Wed, 12 May 2021 09:16:19 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C3DFA410DE; Wed, 12 May 2021 09:16:18 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 85CEB4003E; Wed, 12 May 2021 09:16:17 +0200 (CEST) IronPort-SDR: ELvgQENB5niE8WWZtkjrUFM/PkgiI6TMjLKV0gfCsDVDi2rXOG3yRY4X/n905l40ki9Gqx2uTP TvWXEdRX780Q== X-IronPort-AV: E=McAfee;i="6200,9189,9981"; a="260890416" X-IronPort-AV: E=Sophos;i="5.82,293,1613462400"; d="scan'208";a="260890416" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2021 00:16:14 -0700 IronPort-SDR: nC2Q2BBdkuSVU6SOVJbOtL3AUprFDDQGMY0oUySAGBK3rsmEESNtMXnAJkat2Cl/bCZPAvsWIc f5OwGLO/EV5w== X-IronPort-AV: E=Sophos;i="5.82,293,1613462400"; d="scan'208";a="625141638" Received: from shwdenpg235.ccr.corp.intel.com ([10.240.182.60]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2021 00:16:11 -0700 From: Alvin Zhang To: beilei.xing@intel.com, Ting.Xu@intel.com Cc: dev@dpdk.org, Alvin Zhang , stable@dpdk.org Date: Wed, 12 May 2021 15:16:04 +0800 Message-Id: <20210512071604.38696-1-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210512062648.32488-1-alvinx.zhang@intel.com> References: <20210512062648.32488-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3] net/i40e: fix VF RSS configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The kernel driver supports VF RSS configuration message "VIRTCHNL_OP_GET_RSS_HENA_CAPS and VIRTCHNL_OP_SET_RSS_HENA", this patch adds PMD support for these messages. Fixes: b81295c474b0 ("net/i40e: add user callback for VF to PF message") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang --- v2, v3: Update codes according to comments. --- drivers/net/i40e/i40e_pf.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/net/i40e/i40e_pf.c b/drivers/net/i40e/i40e_pf.c index 9804ed4..2e7a8ee 100644 --- a/drivers/net/i40e/i40e_pf.c +++ b/drivers/net/i40e/i40e_pf.c @@ -29,6 +29,28 @@ #define I40E_CFG_CRCSTRIP_DEFAULT 1 +/* Supported RSS offloads */ +#define I40E_DEFAULT_RSS_HENA ( \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ + BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ + BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \ + BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD)) + +#define I40E_DEFAULT_RSS_HENA_EXPANDED (I40E_DEFAULT_RSS_HENA | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \ + BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP)) + static int i40e_pf_host_switch_queues(struct i40e_pf_vf *vf, struct virtchnl_queue_select *qsel, @@ -1288,6 +1310,37 @@ (u8 *)vfres, sizeof(*vfres)); } +static int +i40e_pf_host_process_cmd_get_rss_hena(struct i40e_pf_vf *vf) +{ + struct virtchnl_rss_hena vrh = {0}; + struct i40e_pf *pf = vf->pf; + + if (pf->adapter->hw.mac.type == I40E_MAC_X722) + vrh.hena = I40E_DEFAULT_RSS_HENA_EXPANDED; + else + vrh.hena = I40E_DEFAULT_RSS_HENA; + + return i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS, + 0, (uint8_t *)&vrh, sizeof(vrh)); +} + +static int +i40e_pf_host_process_cmd_set_rss_hena(struct i40e_pf_vf *vf, uint8_t *msg) +{ + struct virtchnl_rss_hena *vrh = + (struct virtchnl_rss_hena *)msg; + struct i40e_hw *hw = &vf->pf->adapter->hw; + + i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_idx), + (uint32_t)vrh->hena); + i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_idx), + (uint32_t)(vrh->hena >> 32)); + + return i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, + 0, NULL, 0); +} + void i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev, uint16_t abs_vf_id, uint32_t opcode, @@ -1458,6 +1511,12 @@ PMD_DRV_LOG(INFO, "OP_REQUEST_QUEUES received"); i40e_pf_host_process_cmd_request_queues(vf, msg); break; + case VIRTCHNL_OP_GET_RSS_HENA_CAPS: + ret = i40e_pf_host_process_cmd_get_rss_hena(vf); + break; + case VIRTCHNL_OP_SET_RSS_HENA: + ret = i40e_pf_host_process_cmd_set_rss_hena(vf, msg); + break; /* Don't add command supported below, which will * return an error code.