From patchwork Thu May 6 14:25:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Krawczyk X-Patchwork-Id: 93015 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0F40BA0524; Thu, 6 May 2021 16:27:04 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DE9AB4114F; Thu, 6 May 2021 16:25:58 +0200 (CEST) Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) by mails.dpdk.org (Postfix) with ESMTP id 501A441143 for ; Thu, 6 May 2021 16:25:56 +0200 (CEST) Received: by mail-lf1-f53.google.com with SMTP id n138so8077925lfa.3 for ; Thu, 06 May 2021 07:25:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6FK++eNy/5mi2hlIqjhjaECSz4j0i7x/XUmiyNUScFs=; b=mo1bfIizS8g6Gnuhu9Bbggy7TL4QAjH/0YZdCKs+4kNEhqiVfgCXJGOKGb7zbj15HY 8u4GHTwX6y+pK/M6rUjb7qAupnRZCJySzbf75ZY4y56tGIzDShpeg5yyhAyQjOOEX9Nk oS7uXnvBk4kCSY+fxlnIcYyq82kbztnyeyAiwHeseMhVkjJyGyKj+j/CPvSaCtROJ4eE 5poctb5Zw7u0QTsd79KxDXKtLueoqE6+d8Ta4uVHHgTNLssQ7hyyJZVzv4xuVd4jPfIt LsGOfz7YoXAxfjhDu9Adp4DwmoJN3r8BZd9kpbxxTl+3s+0d8GZAqiFXEzimyb19yvz+ Dbmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6FK++eNy/5mi2hlIqjhjaECSz4j0i7x/XUmiyNUScFs=; b=sb3/PmXqPE4dlIVpbWFadPYIXza9xCiozbuRDBwhq0jXOkhagufyOVdmXjqg0FIONG ID5oUZJ2B8IkKgqRI59J450q2p4/J0giAc68/UieZ+VNrrNthdov8p9W0WBrNoLoQFhb keQWdALoVMY6WOpocj/yr4/YGSjI21xJFg2cH3Js6WPJBmnZ4MKDaZsszuL4rtAEq7xz RnX8P91xjCisvWnXQ3IC6LCMbChQ7N4rr9dDHvwWeiQ98jRK+b7/0jjZKX2HCoea5woR EiM+OMkTIs9QRZsD6xcqSbl4wxOFOkIIo0G3xsRkLloAc3WsqlR933dAZtHNZM2lTrbT Tm/Q== X-Gm-Message-State: AOAM5321l0EcVk5lMLr3DQLMHPWAzGmo1LZkPwdLGghyC/wjXxzelChj CEq3V6sQFSlNl/DlR0gvtMErNkbfDq56/2bH X-Google-Smtp-Source: ABdhPJyx98SBR+M/2ujcJ+6IyRu25saWxr5Es8JxbkVTVnYht6ZUdsK+O6sbG/K+bt4U/qrk+Q/JnQ== X-Received: by 2002:a19:9150:: with SMTP id y16mr3095362lfj.396.1620311155593; Thu, 06 May 2021 07:25:55 -0700 (PDT) Received: from DESKTOP-U5LNN3J.localdomain (89-79-189-199.dynamic.chello.pl. [89.79.189.199]) by smtp.gmail.com with ESMTPSA id b40sm892908ljr.101.2021.05.06.07.25.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 May 2021 07:25:54 -0700 (PDT) From: Michal Krawczyk To: dev@dpdk.org Cc: ndagan@amazon.com, gtzalik@amazon.com, igorch@amazon.com, upstream@semihalf.com, Michal Krawczyk , Amit Bernstein Date: Thu, 6 May 2021 16:25:14 +0200 Message-Id: <20210506142526.28245-11-mk@semihalf.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210506142526.28245-1-mk@semihalf.com> References: <20210505073348.6394-1-mk@semihalf.com> <20210506142526.28245-1-mk@semihalf.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 10/22] net/ena/base: use rte_prefetch0_write X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" As in the v20.11 rte_prefetch0_write API was added, it should be used in the platform file for the definition of the macro prefetchw, instead of using simply prefetch0. Signed-off-by: Michal Krawczyk Reviewed-by: Igor Chauskin Reviewed-by: Amit Bernstein --- drivers/net/ena/base/ena_plat_dpdk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h index ad7b07b374..c6103e3721 100644 --- a/drivers/net/ena/base/ena_plat_dpdk.h +++ b/drivers/net/ena/base/ena_plat_dpdk.h @@ -290,7 +290,7 @@ extern rte_atomic32_t ena_alloc_cnt; #define might_sleep() #define prefetch(x) rte_prefetch0(x) -#define prefetchw(x) prefetch(x) +#define prefetchw(x) rte_prefetch0_write(x) #define lower_32_bits(x) ((uint32_t)(x)) #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))