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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT018.mail.protection.outlook.com (10.13.176.89) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4108.25 via Frontend Transport; Wed, 5 May 2021 09:50:51 +0000 Received: from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 5 May 2021 09:50:48 +0000 From: Bing Zhao To: , , CC: , , Date: Wed, 5 May 2021 12:50:04 +0300 Message-ID: <20210505095009.40250-13-bingz@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210505095009.40250-1-bingz@nvidia.com> References: <20210427153811.11554-1-bingz@nvidia.com> <20210505095009.40250-1-bingz@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f06bd0cb-68c5-41ed-907a-08d90fab4490 X-MS-TrafficTypeDiagnostic: BL0PR12MB2387: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4714; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2021 09:50:51.1906 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f06bd0cb-68c5-41ed-907a-08d90fab4490 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB2387 Subject: [dpdk-dev] [PATCH v6 12/17] net/mlx5: add translation of CT item X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The return register of the DR action will be used for matching. After the ASO CT checking of a TCP packet, the syndrome is filled in the register. Only the 8 LSB should be used. A converting from RTE_FLOW_CONNTRACK_FLAG* to the syndrome should be done after checing the spec and mask fields. Signed-off-by: Bing Zhao --- drivers/net/mlx5/mlx5_flow.h | 7 ++++ drivers/net/mlx5/mlx5_flow_dv.c | 62 +++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index fe0a53c1e2..9ad518b824 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -409,6 +409,13 @@ enum mlx5_feature_name { /* Maximum number of fields to modify in MODIFY_FIELD */ #define MLX5_ACT_MAX_MOD_FIELDS 5 +/* Syndrome bits definition for connection tracking. */ +#define MLX5_CT_SYNDROME_VALID (0x0 << 6) +#define MLX5_CT_SYNDROME_INVALID (0x1 << 6) +#define MLX5_CT_SYNDROME_TRAP (0x2 << 6) +#define MLX5_CT_SYNDROME_STATE_CHANGE (0x1 << 1) +#define MLX5_CT_SYNDROME_BAD_PACKET (0x1 << 0) + enum mlx5_flow_drv_type { MLX5_FLOW_TYPE_MIN, MLX5_FLOW_TYPE_DV, diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 731d38012d..7dcf27d239 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -9616,6 +9616,64 @@ flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher, } } +/* + * Add connection tracking status item to matcher + * + * @param[in] dev + * The devich to configure through. + * @param[in, out] matcher + * Flow matcher. + * @param[in, out] key + * Flow matcher value. + * @param[in] item + * Flow pattern to translate. + */ +static void +flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev, + void *matcher, void *key, + const struct rte_flow_item *item) +{ + uint32_t reg_value = 0; + int reg_id; + /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */ + uint32_t reg_mask = 0; + const struct rte_flow_item_conntrack *spec = item->spec; + const struct rte_flow_item_conntrack *mask = item->mask; + uint32_t flags; + struct rte_flow_error error; + + if (!mask) + mask = &rte_flow_item_conntrack_mask; + if (!spec || !mask->flags) + return; + flags = spec->flags & mask->flags; + /* The conflict should be checked in the validation. */ + if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) + reg_value |= MLX5_CT_SYNDROME_VALID; + if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED) + reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE; + if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) + reg_value |= MLX5_CT_SYNDROME_INVALID; + if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED) + reg_value |= MLX5_CT_SYNDROME_TRAP; + if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) + reg_value |= MLX5_CT_SYNDROME_BAD_PACKET; + if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID | + RTE_FLOW_CONNTRACK_PKT_STATE_INVALID | + RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)) + reg_mask |= 0xc0; + if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED) + reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE; + if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) + reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET; + /* The REG_C_x value could be saved during startup. */ + reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error); + if (reg_id == REG_NON) + return; + flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id, + reg_value, reg_mask); +} + static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 }; #define HEADER_IS_ZERO(match_criteria, headers) \ @@ -12734,6 +12792,10 @@ flow_dv_translate(struct rte_eth_dev *dev, match_value, head_item, items); break; + case RTE_FLOW_ITEM_TYPE_CONNTRACK: + flow_dv_translate_item_aso_ct(dev, match_mask, + match_value, items); + break; default: break; }