From patchwork Tue May 4 17:54:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matan Azrad X-Patchwork-Id: 92752 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A87F1A0A02; Tue, 4 May 2021 19:56:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9096D410E5; Tue, 4 May 2021 19:56:35 +0200 (CEST) Received: from NAM02-BL2-obe.outbound.protection.outlook.com (mail-eopbgr750053.outbound.protection.outlook.com [40.107.75.53]) by mails.dpdk.org (Postfix) with ESMTP id 2328C406A2 for ; Tue, 4 May 2021 19:56:34 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=MuYbFSNZ9WKjDpVbtvDzS90k0byqXsnaiKCuTYSt5ik31momp68QAblMh2knPSmxO+Wd7OctT8nw0bcMvFB+KyBu6n3FGy4X/PQK0a7CgzMCEOm24Qxg9n63Qq8vYjRg9gJAWAT5bndVCDxCV6X31SO1Jcin+/2BDXjVIEdOg5aX4Xuflb8h7FN6cOyTxKw5is0syKnwm4c3RflkOE9YNAYiVLG9y2r2IbsVMTyfMBNcrw+jdJ2mg1U1mG5tmvvQp+yaThWG5o8rt+WzeFTjdRaGd045+EQZgo5Qp9IQfcjPPNNzv5l3VGxv0WP+rqI3ZnBbA9e6johExt4LL754+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=yKQjOwkjVoIohSknmmul6IEFOgu0IQknBKhQn6pLr0o=; b=TxxdiYDqoLZ6rgUSkftJxyPB3gTG2WOQpqb7KdenRHgT1hRUIFksstpbEh3TZoUb08nYYv/2yXA1Rt3a1E9YPTEsJb38mN1lICQ7z/F+eh3XxZ+1hEAcDZ90gWfsnG1YIiC/E2+CosVlO4lXstz0G+U8C9NuGMdmQKiIYfvTACa0d6RFkj3M3GIyNb/HRJVI+9Uc+mkboUCbPypLMw7X1Uh2ajWC2uc6VUOwJzOVTHwIITVPD6TXd3x8y7LwQepf4cnqPHuPJSQIGOoUsRYdHhxNNGR+d9SLV7OaQ4jy0pq6f+jcXnMVGNKfzwfdT6PFCjC5G4XrA7n5p232fD8a/Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=yKQjOwkjVoIohSknmmul6IEFOgu0IQknBKhQn6pLr0o=; b=ZkGWDLpaA+JWOO6PlosK9nuOnAOT5+8Hono4f38ThANIHkVA/c3BlKkrhZZTKbS1qjFYjgIhIVdOhDB+THf1SpcMMmQRm+3cnGo8bKawunXd+TIwh7F7jriUwxZSDwvdZWxpKS6velXknHftHq7YwK/Lq+l3h+A5HJrAcs06Z+UXRXlYkmCHN0hoCjied1svhgpIll/lUheEEscDRCT2BqSsBz+LWLFp+JoLceXzFGFjee315cxcq8q+3OlAfmaUiBrReTqvkW6gu78OGa4hdI78lBI5e2lXkUQUT3IQIy+HGXUnetwa/PO4fM7ZoMj7MfaJbQDhhh2devu5oBvfew== Received: from DM6PR03CA0093.namprd03.prod.outlook.com (2603:10b6:5:333::26) by MN2PR12MB3054.namprd12.prod.outlook.com (2603:10b6:208:d1::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4087.40; Tue, 4 May 2021 17:56:32 +0000 Received: from DM6NAM11FT012.eop-nam11.prod.protection.outlook.com (2603:10b6:5:333:cafe::e6) by DM6PR03CA0093.outlook.office365.com (2603:10b6:5:333::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.24 via Frontend Transport; Tue, 4 May 2021 17:56:32 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed) header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT012.mail.protection.outlook.com (10.13.173.109) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4087.27 via Frontend Transport; Tue, 4 May 2021 17:56:32 +0000 Received: from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 4 May 2021 17:56:30 +0000 From: Matan Azrad To: CC: , , , "Thomas Monjalon" , Dekel Peled Date: Tue, 4 May 2021 20:54:53 +0300 Message-ID: <20210504175500.3385811-9-matan@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210504175500.3385811-1-matan@nvidia.com> References: <20210429154335.2820028-1-matan@nvidia.com> <20210504175500.3385811-1-matan@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 302cff5a-473d-4d75-5ec2-08d90f25f387 X-MS-TrafficTypeDiagnostic: MN2PR12MB3054: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: MGwxmR354Ao3u8DICTiQFVc6MuCd97E5cPKWDl4fgOFKOXfUHXR8B7cHYVBobBpPuqEAOwFQ+yzr+d+4Vr+d8anIChKStBIm9S9O3uX2J3EawmbyBG7da8m1R3aAByKzjD8b+bPLPu4lA5EgbzSky+kaPE0eUVBTAoffS8g/aY7OanvmGhM1hISQtkQkUWUtXTS1b1eimAM6BGa8VPdPMAcmIkSoaHTYKIn24m5xFMmd1AAeUSrVyrWpDYIwNsmp3N4u0jB0rC2aTlWMIl/9VhA7KYNkn+twd2xSaVstez2UhbMnKNROtixuN5/B9HV1mdPn6xofHrbYe2WzHloSYrJmViXtRHSNMTgaPBz0SeIWORk1ID1VBQ5blRijoV9rinjfSuvNmMp5ZFzXMOXPEf7KC0xOeEh/s+qID5TcphjE3/nYkC48aHoi/Bb6P+jobcM6brRrncDPvE/KLLqBCv53pY61KPTEgjzC2SkeSot12dLIcHrz57uIPcwhqJFAxT/jjqW3Kuc4vpsqikHrgvT9A1/trLwS2OsjBM9ZTmy2RfugZdLqrXOI10Q49NPsQC9ycb83xQOUvreEB4RgOH3huX+y8WB9CDeRXw9h74H2xcBpKIMxZjT9N5JpuwIfifhYiwwVz7ferE6iJrwTDaC1uzBa440sXe62vxHh+4w= X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(396003)(136003)(376002)(39860400002)(346002)(46966006)(36840700001)(86362001)(16526019)(54906003)(26005)(478600001)(47076005)(6286002)(186003)(55016002)(4326008)(107886003)(336012)(70206006)(316002)(2906002)(83380400001)(6916009)(36756003)(82740400003)(70586007)(8936002)(36906005)(6666004)(7696005)(426003)(7636003)(2616005)(8676002)(36860700001)(82310400003)(356005)(1076003)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2021 17:56:32.2578 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 302cff5a-473d-4d75-5ec2-08d90f25f387 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT012.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3054 Subject: [dpdk-dev] [PATCH v3 08/15] common/mlx5: support general obj CRYPTO LOGIN create X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dekel Peled CRYPTO_LOGIN Object is used to login to the device as crypto user or crypto officer. Required in order to perform any crypto related control operations. This patch adds support of CRYPTO_LOGIN object create operation. Add reading of CRYPTO_LOGIN support capability. Add function to create general object type CRYPTO_LOGIN, using DevX API. Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_devx_cmds.c | 54 ++++++++++++++++++++++++++++ drivers/common/mlx5/mlx5_devx_cmds.h | 15 ++++++++ drivers/common/mlx5/mlx5_prm.h | 19 ++++++++++ drivers/common/mlx5/version.map | 1 + 4 files changed, 89 insertions(+) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index afef7a5f63..5e082ebb78 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -754,6 +754,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, MLX5_GENERAL_OBJ_TYPES_CAP_DEK); attr->import_kek = !!(general_obj_types_supported & MLX5_GENERAL_OBJ_TYPES_CAP_IMPORT_KEK); + attr->crypto_login = !!(general_obj_types_supported & + MLX5_GENERAL_OBJ_TYPES_CAP_CRYPTO_LOGIN); /* Add reading of other GENERAL_OBJ_TYPES_CAP bits above this line. */ attr->log_max_cq = MLX5_GET(cmd_hca_cap, hcattr, log_max_cq); attr->log_max_qp = MLX5_GET(cmd_hca_cap, hcattr, log_max_qp); @@ -2509,3 +2511,55 @@ mlx5_devx_cmd_create_import_kek_obj(void *ctx, import_kek_obj->id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id); return import_kek_obj; } + +/** + * Create general object of type CRYPTO_LOGIN using DevX API. + * + * @param[in] ctx + * Context returned from mlx5 open_device() glue function. + * @param [in] attr + * Pointer to CRYPTO_LOGIN attributes structure. + * + * @return + * The DevX object created, NULL otherwise and rte_errno is set. + */ +struct mlx5_devx_obj * +mlx5_devx_cmd_create_crypto_login_obj(void *ctx, + struct mlx5_devx_crypto_login_attr *attr) +{ + uint32_t in[MLX5_ST_SZ_DW(create_crypto_login_in)] = {0}; + uint32_t out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0}; + struct mlx5_devx_obj *crypto_login_obj = NULL; + void *ptr = NULL, *credential_addr = NULL; + + crypto_login_obj = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*crypto_login_obj), + 0, SOCKET_ID_ANY); + if (crypto_login_obj == NULL) { + DRV_LOG(ERR, "Failed to allocate CRYPTO_LOGIN object data"); + rte_errno = ENOMEM; + return NULL; + } + ptr = MLX5_ADDR_OF(create_crypto_login_in, in, hdr); + MLX5_SET(general_obj_in_cmd_hdr, ptr, opcode, + MLX5_CMD_OP_CREATE_GENERAL_OBJECT); + MLX5_SET(general_obj_in_cmd_hdr, ptr, obj_type, + MLX5_GENERAL_OBJ_TYPE_CRYPTO_LOGIN); + ptr = MLX5_ADDR_OF(create_crypto_login_in, in, crypto_login); + MLX5_SET(crypto_login, ptr, credential_pointer, + attr->credential_pointer); + MLX5_SET(crypto_login, ptr, session_import_kek_ptr, + attr->session_import_kek_ptr); + credential_addr = MLX5_ADDR_OF(crypto_login, ptr, credential); + memcpy(credential_addr, (void *)(attr->credential), + MLX5_CRYPTO_LOGIN_CREDENTIAL_SIZE); + crypto_login_obj->obj = mlx5_glue->devx_obj_create(ctx, in, sizeof(in), + out, sizeof(out)); + if (crypto_login_obj->obj == NULL) { + rte_errno = errno; + DRV_LOG(ERR, "Failed to create CRYPTO_LOGIN obj using DevX."); + mlx5_free(crypto_login_obj); + return NULL; + } + crypto_login_obj->id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id); + return crypto_login_obj; +} diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index 6423610dae..709e28bfba 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -143,6 +143,7 @@ struct mlx5_hca_attr { uint32_t aes_xts:1; /* AES-XTS crypto is supported. */ uint32_t dek:1; /* General obj type DEK is supported. */ uint32_t import_kek:1; /* General obj type IMPORT_KEK supported. */ + uint32_t crypto_login:1; /* General obj type CRYPTO_LOGIN supported. */ uint32_t regexp_num_of_engines; uint32_t log_max_ft_sampler_num:8; uint32_t geneve_tlv_opt; @@ -458,6 +459,15 @@ struct mlx5_devx_import_kek_attr { uint8_t key[MLX5_CRYPTO_KEY_MAX_SIZE]; }; +#define MLX5_CRYPTO_LOGIN_CREDENTIAL_SIZE 48 + +struct mlx5_devx_crypto_login_attr { + uint64_t modify_field_select; + uint32_t credential_pointer:24; + uint32_t session_import_kek_ptr:24; + uint8_t credential[MLX5_CRYPTO_LOGIN_CREDENTIAL_SIZE]; +}; + /* mlx5_devx_cmds.c */ __rte_internal @@ -619,4 +629,9 @@ struct mlx5_devx_obj * mlx5_devx_cmd_create_import_kek_obj(void *ctx, struct mlx5_devx_import_kek_attr *attr); +__rte_internal +struct mlx5_devx_obj * +mlx5_devx_cmd_create_crypto_login_obj(void *ctx, + struct mlx5_devx_crypto_login_attr *attr); + #endif /* RTE_PMD_MLX5_DEVX_CMDS_H_ */ diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index bc339566a6..a2437faec0 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -1121,6 +1121,8 @@ enum { (1ULL << MLX5_GENERAL_OBJ_TYPE_DEK) #define MLX5_GENERAL_OBJ_TYPES_CAP_IMPORT_KEK \ (1ULL << MLX5_GENERAL_OBJ_TYPE_IMPORT_KEK) +#define MLX5_GENERAL_OBJ_TYPES_CAP_CRYPTO_LOGIN \ + (1ULL << MLX5_GENERAL_OBJ_TYPE_CRYPTO_LOGIN) enum { MLX5_HCA_CAP_OPMOD_GET_MAX = 0, @@ -2422,6 +2424,7 @@ enum { MLX5_GENERAL_OBJ_TYPE_VIRTQ = 0x000d, MLX5_GENERAL_OBJ_TYPE_VIRTIO_Q_COUNTERS = 0x001c, MLX5_GENERAL_OBJ_TYPE_IMPORT_KEK = 0x001d, + MLX5_GENERAL_OBJ_TYPE_CRYPTO_LOGIN = 0x001f, MLX5_GENERAL_OBJ_TYPE_FLEX_PARSE_GRAPH = 0x0022, MLX5_GENERAL_OBJ_TYPE_FLOW_METER_ASO = 0x0024, MLX5_GENERAL_OBJ_TYPE_FLOW_HIT_ASO = 0x0025, @@ -2534,6 +2537,22 @@ struct mlx5_ifc_create_import_kek_in_bits { struct mlx5_ifc_import_kek_bits import_kek; }; +struct mlx5_ifc_crypto_login_bits { + u8 modify_field_select[0x40]; + u8 reserved_at_40[0x48]; + u8 credential_pointer[0x18]; + u8 reserved_at_a0[0x8]; + u8 session_import_kek_ptr[0x18]; + u8 reserved_at_c0[0x140]; + u8 credential[0x180]; + u8 reserved_at_380[0x480]; +}; + +struct mlx5_ifc_create_crypto_login_in_bits { + struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr; + struct mlx5_ifc_crypto_login_bits crypto_login; +}; + enum { MLX5_VIRTQ_STATE_INIT = 0, MLX5_VIRTQ_STATE_RDY = 1, diff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map index 60bff5f799..89f0ee04cb 100644 --- a/drivers/common/mlx5/version.map +++ b/drivers/common/mlx5/version.map @@ -16,6 +16,7 @@ INTERNAL { mlx5_devx_cmd_alloc_pd; mlx5_devx_cmd_create_cq; + mlx5_devx_cmd_create_crypto_login_obj; mlx5_devx_cmd_create_dek_obj; mlx5_devx_cmd_create_flex_parser; mlx5_devx_cmd_create_flow_hit_aso_obj;