From patchwork Tue May 4 00:26:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 92685 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 734C4A0562; Tue, 4 May 2021 02:28:43 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C8EF94113C; Tue, 4 May 2021 02:28:22 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id AEA914113C for ; Tue, 4 May 2021 02:28:21 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 1440OujY025116 for ; Mon, 3 May 2021 17:28:20 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=UWqhpDk7eZ9D/eFaqHZKhebiRASFAXWqvRhbn402lVk=; b=eX64huUTwXBt7cGqnj5+ibxiFchoIQbifEFBSjHykt1+AsLLXvJPBoX2ViKxE82/3pGx WkC4AaC0sJ4YojCpMbYRyXC6ePL5kd+R8ATLuUL5CdDXplEMkQJpt/V6dam7O3OO78mp RXEdsoWetfM9xT4l1e40EoAf2dz3cyrJG2bE4QzMprEyi5UyJZCMjt6g4D/YG1LJTyAe hOYBODfQ0zpX8+UDEkDHEEb0M64H+cvs8kKkgSOGKZkNyxWrHo/JTV/fMi/OLvHN28AA fjrmJkUqwQgJ0xtX66SlHs+LHwYMDKsDYRdX15pZCB3kVV2iBfbGKR5dLBit0shAbB73 Eg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 38agtfjnnm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 03 May 2021 17:28:20 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 May 2021 17:28:18 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 3 May 2021 17:28:19 -0700 Received: from BG-LT7430.marvell.com (unknown [10.193.86.144]) by maili.marvell.com (Postfix) with ESMTP id F3CD53F7041; Mon, 3 May 2021 17:28:17 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Date: Tue, 4 May 2021 05:56:57 +0530 Message-ID: <20210504002726.525-8-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504002726.525-1-pbhagavatula@marvell.com> References: <20210503152238.2437-1-pbhagavatula@marvell.com> <20210504002726.525-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: BIILGFTmm8jRphXrCIiYgoOB4o88JLiG X-Proofpoint-ORIG-GUID: BIILGFTmm8jRphXrCIiYgoOB4o88JLiG X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-03_20:2021-05-03, 2021-05-03 signatures=0 Subject: [dpdk-dev] [PATCH v5 07/35] event/cnxk: add platform specific device config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shijith Thotton Add platform specific event device configuration that attaches the requested number of SSO HWS(event ports) and HWGRP(event queues) LFs to the RVU PF/VF. Signed-off-by: Shijith Thotton Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_eventdev.c | 35 +++++++++++++++++++++++++++ drivers/event/cnxk/cn9k_eventdev.c | 37 +++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 1216acaad..779a2e026 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -16,6 +16,14 @@ cn10k_sso_set_rsrc(void *arg) dev->sso.max_hwgrp; } +static int +cn10k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp) +{ + struct cnxk_sso_evdev *dev = arg; + + return roc_sso_rsrc_init(&dev->sso, hws, hwgrp); +} + static void cn10k_sso_info_get(struct rte_eventdev *event_dev, struct rte_event_dev_info *dev_info) @@ -26,8 +34,35 @@ cn10k_sso_info_get(struct rte_eventdev *event_dev, cnxk_sso_info_get(dev, dev_info); } +static int +cn10k_sso_dev_configure(const struct rte_eventdev *event_dev) +{ + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); + int rc; + + rc = cnxk_sso_dev_validate(event_dev); + if (rc < 0) { + plt_err("Invalid event device configuration"); + return -EINVAL; + } + + roc_sso_rsrc_fini(&dev->sso); + + rc = cn10k_sso_rsrc_init(dev, dev->nb_event_ports, + dev->nb_event_queues); + if (rc < 0) { + plt_err("Failed to initialize SSO resources"); + return -ENODEV; + } + + return rc; +} + static struct rte_eventdev_ops cn10k_sso_dev_ops = { .dev_infos_get = cn10k_sso_info_get, + .dev_configure = cn10k_sso_dev_configure, + .queue_def_conf = cnxk_sso_queue_def_conf, + .port_def_conf = cnxk_sso_port_def_conf, }; static int diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index 988d2425f..d042f58da 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -22,6 +22,17 @@ cn9k_sso_set_rsrc(void *arg) dev->sso.max_hwgrp; } +static int +cn9k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp) +{ + struct cnxk_sso_evdev *dev = arg; + + if (dev->dual_ws) + hws = hws * CN9K_DUAL_WS_NB_WS; + + return roc_sso_rsrc_init(&dev->sso, hws, hwgrp); +} + static void cn9k_sso_info_get(struct rte_eventdev *event_dev, struct rte_event_dev_info *dev_info) @@ -32,8 +43,34 @@ cn9k_sso_info_get(struct rte_eventdev *event_dev, cnxk_sso_info_get(dev, dev_info); } +static int +cn9k_sso_dev_configure(const struct rte_eventdev *event_dev) +{ + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); + int rc; + + rc = cnxk_sso_dev_validate(event_dev); + if (rc < 0) { + plt_err("Invalid event device configuration"); + return -EINVAL; + } + + roc_sso_rsrc_fini(&dev->sso); + + rc = cn9k_sso_rsrc_init(dev, dev->nb_event_ports, dev->nb_event_queues); + if (rc < 0) { + plt_err("Failed to initialize SSO resources"); + return -ENODEV; + } + + return rc; +} + static struct rte_eventdev_ops cn9k_sso_dev_ops = { .dev_infos_get = cn9k_sso_info_get, + .dev_configure = cn9k_sso_dev_configure, + .queue_def_conf = cnxk_sso_queue_def_conf, + .port_def_conf = cnxk_sso_port_def_conf, }; static int