[v3,2/3] net/iavf: enable PCI bus master after reset

Message ID 20210423114001.174723-3-haiyue.wang@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series fix PF reset causes VF memory request failure |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Wang, Haiyue April 23, 2021, 11:40 a.m. UTC
  The VF reset can be triggerred by the PF reset event, in this case, the
PCI bus master will be cleared, then the VF is not allowed to issue any
Memory or I/O Requests.

So after the reset event is detected, always enable the PCI bus master.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Tested-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/iavf/iavf_ethdev.c | 3 +++
 1 file changed, 3 insertions(+)
  

Patch

diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c
index d523a0618..8c924d21b 100644
--- a/drivers/net/iavf/iavf_ethdev.c
+++ b/drivers/net/iavf/iavf_ethdev.c
@@ -2255,6 +2255,9 @@  iavf_dev_close(struct rte_eth_dev *dev)
 	rte_free(vf->aq_resp);
 	vf->aq_resp = NULL;
 
+	if (vf->vf_reset)
+		rte_pci_enable_bus_master(pci_dev);
+
 	vf->vf_reset = false;
 
 	return ret;