From patchwork Thu Apr 22 01:18:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Haiyue" X-Patchwork-Id: 91978 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9CD4EA0547; Thu, 22 Apr 2021 03:38:05 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 068E041C14; Thu, 22 Apr 2021 03:38:03 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id CE25240150 for ; Thu, 22 Apr 2021 03:37:59 +0200 (CEST) IronPort-SDR: /qhOt545qLvoKClxqU7HH2k13ygpMY3HiLX64H5fz/E4vTKTg6BDJolzjpscJbq0uNRCKUBxC1 +7/qgBwsZCFA== X-IronPort-AV: E=McAfee;i="6200,9189,9961"; a="193689952" X-IronPort-AV: E=Sophos;i="5.82,241,1613462400"; d="scan'208";a="193689952" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2021 18:37:59 -0700 IronPort-SDR: y/+RxBVFKPc+lEZakS85JjvpybcOQnXjc4GgIkxNDRGT0N326UIpygPYqopa/OWNcGhOXZ+LWC xxDyHJ6jFRnw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,241,1613462400"; d="scan'208";a="401672448" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.220]) by orsmga002.jf.intel.com with ESMTP; 21 Apr 2021 18:37:57 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, Haiyue Wang , Ray Kinsella , Neil Horman , Gaetan Rivet Date: Thu, 22 Apr 2021 09:18:28 +0800 Message-Id: <20210422011830.54199-2-haiyue.wang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210422011830.54199-1-haiyue.wang@intel.com> References: <20210421050243.130585-1-haiyue.wang@intel.com> <20210422011830.54199-1-haiyue.wang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 1/3] bus/pci: enable PCI master in command register X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This adds the support to set 'Bus Master Enable' bit in the PCI command register. Signed-off-by: Haiyue Wang Tested-by: Qi Zhang --- drivers/bus/pci/pci_common.c | 20 ++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 12 ++++++++++++ drivers/bus/pci/version.map | 1 + lib/pci/rte_pci.h | 4 ++++ 4 files changed, 37 insertions(+) diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c index ee7f96635..b631cb9c7 100644 --- a/drivers/bus/pci/pci_common.c +++ b/drivers/bus/pci/pci_common.c @@ -746,6 +746,26 @@ rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap) return 0; } +int +rte_pci_enable_bus_master(struct rte_pci_device *dev) +{ + uint16_t cmd; + + if (rte_pci_read_config(dev, &cmd, sizeof(cmd), RTE_PCI_COMMAND) < 0) { + RTE_LOG(ERR, EAL, "error in reading PCI command register\n"); + return -1; + } + + cmd |= RTE_PCI_COMMAND_MASTER; + + if (rte_pci_write_config(dev, &cmd, sizeof(cmd), RTE_PCI_COMMAND) < 0) { + RTE_LOG(ERR, EAL, "error in writing PCI command register\n"); + return -1; + } + + return 0; +} + struct rte_pci_bus rte_pci_bus = { .bus = { .scan = rte_pci_scan, diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h index 64886b473..83caf477b 100644 --- a/drivers/bus/pci/rte_bus_pci.h +++ b/drivers/bus/pci/rte_bus_pci.h @@ -249,6 +249,18 @@ void rte_pci_dump(FILE *f); __rte_experimental off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap); +/** + * Enables Bus Master for device's PCI command register. + * + * @param dev + * A pointer to rte_pci_device structure. + * + * @return + * 0 on success, -1 on error in PCI config space read/write. + */ +__rte_experimental +int rte_pci_enable_bus_master(struct rte_pci_device *dev); + /** * Register a PCI driver. * diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map index f33ed0abd..b271e48a8 100644 --- a/drivers/bus/pci/version.map +++ b/drivers/bus/pci/version.map @@ -20,5 +20,6 @@ DPDK_21 { EXPERIMENTAL { global: + rte_pci_enable_bus_master; rte_pci_find_ext_capability; }; diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h index a8f8e404a..1f33d687f 100644 --- a/lib/pci/rte_pci.h +++ b/lib/pci/rte_pci.h @@ -32,6 +32,10 @@ extern "C" { #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */ #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */ +#define RTE_PCI_COMMAND 0x04 /* 16 bits */ + +/* PCI Command Register */ +#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */ /* PCI Express capability registers */ #define RTE_PCI_EXP_DEVCTL 8 /* Device Control */