From patchwork Wed Apr 21 16:34:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 91963 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A9EB0A0547; Wed, 21 Apr 2021 18:35:30 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C09F241B98; Wed, 21 Apr 2021 18:35:17 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 0DC8041B84 for ; Wed, 21 Apr 2021 18:35:12 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 21 Apr 2021 19:35:11 +0300 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 13LGZBMf005314; Wed, 21 Apr 2021 19:35:11 +0300 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, asafp@nvidia.com, odia@nvidia.com Date: Wed, 21 Apr 2021 19:34:41 +0300 Message-Id: <20210421163441.17240-4-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20210421163441.17240-1-talshn@nvidia.com> References: <20210421163441.17240-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH 3/3] net/mlx5: support checksum offload on Windows X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Support of the checksum offloading by checking the relevant FW capability (csum_cap) for NIC support. RX supported offloads: DEV_RX_OFFLOAD_IPV4_CKSUM DEV_RX_OFFLOAD_UDP_CKSUM DEV_RX_OFFLOAD_TCP_CKSUM TX supported offloads: DEV_TX_OFFLOAD_IPV4_CKSUM DEV_TX_OFFLOAD_UDP_CKSUM DEV_TX_OFFLOAD_TCP_CKSUM Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad Tested-by: Odi Assli --- drivers/net/mlx5/windows/mlx5_os.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c index 5e53042b85..3fe3f55f49 100644 --- a/drivers/net/mlx5/windows/mlx5_os.c +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -420,8 +420,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, err = mlx5_dev_check_sibling_config(priv, config); if (err) goto error; - DRV_LOG(DEBUG, "checksum offloading is %ssupported", - (config->hw_csum ? "" : "not ")); DRV_LOG(DEBUG, "counters are not supported"); config->ind_table_max_size = sh->device_attr.max_rwq_indirection_table_size; @@ -464,6 +462,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, sh->cmng.relaxed_ordering_read = config->hca_attr.relaxed_ordering_read; } + config->hw_csum = config->hca_attr.csum_cap; + DRV_LOG(DEBUG, "checksum offloading is %ssupported", + (config->hw_csum ? "" : "not ")); } if (config->devx) { uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];