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[v5,02/14] common/mlx5: add color register idle bits definition

Message ID 20210415151135.2098674-3-lizh@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers show
Series Add ASO meter support in MLX5 PMD | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Li Zhang April 15, 2021, 3:11 p.m. UTC 
From: Shun Hao <shunh@nvidia.com>

8 bits are used for meter color in meter register. When the meter
register can be shared, the rest 24 bits can be used by others.
This adds the definination for the 24 bits that can be shared.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h | 6 ++++++
 1 file changed, 6 insertions(+)
diff mbox series

Patch

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 0ef0574f92..403ba80978 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3382,6 +3382,12 @@  enum {
 /* The bits meter color use. */
 #define MLX5_MTR_COLOR_BITS 8
 
+/* The bit size of one register. */
+#define MLX5_REG_BITS 32
+
+/* Idle bits for non-color usage in color register. */
+#define MLX5_MTR_IDLE_BITS_IN_COLOR_REG (MLX5_REG_BITS - MLX5_MTR_COLOR_BITS)
+
 /* Length mode of dynamic flex parser graph node. */
 enum mlx5_parse_graph_node_len_mode {
 	MLX5_GRAPH_NODE_LEN_FIXED = 0x0,