From patchwork Tue Apr 6 15:11:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 90737 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E305AA0546; Tue, 6 Apr 2021 17:12:19 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 53841141204; Tue, 6 Apr 2021 17:11:51 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 69D001411FF for ; Tue, 6 Apr 2021 17:11:50 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 136F0UQo015128 for ; Tue, 6 Apr 2021 08:11:49 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=hbRDLeqKGzlBzSKM8ZPiGEMZqOVSNja5lpHI6Om/QxY=; b=bSJMLrdJf0P5Tf3qP+cjlqAfbi1Q9I/QuvTm4DZyLPlO5J4/dc7rjWFe73kmhi+FqRyu dBi/9JT+JElhcjSI/p6YOPWxHNBF0Zqfb8kw5n4PMNAFPObwcNO9iQvgF3o2rJpdhmW0 HHq2CapnuYn8jUexorVtKV48Q3AtiUu8werRfTCYSDWXgRQ87/faTGEsIJp7TeLBTflW FNG3IVLzZ3tL1wFZlHA1Zbzsvd9J3yQcOLKR3lYEpvxxoXjnytgibh+CIBpOeiUX34+3 VtZ0ga3RhOWMi4QL47GrH6RBjuX2k9i/BLWH0vqVfPUQa9wnl8sNHsKhbRxHwBAo05UQ Ng== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 37redma2qm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 06 Apr 2021 08:11:49 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 6 Apr 2021 08:11:47 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 6 Apr 2021 08:11:47 -0700 Received: from lab-ci-142.marvell.com (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id 59A373F703F; Tue, 6 Apr 2021 08:11:45 -0700 (PDT) From: Ashwin Sekhar T K To: CC: , , , , , , Date: Tue, 6 Apr 2021 20:41:11 +0530 Message-ID: <20210406151115.1889455-8-asekhar@marvell.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210406151115.1889455-1-asekhar@marvell.com> References: <20210305162149.2196166-1-asekhar@marvell.com> <20210406151115.1889455-1-asekhar@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: Gt162dKIuWWnK4vZdNwXGnt2L2t0rEo_ X-Proofpoint-ORIG-GUID: Gt162dKIuWWnK4vZdNwXGnt2L2t0rEo_ X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-04-06_04:2021-04-01, 2021-04-06 signatures=0 Subject: [dpdk-dev] [PATCH v3 07/11] mempool/cnxk: add cn10k mempool ops X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add Marvell CN10k mempool ops and implement CN10k mempool alloc. CN10k has 64 bytes L1D cache line size. Hence the CN10k mempool alloc does not make the element size an odd multiple L1D cache line size as NPA requires the element sizes to be multiples of 128 bytes. Signed-off-by: Ashwin Sekhar T K --- doc/guides/mempool/cnxk.rst | 4 ++ drivers/mempool/cnxk/cn10k_mempool_ops.c | 52 ++++++++++++++++++++++++ drivers/mempool/cnxk/cnxk_mempool_ops.c | 2 +- drivers/mempool/cnxk/meson.build | 3 +- 4 files changed, 59 insertions(+), 2 deletions(-) create mode 100644 drivers/mempool/cnxk/cn10k_mempool_ops.c diff --git a/doc/guides/mempool/cnxk.rst b/doc/guides/mempool/cnxk.rst index f51532b101..783368e690 100644 --- a/doc/guides/mempool/cnxk.rst +++ b/doc/guides/mempool/cnxk.rst @@ -80,3 +80,7 @@ Standalone mempool device device. In case, if end user need to run mempool as a standalone device (without ethdev or eventdev), end user needs to bind a mempool device using ``usertools/dpdk-devbind.py`` + + Example command to run ``mempool_autotest`` test with standalone CN10K NPA device:: + + echo "mempool_autotest" | /app/test/dpdk-test -c 0xf0 --mbuf-pool-ops-name="cn10k_mempool_ops" diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c new file mode 100644 index 0000000000..9b63789006 --- /dev/null +++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include + +#include "roc_api.h" +#include "cnxk_mempool.h" + +static int +cn10k_mempool_alloc(struct rte_mempool *mp) +{ + uint32_t block_size; + size_t padding; + + block_size = mp->elt_size + mp->header_size + mp->trailer_size; + /* Align header size to ROC_ALIGN */ + if (mp->header_size % ROC_ALIGN != 0) { + padding = RTE_ALIGN_CEIL(mp->header_size, ROC_ALIGN) - + mp->header_size; + mp->header_size += padding; + block_size += padding; + } + + /* Align block size to ROC_ALIGN */ + if (block_size % ROC_ALIGN != 0) { + padding = RTE_ALIGN_CEIL(block_size, ROC_ALIGN) - block_size; + mp->trailer_size += padding; + block_size += padding; + } + + return cnxk_mempool_alloc(mp); +} + +static void +cn10k_mempool_free(struct rte_mempool *mp) +{ + cnxk_mempool_free(mp); +} + +static struct rte_mempool_ops cn10k_mempool_ops = { + .name = "cn10k_mempool_ops", + .alloc = cn10k_mempool_alloc, + .free = cn10k_mempool_free, + .enqueue = cnxk_mempool_enq, + .dequeue = cnxk_mempool_deq, + .get_count = cnxk_mempool_get_count, + .calc_mem_size = cnxk_mempool_calc_mem_size, + .populate = cnxk_mempool_populate, +}; + +MEMPOOL_REGISTER_OPS(cn10k_mempool_ops); diff --git a/drivers/mempool/cnxk/cnxk_mempool_ops.c b/drivers/mempool/cnxk/cnxk_mempool_ops.c index d8ed37ec1a..42c02bf14e 100644 --- a/drivers/mempool/cnxk/cnxk_mempool_ops.c +++ b/drivers/mempool/cnxk/cnxk_mempool_ops.c @@ -177,7 +177,7 @@ cnxk_mempool_plt_init(void) if (roc_model_is_cn9k()) rte_mbuf_set_platform_mempool_ops("cn9k_mempool_ops"); else if (roc_model_is_cn10k()) - rte_mbuf_set_platform_mempool_ops("cnxk_mempool_ops"); + rte_mbuf_set_platform_mempool_ops("cn10k_mempool_ops"); return 0; } diff --git a/drivers/mempool/cnxk/meson.build b/drivers/mempool/cnxk/meson.build index ff31893ff4..3282b5e5a6 100644 --- a/drivers/mempool/cnxk/meson.build +++ b/drivers/mempool/cnxk/meson.build @@ -10,6 +10,7 @@ endif sources = files('cnxk_mempool.c', 'cnxk_mempool_ops.c', - 'cn9k_mempool_ops.c') + 'cn9k_mempool_ops.c', + 'cn10k_mempool_ops.c') deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool']