From patchwork Thu Apr 1 12:37:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 90389 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A9E62A0548; Thu, 1 Apr 2021 14:41:19 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1A6341411D2; Thu, 1 Apr 2021 14:39:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id B3EB91411D2 for ; Thu, 1 Apr 2021 14:39:25 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 131CPcAu019150 for ; Thu, 1 Apr 2021 05:39:25 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=YmbEUE2L9bsSgqQqAk2mAI6/QA5D7zs7arHSMunSQdk=; b=M45BfccO0HFBhUeuXH2GI+mDnsIZa/18qmInIvEPqD8LOOwnG4i+cMM07s5pfqQ9kw+0 B4yR4jcE/8Rb0M4dzKQg0ARgJkbsgU0N7gYjM1T1fxYLlZzXgiL664WphR9AVQ6ZYt7f tsrxvQBfuoeHoIpChJpUM/wozf4e/R2TEIJ1JbpQSXSoPX7R1aIo0shUs0phoXXxI/Pt X3Hvgxh9bSfbcA44K+CsS49F/tit0phUs+dPWs3zUN6mPGQLd5oTJ5oxpxk9aBGpxR4l Qk29fSZnGsRXj7vP+C2jRxmi6bev1eLqIMnolvCpaEPJ+eW4nzvY3bPOz+H9Ay11OEW0 +g== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 37n28jje21-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 01 Apr 2021 05:39:25 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 1 Apr 2021 05:39:23 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 1 Apr 2021 05:39:22 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 87F773F7040; Thu, 1 Apr 2021 05:39:20 -0700 (PDT) From: Nithin Dabilpuram To: CC: , , , , , , Date: Thu, 1 Apr 2021 18:07:41 +0530 Message-ID: <20210401123817.14348-17-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210401123817.14348-1-ndabilpuram@marvell.com> References: <20210305133918.8005-1-ndabilpuram@marvell.com> <20210401123817.14348-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 9qMuAes_sXZ3Xr5nguV_Qk2bInCOdUjc X-Proofpoint-ORIG-GUID: 9qMuAes_sXZ3Xr5nguV_Qk2bInCOdUjc X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-04-01_05:2021-03-31, 2021-04-01 signatures=0 Subject: [dpdk-dev] [PATCH v3 16/52] common/cnxk: add npa lf init/fini callback support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ashwin Sekhar T K Add support for npa lf init/fini callbacks. Signed-off-by: Ashwin Sekhar T K --- drivers/common/cnxk/roc_npa.c | 27 +++++++++++++++++++++++++++ drivers/common/cnxk/roc_npa.h | 8 ++++++++ drivers/common/cnxk/version.map | 2 ++ 3 files changed, 37 insertions(+) diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c index f1e03b7..9528c85 100644 --- a/drivers/common/cnxk/roc_npa.c +++ b/drivers/common/cnxk/roc_npa.c @@ -5,6 +5,21 @@ #include "roc_api.h" #include "roc_priv.h" +static roc_npa_lf_init_cb_t npa_lf_init_cb; +static roc_npa_lf_fini_cb_t npa_lf_fini_cb; + +void +roc_npa_lf_init_cb_register(roc_npa_lf_init_cb_t cb) +{ + npa_lf_init_cb = cb; +} + +void +roc_npa_lf_fini_cb_register(roc_npa_lf_fini_cb_t cb) +{ + npa_lf_fini_cb = cb; +} + void roc_npa_aura_op_range_set(uint64_t aura_handle, uint64_t start_iova, uint64_t end_iova) @@ -717,11 +732,20 @@ npa_lf_init(struct dev *dev, struct plt_pci_device *pci_dev) if (rc) goto npa_fini; + if (npa_lf_init_cb) { + rc = npa_lf_init_cb(); + if (rc) + goto npa_irq_unregister; + } + plt_npa_dbg("npa=%p max_pools=%d pf_func=0x%x msix=0x%x", lf, roc_idev_npa_maxpools_get(), lf->pf_func, npa_msixoff); return 0; +npa_irq_unregister: + npa_unregister_irqs(idev->npa); + npa_fini: npa_dev_fini(idev->npa); npa_detach: @@ -750,6 +774,9 @@ npa_lf_fini(void) rc |= npa_detach(idev->npa->mbox); idev_set_defaults(idev); + if (npa_lf_fini_cb) + npa_lf_fini_cb(); + return rc; } diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h index 89f5c6f..c857789 100644 --- a/drivers/common/cnxk/roc_npa.h +++ b/drivers/common/cnxk/roc_npa.h @@ -16,6 +16,10 @@ */ #define ROC_CN9K_NPA_BULK_ALLOC_MAX_PTRS 30 +/* Callbacks that are called after NPA lf init/fini respectively */ +typedef int (*roc_npa_lf_init_cb_t)(void); +typedef void (*roc_npa_lf_fini_cb_t)(void); + /* * Generate 64bit handle to have optimized alloc and free aura operation. * 0 - ROC_AURA_ID_MASK for storing the aura_id. @@ -650,4 +654,8 @@ int __roc_api roc_npa_dump(void); /* Reset operation performance counter. */ int __roc_api roc_npa_pool_op_pc_reset(uint64_t aura_handle); +/* Callback registration */ +void __roc_api roc_npa_lf_init_cb_register(roc_npa_lf_init_cb_t cb); +void __roc_api roc_npa_lf_fini_cb_register(roc_npa_lf_fini_cb_t cb); + #endif /* _ROC_NPA_H_ */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 78e9686..c0f282d 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -17,6 +17,8 @@ INTERNAL { roc_npa_dev_fini; roc_npa_dev_init; roc_npa_dump; + roc_npa_lf_fini_cb_register; + roc_npa_lf_init_cb_register; roc_npa_pool_create; roc_npa_pool_destroy; roc_npa_pool_op_pc_reset;