diff mbox series

[3/3] net/mlx5: reduce log level of alignment message

Message ID 20210308222855.823670-4-thomas@monjalon.net (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers show
Series adjust mlx debug logs | expand


Context Check Description
ci/iol-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/intel-Testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/travis-robot success travis build: passed
ci/iol-intel-Performance success Performance Testing PASS
ci/github-robot success github build: passed
ci/checkpatch success coding style OK

Commit Message

Thomas Monjalon March 8, 2021, 10:28 p.m. UTC
Having to force an alignment does not impact the user,
so it should not be a warning.
The log level is reduced from warning to debug.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
 drivers/net/mlx5/mlx5_utils.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series


diff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.c
index 07373bff02..a39b5edddc 100644
--- a/drivers/net/mlx5/mlx5_utils.c
+++ b/drivers/net/mlx5/mlx5_utils.c
@@ -40,8 +40,8 @@  mlx5_hlist_create(const char *name, uint32_t size, uint32_t entry_size,
 	/* Align to the next power of 2, 32bits integer is enough now. */
 	if (!rte_is_power_of_2(size)) {
 		act_size = rte_align32pow2(size);
-		DRV_LOG(WARNING, "Size 0x%" PRIX32 " is not power of 2, will "
-			"be aligned to 0x%" PRIX32 ".", size, act_size);
+		DRV_LOG(DEBUG, "Size 0x%" PRIX32 " is not power of 2, "
+			"will be aligned to 0x%" PRIX32 ".", size, act_size);
 	} else {
 		act_size = size;