From: Shijith Thotton <sthotton@marvell.com>
Add event timer adapter aka TIM initialization on SSO probe.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
---
doc/guides/eventdevs/cnxk.rst | 6 ++++
drivers/event/cnxk/cnxk_eventdev.c | 3 ++
drivers/event/cnxk/cnxk_eventdev.h | 2 ++
drivers/event/cnxk/cnxk_tim_evdev.c | 47 +++++++++++++++++++++++++++++
drivers/event/cnxk/cnxk_tim_evdev.h | 44 +++++++++++++++++++++++++++
drivers/event/cnxk/meson.build | 3 +-
6 files changed, 104 insertions(+), 1 deletion(-)
create mode 100644 drivers/event/cnxk/cnxk_tim_evdev.c
create mode 100644 drivers/event/cnxk/cnxk_tim_evdev.h
@@ -35,6 +35,10 @@ Features of the OCTEON CNXK SSO PMD are:
- Open system with configurable amount of outstanding events limited only by
DRAM
- HW accelerated dequeue timeout support to enable power management
+- HW managed event timers support through TIM, with high precision and
+ time granularity of 2.5us on CN9K and 1us on CN10K.
+- Up to 256 TIM rings aka event timer adapters.
+- Up to 8 rings traversed in parallel.
Prerequisites and Compilation procedure
---------------------------------------
@@ -101,3 +105,5 @@ Debugging Options
+===+============+=======================================================+
| 1 | SSO | --log-level='pmd\.event\.cnxk,8' |
+---+------------+-------------------------------------------------------+
+ | 2 | TIM | --log-level='pmd\.event\.cnxk\.timer,8' |
+ +---+------------+-------------------------------------------------------+
@@ -582,6 +582,8 @@ cnxk_sso_init(struct rte_eventdev *event_dev)
dev->nb_event_queues = 0;
dev->nb_event_ports = 0;
+ cnxk_tim_init(&dev->sso);
+
return 0;
error:
@@ -598,6 +600,7 @@ cnxk_sso_fini(struct rte_eventdev *event_dev)
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
+ cnxk_tim_fini();
roc_sso_rsrc_fini(&dev->sso);
roc_sso_dev_fini(&dev->sso);
@@ -14,6 +14,8 @@
#include "roc_api.h"
+#include "cnxk_tim_evdev.h"
+
#define CNXK_SSO_XAE_CNT "xae_cnt"
#define CNXK_SSO_GGRP_QOS "qos"
#define CN9K_SSO_SINGLE_WS "single_ws"
new file mode 100644
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell International Ltd.
+ */
+
+#include "cnxk_eventdev.h"
+#include "cnxk_tim_evdev.h"
+
+void
+cnxk_tim_init(struct roc_sso *sso)
+{
+ const struct rte_memzone *mz;
+ struct cnxk_tim_evdev *dev;
+ int rc;
+
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return;
+
+ mz = rte_memzone_reserve(RTE_STR(CNXK_TIM_EVDEV_NAME),
+ sizeof(struct cnxk_tim_evdev), 0, 0);
+ if (mz == NULL) {
+ plt_tim_dbg("Unable to allocate memory for TIM Event device");
+ return;
+ }
+ dev = mz->addr;
+
+ dev->tim.roc_sso = sso;
+ rc = roc_tim_init(&dev->tim);
+ if (rc < 0) {
+ plt_err("Failed to initialize roc tim resources");
+ rte_memzone_free(mz);
+ return;
+ }
+ dev->nb_rings = rc;
+ dev->chunk_sz = CNXK_TIM_RING_DEF_CHUNK_SZ;
+}
+
+void
+cnxk_tim_fini(void)
+{
+ struct cnxk_tim_evdev *dev = tim_priv_get();
+
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return;
+
+ roc_tim_fini(&dev->tim);
+ rte_memzone_free(rte_memzone_lookup(RTE_STR(CNXK_TIM_EVDEV_NAME)));
+}
new file mode 100644
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell International Ltd.
+ */
+
+#ifndef __CNXK_TIM_EVDEV_H__
+#define __CNXK_TIM_EVDEV_H__
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <eventdev_pmd_pci.h>
+#include <rte_event_timer_adapter.h>
+#include <rte_memzone.h>
+
+#include "roc_api.h"
+
+#define CNXK_TIM_EVDEV_NAME cnxk_tim_eventdev
+#define CNXK_TIM_RING_DEF_CHUNK_SZ (4096)
+
+struct cnxk_tim_evdev {
+ struct roc_tim tim;
+ struct rte_eventdev *event_dev;
+ uint16_t nb_rings;
+ uint32_t chunk_sz;
+};
+
+static inline struct cnxk_tim_evdev *
+tim_priv_get(void)
+{
+ const struct rte_memzone *mz;
+
+ mz = rte_memzone_lookup(RTE_STR(CNXK_TIM_EVDEV_NAME));
+ if (mz == NULL)
+ return NULL;
+
+ return mz->addr;
+}
+
+void cnxk_tim_init(struct roc_sso *sso);
+void cnxk_tim_fini(void);
+
+#endif /* __CNXK_TIM_EVDEV_H__ */
@@ -13,6 +13,7 @@ sources = files('cn10k_worker.c',
'cn9k_worker.c',
'cn9k_eventdev.c',
'cnxk_eventdev.c',
- 'cnxk_sso_selftest.c')
+ 'cnxk_sso_selftest.c',
+ 'cnxk_tim_evdev.c')
deps += ['bus_pci', 'common_cnxk', 'net_cnxk']