diff --git a/MAINTAINERS b/MAINTAINERS
index 45dcd36dbe..67c179f11b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -501,6 +501,12 @@ M: Artem V. Andreev <artem.andreev@oktetlabs.ru>
 M: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
 F: drivers/mempool/bucket/
 
+Marvell cnxk
+M: Ashwin Sekhar T K <asekhar@marvell.com>
+M: Pavan Nikhilesh <pbhagavatula@marvell.com>
+F: drivers/mempool/cnxk/
+F: doc/guides/mempool/cnxk.rst
+
 Marvell OCTEON TX2
 M: Jerin Jacob <jerinj@marvell.com>
 M: Nithin Dabilpuram <ndabilpuram@marvell.com>
diff --git a/doc/guides/mempool/cnxk.rst b/doc/guides/mempool/cnxk.rst
new file mode 100644
index 0000000000..fe099bb11a
--- /dev/null
+++ b/doc/guides/mempool/cnxk.rst
@@ -0,0 +1,84 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+    Copyright(C) 2021 Marvell.
+
+CNXK NPA Mempool Driver
+============================
+
+The CNXK NPA PMD (**librte_mempool_cnxk**) provides mempool
+driver support for the integrated mempool device found in **Marvell OCTEON CN9K/CN10K** SoC family.
+
+More information about CNXK SoC can be found at `Marvell Official Website
+<https://www.marvell.com/embedded-processors/infrastructure-processors/>`_.
+
+Features
+--------
+
+CNXK NPA PMD supports:
+
+- Up to 128 NPA LFs
+- 1M Pools per LF
+- HW mempool manager
+- Asynchronous batch alloc of up to 512 buffer allocations with single instruction.
+- Batch free of up to 15 buffers with single instruction.
+- Ethdev Rx buffer allocation in HW to save CPU cycles in the Rx path.
+- Ethdev Tx buffer recycling in HW to save CPU cycles in the Tx path.
+
+Prerequisites and Compilation procedure
+---------------------------------------
+
+   See :doc:`../platform/cnxk` for setup information.
+
+Pre-Installation Configuration
+------------------------------
+
+
+Runtime Config Options
+~~~~~~~~~~~~~~~~~~~~~~
+
+- ``Maximum number of mempools per application`` (default ``128``)
+
+  The maximum number of mempools per application needs to be configured on
+  HW during mempool driver initialization. HW can support up to 1M mempools,
+  Since each mempool costs set of HW resources, the ``max_pools`` ``devargs``
+  parameter is being introduced to configure the number of mempools required
+  for the application.
+  For example::
+
+    -a 0002:02:00.0,max_pools=512
+
+  With the above configuration, the driver will set up only 512 mempools for
+  the given application to save HW resources.
+
+.. note::
+
+   Since this configuration is per application, the end user needs to
+   provide ``max_pools`` parameter to the first PCIe device probed by the given
+   application.
+
+Debugging Options
+~~~~~~~~~~~~~~~~~
+
+.. _table_cnxk_mempool_debug_options:
+
+.. table:: CNXK mempool debug options
+
+   +---+------------+-------------------------------------------------------+
+   | # | Component  | EAL log command                                       |
+   +===+============+=======================================================+
+   | 1 | NPA        | --log-level='pmd\.mempool.cnxk,8'                     |
+   +---+------------+-------------------------------------------------------+
+
+Standalone mempool device
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+   The ``usertools/dpdk-devbind.py`` script shall enumerate all the mempool devices
+   available in the system. In order to avoid, the end user to bind the mempool
+   device prior to use ethdev and/or eventdev device, the respective driver
+   configures an NPA LF and attach to the first probed ethdev or eventdev device.
+   In case, if end user need to run mempool as a standalone device
+   (without ethdev or eventdev), end user needs to bind a mempool device using
+   ``usertools/dpdk-devbind.py``
+
+   Example command to run ``mempool_autotest`` test with standalone CN10K NPA device::
+
+     echo "mempool_autotest" | <build_dir>/app/test/dpdk-test -c 0xf0 --mbuf-pool-ops-name="cn10k_mempool_ops"
diff --git a/doc/guides/mempool/index.rst b/doc/guides/mempool/index.rst
index a0e55467e6..ce53bc1ac7 100644
--- a/doc/guides/mempool/index.rst
+++ b/doc/guides/mempool/index.rst
@@ -11,6 +11,7 @@ application through the mempool API.
     :maxdepth: 2
     :numbered:
 
+    cnxk
     octeontx
     octeontx2
     ring
diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst
index 3b072877a1..9bbba65f2e 100644
--- a/doc/guides/platform/cnxk.rst
+++ b/doc/guides/platform/cnxk.rst
@@ -141,6 +141,9 @@ HW Offload Drivers
 
 This section lists dataplane H/W block(s) available in CNXK SoC.
 
+#. **Mempool Driver**
+   See :doc:`../mempool/cnxk` for NPA mempool driver information.
+
 Procedure to Setup Platform
 ---------------------------
 
