From patchwork Fri Mar 5 16:21:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 88587 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3EF41A054F; Fri, 5 Mar 2021 19:13:53 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DA12C22A43C; Fri, 5 Mar 2021 19:13:29 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 3574222A33E for ; Fri, 5 Mar 2021 17:22:10 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 125GEpbL023633 for ; Fri, 5 Mar 2021 08:22:09 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=dxaTSpX+pYpMfM+QYGQzZTkfC/jr3OoAHDvsgHDRoPY=; b=Ss11lJHJp35oA8ku2Pz/fPX2NFiisjYeLNUmF0OvIaiA5v1HU6EXiJLL/qS4DhWqq5oP c5ekTK5v+57p1dByPZhB3Le7lPs0SXjftuI3J4OpK9f4CbLHliCSQ3Z+FYjcdgnjatVv 5uzU8+QuBl+5rHLR9qE8IuBF5wgCHSdnWA7i0l2v71ZmjS9Ykvlc4lnf1pOFFoW0yOKF CCA8TIs6ykt8U8I50689vmW2VtqyIx27KYgKEYz4dF0lOqyMyftKoAA0/tfODJnTqflH 5EletX68kL3ydGl2wDzlQvWHtOiET6ko9fB0mLWq3L68nWZNqFsj0oRpYkCfI6kDGkxU qg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 372s2un6gn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 05 Mar 2021 08:22:09 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Mar 2021 08:22:08 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Mar 2021 08:22:07 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 5 Mar 2021 08:22:07 -0800 Received: from lab-ci-142.marvell.com (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id 1C2923F7043; Fri, 5 Mar 2021 08:22:04 -0800 (PST) From: Ashwin Sekhar T K To: CC: , , , , , , Date: Fri, 5 Mar 2021 21:51:47 +0530 Message-ID: <20210305162149.2196166-5-asekhar@marvell.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210305162149.2196166-1-asekhar@marvell.com> References: <20210305162149.2196166-1-asekhar@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-05_10:2021-03-03, 2021-03-05 signatures=0 X-Mailman-Approved-At: Fri, 05 Mar 2021 19:13:23 +0100 Subject: [dpdk-dev] [PATCH 4/6] mempool/cnxk: add base cn10k mempool ops X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add base cn10k mempool ops. Signed-off-by: Ashwin Sekhar T K --- drivers/mempool/cnxk/cn10k_mempool_ops.c | 46 ++++++++++++++++++++++++ drivers/mempool/cnxk/meson.build | 3 +- 2 files changed, 48 insertions(+), 1 deletion(-) create mode 100644 drivers/mempool/cnxk/cn10k_mempool_ops.c diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c new file mode 100644 index 0000000000..fc7592fd94 --- /dev/null +++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include + +#include "roc_api.h" +#include "cnxk_mempool.h" + +static int +cn10k_mempool_alloc(struct rte_mempool *mp) +{ + uint32_t block_size; + size_t padding; + + block_size = mp->elt_size + mp->header_size + mp->trailer_size; + /* Align header size to ROC_ALIGN */ + if (mp->header_size % ROC_ALIGN != 0) { + padding = RTE_ALIGN_CEIL(mp->header_size, ROC_ALIGN) - + mp->header_size; + mp->header_size += padding; + block_size += padding; + } + + /* Align block size to ROC_ALIGN */ + if (block_size % ROC_ALIGN != 0) { + padding = RTE_ALIGN_CEIL(block_size, ROC_ALIGN) - block_size; + mp->trailer_size += padding; + block_size += padding; + } + + return cnxk_mempool_alloc(mp); +} + +static struct rte_mempool_ops cn10k_mempool_ops = { + .name = "cn10k_mempool_ops", + .alloc = cn10k_mempool_alloc, + .free = cnxk_mempool_free, + .enqueue = cnxk_mempool_enq, + .dequeue = cnxk_mempool_deq, + .get_count = cnxk_mempool_get_count, + .calc_mem_size = cnxk_mempool_calc_mem_size, + .populate = cnxk_mempool_populate, +}; + +MEMPOOL_REGISTER_OPS(cn10k_mempool_ops); diff --git a/drivers/mempool/cnxk/meson.build b/drivers/mempool/cnxk/meson.build index 4ce865e18b..46f502bf3a 100644 --- a/drivers/mempool/cnxk/meson.build +++ b/drivers/mempool/cnxk/meson.build @@ -15,7 +15,8 @@ endif sources = files('cnxk_mempool.c', 'cnxk_mempool_ops.c', - 'cn9k_mempool_ops.c') + 'cn9k_mempool_ops.c', + 'cn10k_mempool_ops.c') deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool']