From patchwork Tue Mar 2 14:29:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 88393 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D9DB6A054F; Tue, 2 Mar 2021 15:29:47 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BE0AF22A26C; Tue, 2 Mar 2021 15:29:47 +0100 (CET) Received: from mail-pl1-f182.google.com (mail-pl1-f182.google.com [209.85.214.182]) by mails.dpdk.org (Postfix) with ESMTP id 4231340142 for ; Tue, 2 Mar 2021 15:29:46 +0100 (CET) Received: by mail-pl1-f182.google.com with SMTP id ba1so12146954plb.1 for ; Tue, 02 Mar 2021 06:29:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:mime-version; bh=o7CIaLTefWHqauRsxvM6ip9YcLcGzWmQvxUNYb1gX8M=; b=U43A3xJJkEfKbEViDg1TZuEvd8ZKFuMLS37iZItxRMsL18C2zpklk050aN8e+Fps+k /LL6etfFPqRdD8l5y7s1uGIoeQmJV1Tn1uCvkBoMGP6KcmoeE4Yzs7H83Gxg+ORIu0oI SMevQTj2BiZbvvw6fE7/Pb2rqSKFOVt4RxSwI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version; bh=o7CIaLTefWHqauRsxvM6ip9YcLcGzWmQvxUNYb1gX8M=; b=s4HQ5pB34pukn5wBHC0ER18335IHsBGMfodd4xgXQiHgm6PGc9ZbSCc4QS6rGUQk5V lCkRlc9rrUiRbPJ5keerhWCUwkS1UqtEDVfCkuwRB0iST/2f+M+uO5IQwrdvOBl7SSdL 8EfgiEm8192S5g1TtWqcBNTsTpoAqGAYZwjPszXKBnNUIT10YmuYbsch3mhJdL0kc0Ba YQ/FN003T334Yi0MKPgWedwpM8yKPnA7Kn14zn3Zxi6W0FZA2q8V+YGwKMhjIl0RNI7i KNr5+JqdJ2gYGpNRgnHQgOyyzCOv+s1g2lZpGmkxujOUdOfXHyJ0DiMonbpijXMKUjKU 82yA== X-Gm-Message-State: AOAM532rgnIrzvW0DuelB1jrmdJugUzyBvNzgylugjjpq6JA2sdBoiDF hwF5dpQEHiJJQTteM17r9xmhSQ== X-Google-Smtp-Source: ABdhPJwEtN129tphR/b5GB9wLCxxPrhOP+xun4bOKJI6o+lOLslFQu5Iyf+3PhVFbRnNfKZgHm9Bhg== X-Received: by 2002:a17:902:8542:b029:e4:74ad:94ab with SMTP id d2-20020a1709028542b02900e474ad94abmr3762758plo.73.1614695385281; Tue, 02 Mar 2021 06:29:45 -0800 (PST) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id ml17sm4234178pjb.45.2021.03.02.06.29.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 06:29:42 -0800 (PST) From: Lance Richardson To: Ajit Khaparde , Somnath Kotur Cc: dev@dpdk.org, stable@dpdk.org, Andy Gospodarek Date: Tue, 2 Mar 2021 09:29:27 -0500 Message-Id: <20210302142927.536372-1-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH] net/bnxt: fix Rx descriptor status X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix a number of issues in the bnxt receive descriptor status function, including: - Provide status of receive descriptor instead of completion descriptor. - Remove invalid comparison of raw ring index with masked ring index. - Correct misinterpretation of offset parameter as ring index. - Correct misuse of completion ring index for mbuf ring (the two rings have different sizes). Fixes: 0fe613bb87b2 ("net/bnxt: support Rx descriptor status") Signed-off-by: Lance Richardson Cc: stable@dpdk.org Reviewed-by: Andy Gospodarek Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt_ethdev.c | 108 ++++++++++++++++++++++++++------- 1 file changed, 86 insertions(+), 22 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 9824cdb6d8..477e04ef5a 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -3003,42 +3003,106 @@ bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id) static int bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset) { - struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue; - struct bnxt_rx_ring_info *rxr; + struct bnxt_rx_queue *rxq = rx_queue; struct bnxt_cp_ring_info *cpr; - struct rte_mbuf *rx_buf; + struct bnxt_rx_ring_info *rxr; + uint32_t desc, cons, raw_cons; + struct bnxt *bp = rxq->bp; struct rx_pkt_cmpl *rxcmp; - uint32_t cons, cp_cons; int rc; - if (!rxq) - return -EINVAL; - - rc = is_bnxt_in_error(rxq->bp); + rc = is_bnxt_in_error(bp); if (rc) return rc; - cpr = rxq->cp_ring; - rxr = rxq->rx_ring; - if (offset >= rxq->nb_rx_desc) return -EINVAL; - cons = RING_CMP(cpr->cp_ring_struct, offset); - cp_cons = cpr->cp_raw_cons; - rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; + rxr = rxq->rx_ring; + cpr = rxq->cp_ring; - if (cons > cp_cons) { - if (CMPL_VALID(rxcmp, cpr->valid)) - return RTE_ETH_RX_DESC_DONE; - } else { - if (CMPL_VALID(rxcmp, !cpr->valid)) + /* + * For the vector receive case, the completion at the requested + * offset can be indexed directly. + */ + if (bp->flags & BNXT_FLAG_RX_VECTOR_PKT_MODE) { + struct rx_pkt_cmpl *rxcmp; + + /* Check status of completion descriptor. */ + raw_cons = cpr->cp_raw_cons + + offset * CMP_LEN(CMPL_BASE_TYPE_RX_L2); + cons = RING_CMP(cpr->cp_ring_struct, raw_cons); + rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; + + if (CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) return RTE_ETH_RX_DESC_DONE; + + /* Check whether rx desc has an mbuf attached. */ + cons = RING_CMP(rxr->rx_ring_struct, raw_cons / 2); + if (cons >= rxq->rxrearm_start && + cons < rxq->rxrearm_start + rxq->rxrearm_nb) { + return RTE_ETH_RX_DESC_UNAVAIL; + } + + return RTE_ETH_RX_DESC_AVAIL; } - rx_buf = rxr->rx_buf_ring[cons]; - if (rx_buf == NULL || rx_buf == &rxq->fake_mbuf) - return RTE_ETH_RX_DESC_UNAVAIL; + /* + * For the non-vector receive case, scan the completion ring to + * locate the completion descriptor for the requested offset. + */ + raw_cons = cpr->cp_raw_cons; + desc = 0; + while (1) { + uint32_t agg_cnt, cons, cmpl_type; + + cons = RING_CMP(cpr->cp_ring_struct, raw_cons); + rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; + + if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) + break; + + cmpl_type = CMP_TYPE(rxcmp); + + switch (cmpl_type) { + case CMPL_BASE_TYPE_RX_L2: + case CMPL_BASE_TYPE_RX_L2_V2: + if (desc == offset) { + cons = rxcmp->opaque; + if (rxr->rx_buf_ring[cons]) + return RTE_ETH_RX_DESC_DONE; + else + return RTE_ETH_RX_DESC_UNAVAIL; + } + agg_cnt = BNXT_RX_L2_AGG_BUFS(rxcmp); + raw_cons = raw_cons + CMP_LEN(cmpl_type) + agg_cnt; + desc++; + break; + + case CMPL_BASE_TYPE_RX_TPA_END: + if (desc == offset) + return RTE_ETH_RX_DESC_DONE; + + if (BNXT_CHIP_P5(rxq->bp)) { + struct rx_tpa_v2_end_cmpl_hi *p5_tpa_end; + + p5_tpa_end = (void *)rxcmp; + agg_cnt = BNXT_TPA_END_AGG_BUFS_TH(p5_tpa_end); + } else { + struct rx_tpa_end_cmpl *tpa_end; + + tpa_end = (void *)rxcmp; + agg_cnt = BNXT_TPA_END_AGG_BUFS(tpa_end); + } + + raw_cons = raw_cons + CMP_LEN(cmpl_type) + agg_cnt; + desc++; + break; + + default: + raw_cons += CMP_LEN(cmpl_type); + } + } return RTE_ETH_RX_DESC_AVAIL; }