diff mbox series

[3/4] event/octeontx2: reduce chunk pool memory usage

Message ID 20210225122315.6350-3-pbhagavatula@marvell.com (mailing list archive)
State Changes Requested
Delegated to: Jerin Jacob
Headers show
Series [1/4] event/octeontx2: simplify timer bucket estimation | expand

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Pavan Nikhilesh Bhagavatula Feb. 25, 2021, 12:23 p.m. UTC
From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Reduce amount of memory used by chunk pool when the mempool used
is OCTEONTX2 NPA.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/event/octeontx2/otx2_tim_evdev.c | 19 ++++++++++---------
 drivers/event/octeontx2/otx2_tim_evdev.h |  4 ++--
 2 files changed, 12 insertions(+), 11 deletions(-)

Comments

Jerin Jacob March 20, 2021, 1:30 p.m. UTC | #1
On Thu, Feb 25, 2021 at 5:53 PM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Reduce amount of memory used by chunk pool when the mempool used
> is OCTEONTX2 NPA.

Please describe the existing and new memory allocation schemes.


>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> ---
>  drivers/event/octeontx2/otx2_tim_evdev.c | 19 ++++++++++---------
>  drivers/event/octeontx2/otx2_tim_evdev.h |  4 ++--
>  2 files changed, 12 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c
> index d1e967eb7..4fb002ddb 100644
> --- a/drivers/event/octeontx2/otx2_tim_evdev.c
> +++ b/drivers/event/octeontx2/otx2_tim_evdev.c
> @@ -91,6 +91,8 @@ tim_chnk_pool_create(struct otx2_tim_ring *tim_ring,
>         if (cache_sz > RTE_MEMPOOL_CACHE_MAX_SIZE)
>                 cache_sz = RTE_MEMPOOL_CACHE_MAX_SIZE;
>
> +       cache_sz = cache_sz != 0 ? cache_sz : 2;
> +       tim_ring->nb_chunks += (cache_sz * rte_lcore_count());
>         if (!tim_ring->disable_npa) {
>                 tim_ring->chunk_pool = rte_mempool_create_empty(pool_name,
>                                 tim_ring->nb_chunks, tim_ring->chunk_sz,
> @@ -268,16 +270,15 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr)
>                 }
>         }
>
> -       tim_ring->nb_chunks = tim_ring->nb_timers / OTX2_TIM_NB_CHUNK_SLOTS(
> -                                                       tim_ring->chunk_sz);
> -       tim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
> -
> -       if (tim_ring->disable_npa)
> +       if (tim_ring->disable_npa) {
> +               tim_ring->nb_chunks =
> +                       tim_ring->nb_timers /
> +                       OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
>                 tim_ring->nb_chunks = tim_ring->nb_chunks * tim_ring->nb_bkts;
> -       else
> -               tim_ring->nb_chunks = tim_ring->nb_chunks + tim_ring->nb_bkts;
> -
> -       /* Create buckets. */
> +       } else {
> +               tim_ring->nb_chunks = tim_ring->nb_timers;
> +       }
> +       tim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
>         tim_ring->bkt = rte_zmalloc("otx2_tim_bucket", (tim_ring->nb_bkts) *
>                                     sizeof(struct otx2_tim_bkt),
>                                     RTE_CACHE_LINE_SIZE);
> diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h
> index bf89b85b0..2a3b84a43 100644
> --- a/drivers/event/octeontx2/otx2_tim_evdev.h
> +++ b/drivers/event/octeontx2/otx2_tim_evdev.h
> @@ -65,12 +65,12 @@
>
>  #define OTX2_MAX_TIM_RINGS             (256)
>  #define OTX2_TIM_MAX_BUCKETS           (0xFFFFF)
> -#define OTX2_TIM_RING_DEF_CHUNK_SZ     (4096)
> +#define OTX2_TIM_RING_DEF_CHUNK_SZ     (1024)
>  #define OTX2_TIM_CHUNK_ALIGNMENT       (16)
>  #define OTX2_TIM_MAX_BURST             (RTE_CACHE_LINE_SIZE / \
>                                                 OTX2_TIM_CHUNK_ALIGNMENT)
>  #define OTX2_TIM_NB_CHUNK_SLOTS(sz)    (((sz) / OTX2_TIM_CHUNK_ALIGNMENT) - 1)
> -#define OTX2_TIM_MIN_CHUNK_SLOTS       (0x1)
> +#define OTX2_TIM_MIN_CHUNK_SLOTS       (0x3F)
>  #define OTX2_TIM_MAX_CHUNK_SLOTS       (0x1FFE)
>  #define OTX2_TIM_MIN_TMO_TKS           (256)
>
> --
> 2.17.1
>
diff mbox series

Patch

diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c
index d1e967eb7..4fb002ddb 100644
--- a/drivers/event/octeontx2/otx2_tim_evdev.c
+++ b/drivers/event/octeontx2/otx2_tim_evdev.c
@@ -91,6 +91,8 @@  tim_chnk_pool_create(struct otx2_tim_ring *tim_ring,
 	if (cache_sz > RTE_MEMPOOL_CACHE_MAX_SIZE)
 		cache_sz = RTE_MEMPOOL_CACHE_MAX_SIZE;
 
+	cache_sz = cache_sz != 0 ? cache_sz : 2;
+	tim_ring->nb_chunks += (cache_sz * rte_lcore_count());
 	if (!tim_ring->disable_npa) {
 		tim_ring->chunk_pool = rte_mempool_create_empty(pool_name,
 				tim_ring->nb_chunks, tim_ring->chunk_sz,
@@ -268,16 +270,15 @@  otx2_tim_ring_create(struct rte_event_timer_adapter *adptr)
 		}
 	}
 
-	tim_ring->nb_chunks = tim_ring->nb_timers / OTX2_TIM_NB_CHUNK_SLOTS(
-							tim_ring->chunk_sz);
-	tim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
-
-	if (tim_ring->disable_npa)
+	if (tim_ring->disable_npa) {
+		tim_ring->nb_chunks =
+			tim_ring->nb_timers /
+			OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
 		tim_ring->nb_chunks = tim_ring->nb_chunks * tim_ring->nb_bkts;
-	else
-		tim_ring->nb_chunks = tim_ring->nb_chunks + tim_ring->nb_bkts;
-
-	/* Create buckets. */
+	} else {
+		tim_ring->nb_chunks = tim_ring->nb_timers;
+	}
+	tim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
 	tim_ring->bkt = rte_zmalloc("otx2_tim_bucket", (tim_ring->nb_bkts) *
 				    sizeof(struct otx2_tim_bkt),
 				    RTE_CACHE_LINE_SIZE);
diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h
index bf89b85b0..2a3b84a43 100644
--- a/drivers/event/octeontx2/otx2_tim_evdev.h
+++ b/drivers/event/octeontx2/otx2_tim_evdev.h
@@ -65,12 +65,12 @@ 
 
 #define OTX2_MAX_TIM_RINGS		(256)
 #define OTX2_TIM_MAX_BUCKETS		(0xFFFFF)
-#define OTX2_TIM_RING_DEF_CHUNK_SZ	(4096)
+#define OTX2_TIM_RING_DEF_CHUNK_SZ	(1024)
 #define OTX2_TIM_CHUNK_ALIGNMENT	(16)
 #define OTX2_TIM_MAX_BURST		(RTE_CACHE_LINE_SIZE / \
 						OTX2_TIM_CHUNK_ALIGNMENT)
 #define OTX2_TIM_NB_CHUNK_SLOTS(sz)	(((sz) / OTX2_TIM_CHUNK_ALIGNMENT) - 1)
-#define OTX2_TIM_MIN_CHUNK_SLOTS	(0x1)
+#define OTX2_TIM_MIN_CHUNK_SLOTS	(0x3F)
 #define OTX2_TIM_MAX_CHUNK_SLOTS	(0x1FFE)
 #define OTX2_TIM_MIN_TMO_TKS		(256)