From patchwork Thu Feb 25 08:08:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 88197 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 378ABA034F; Thu, 25 Feb 2021 09:10:21 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 318731607E1; Thu, 25 Feb 2021 09:08:54 +0100 (CET) Received: from smtpbgeu1.qq.com (smtpbgeu1.qq.com [52.59.177.22]) by mails.dpdk.org (Postfix) with ESMTP id 3C44F1607EF for ; Thu, 25 Feb 2021 09:08:51 +0100 (CET) X-QQ-mid: bizesmtp20t1614240526tsqdjhb0 Received: from wxdbg.localdomain.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Thu, 25 Feb 2021 16:08:45 +0800 (CST) X-QQ-SSF: 01400000002000C0D000000A0000000 X-QQ-FEAT: q7a7ZL9Nkc0N5Kyttqeqw/6rlZDxFtUr9AzkykU05UDjOPPLscIs8pjGiXg47 AF1MGgKtKfqYruGJ2qgXo/xE++IPxX5HIgx9wIdL+GMHQB6gX7fxlm7OlON+krspdYhL2SE 8AreZnW1vBuTDk7cdsdbnUvXzGQdmBdNR7qmwHjAKIrEoyF/mv89TxhwRqULQNt1yCrz5NM EHUQPd6BhXMLIadVWMdeOZTBuWP5AW3eDaFTvsGoMkNhyNSRyh6Q4yqNuWHkvTbk4L4SjpX Giyqgla4sDjQqxZfSDYPVCdeVjSGvnH1SrejvFqmeVRnYw7IPw2u1SFcSN7UUQfBofvFAYS kdmpN27tbgy6xDEr1GV3jwHFpEkEw== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Thu, 25 Feb 2021 16:08:58 +0800 Message-Id: <20210225080901.3645291-15-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210225080901.3645291-1-jiawenwu@trustnetic.com> References: <20210225080901.3645291-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign6 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH v3 14/17] net/txgbe: support register dump on VF device X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support to dump registers for VF. Signed-off-by: Jiawen Wu --- doc/guides/nics/features/txgbe_vf.ini | 1 + drivers/net/txgbe/txgbe_ethdev_vf.c | 74 +++++++++++++++++++++++++++ 2 files changed, 75 insertions(+) diff --git a/doc/guides/nics/features/txgbe_vf.ini b/doc/guides/nics/features/txgbe_vf.ini index 69304baa9..7cc0ad92b 100644 --- a/doc/guides/nics/features/txgbe_vf.ini +++ b/doc/guides/nics/features/txgbe_vf.ini @@ -30,6 +30,7 @@ Rx descriptor status = Y Tx descriptor status = Y Basic stats = Y Extended stats = Y +Registers dump = Y Multiprocess aware = Y Linux = Y ARMv8 = Y diff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c index aa1b46766..bc373f052 100644 --- a/drivers/net/txgbe/txgbe_ethdev_vf.c +++ b/drivers/net/txgbe/txgbe_ethdev_vf.c @@ -14,6 +14,36 @@ #include "base/txgbe.h" #include "txgbe_ethdev.h" #include "txgbe_rxtx.h" +#include "txgbe_regs_group.h" + +static const struct reg_info txgbevf_regs_general[] = { + {TXGBE_VFRST, 1, 1, "TXGBE_VFRST"}, + {TXGBE_VFSTATUS, 1, 1, "TXGBE_VFSTATUS"}, + {TXGBE_VFMBCTL, 1, 1, "TXGBE_VFMAILBOX"}, + {TXGBE_VFMBX, 16, 4, "TXGBE_VFMBX"}, + {TXGBE_VFPBWRAP, 1, 1, "TXGBE_VFPBWRAP"}, + {0, 0, 0, ""} +}; + +static const struct reg_info txgbevf_regs_interrupt[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info txgbevf_regs_rxdma[] = { + {0, 0, 0, ""} +}; + +static const struct reg_info txgbevf_regs_tx[] = { + {0, 0, 0, ""} +}; + +/* VF registers */ +static const struct reg_info *txgbevf_regs[] = { + txgbevf_regs_general, + txgbevf_regs_interrupt, + txgbevf_regs_rxdma, + txgbevf_regs_tx, + NULL}; static int txgbevf_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, unsigned int n); @@ -945,6 +975,49 @@ txgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) return 0; } +static int +txgbevf_get_reg_length(struct rte_eth_dev *dev __rte_unused) +{ + int count = 0; + int g_ind = 0; + const struct reg_info *reg_group; + + while ((reg_group = txgbevf_regs[g_ind++])) + count += txgbe_regs_group_count(reg_group); + + return count; +} + +static int +txgbevf_get_regs(struct rte_eth_dev *dev, + struct rte_dev_reg_info *regs) +{ + struct txgbe_hw *hw = TXGBE_DEV_HW(dev); + uint32_t *data = regs->data; + int g_ind = 0; + int count = 0; + const struct reg_info *reg_group; + + if (data == NULL) { + regs->length = txgbevf_get_reg_length(dev); + regs->width = sizeof(uint32_t); + return 0; + } + + /* Support only full register dump */ + if (regs->length == 0 || + regs->length == (uint32_t)txgbevf_get_reg_length(dev)) { + regs->version = hw->mac.type << 24 | hw->revision_id << 16 | + hw->device_id; + while ((reg_group = txgbevf_regs[g_ind++])) + count += txgbe_read_regs_group(dev, &data[count], + reg_group); + return 0; + } + + return -ENOTSUP; +} + static int txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev) { @@ -1120,6 +1193,7 @@ static const struct eth_dev_ops txgbevf_eth_dev_ops = { .rxq_info_get = txgbe_rxq_info_get, .txq_info_get = txgbe_txq_info_get, .mac_addr_set = txgbevf_set_default_mac_addr, + .get_reg = txgbevf_get_regs, .reta_update = txgbe_dev_rss_reta_update, .reta_query = txgbe_dev_rss_reta_query, .rss_hash_update = txgbe_dev_rss_hash_update,